1 #if !defined(__QEMU_MIPS_EXEC_H__)
2 #define __QEMU_MIPS_EXEC_H__
8 #include "dyngen-exec.h"
11 register struct CPUMIPSState
*env
asm(AREG0
);
13 #if TARGET_LONG_BITS > HOST_LONG_BITS
18 register target_ulong T0
asm(AREG1
);
19 register target_ulong T1
asm(AREG2
);
20 register target_ulong T2
asm(AREG3
);
23 #if defined (USE_HOST_FLOAT_REGS)
24 #error "implement me."
26 #define FDT0 (env->ft0.fd)
27 #define FDT1 (env->ft1.fd)
28 #define FDT2 (env->ft2.fd)
29 #define FST0 (env->ft0.fs[FP_ENDIAN_IDX])
30 #define FST1 (env->ft1.fs[FP_ENDIAN_IDX])
31 #define FST2 (env->ft2.fs[FP_ENDIAN_IDX])
32 #define FSTH0 (env->ft0.fs[!FP_ENDIAN_IDX])
33 #define FSTH1 (env->ft1.fs[!FP_ENDIAN_IDX])
34 #define FSTH2 (env->ft2.fs[!FP_ENDIAN_IDX])
35 #define DT0 (env->ft0.d)
36 #define DT1 (env->ft1.d)
37 #define DT2 (env->ft2.d)
38 #define WT0 (env->ft0.w[FP_ENDIAN_IDX])
39 #define WT1 (env->ft1.w[FP_ENDIAN_IDX])
40 #define WT2 (env->ft2.w[FP_ENDIAN_IDX])
41 #define WTH0 (env->ft0.w[!FP_ENDIAN_IDX])
42 #define WTH1 (env->ft1.w[!FP_ENDIAN_IDX])
43 #define WTH2 (env->ft2.w[!FP_ENDIAN_IDX])
46 #if defined (DEBUG_OP)
47 # define RETURN() __asm__ __volatile__("nop" : : : "memory");
49 # define RETURN() __asm__ __volatile__("" : : : "memory");
55 #if !defined(CONFIG_USER_ONLY)
56 #include "softmmu_exec.h"
57 #endif /* !defined(CONFIG_USER_ONLY) */
59 static inline void env_to_regs(void)
63 static inline void regs_to_env(void)
68 #if TARGET_LONG_BITS > HOST_LONG_BITS
70 void do_dsll32 (void);
72 void do_dsra32 (void);
74 void do_dsrl32 (void);
76 void do_drotr32 (void);
80 void do_drotrv (void);
84 #if HOST_LONG_BITS < 64
87 #if TARGET_LONG_BITS > HOST_LONG_BITS
97 #if TARGET_LONG_BITS > HOST_LONG_BITS
101 void do_mfc0_random(void);
102 void do_mfc0_count(void);
103 void do_mtc0_entryhi(uint32_t in
);
104 void do_mtc0_status_debug(uint32_t old
, uint32_t val
);
105 void do_mtc0_status_irqraise_debug(void);
106 void dump_fpu(CPUState
*env
);
107 void fpu_dump_state(CPUState
*env
, FILE *f
,
108 int (*fpu_fprintf
)(FILE *f
, const char *fmt
, ...),
111 void do_lwl_raw (uint32_t);
112 void do_lwr_raw (uint32_t);
113 uint32_t do_swl_raw (uint32_t);
114 uint32_t do_swr_raw (uint32_t);
116 void do_ldl_raw (uint64_t);
117 void do_ldr_raw (uint64_t);
118 uint64_t do_sdl_raw (uint64_t);
119 uint64_t do_sdr_raw (uint64_t);
121 #if !defined(CONFIG_USER_ONLY)
122 void do_lwl_user (uint32_t);
123 void do_lwl_kernel (uint32_t);
124 void do_lwr_user (uint32_t);
125 void do_lwr_kernel (uint32_t);
126 uint32_t do_swl_user (uint32_t);
127 uint32_t do_swl_kernel (uint32_t);
128 uint32_t do_swr_user (uint32_t);
129 uint32_t do_swr_kernel (uint32_t);
131 void do_ldl_user (uint64_t);
132 void do_ldl_kernel (uint64_t);
133 void do_ldr_user (uint64_t);
134 void do_ldr_kernel (uint64_t);
135 uint64_t do_sdl_user (uint64_t);
136 uint64_t do_sdl_kernel (uint64_t);
137 uint64_t do_sdr_user (uint64_t);
138 uint64_t do_sdr_kernel (uint64_t);
141 void do_pmon (int function
);
145 int cpu_mips_handle_mmu_fault (CPUState
*env
, target_ulong address
, int rw
,
146 int is_user
, int is_softmmu
);
147 void do_interrupt (CPUState
*env
);
148 void r4k_invalidate_tlb (CPUState
*env
, int idx
, int use_extra
);
150 void cpu_loop_exit(void);
151 void do_raise_exception_err (uint32_t exception
, int error_code
);
152 void do_raise_exception (uint32_t exception
);
153 void do_raise_exception_direct_err (uint32_t exception
, int error_code
);
154 void do_raise_exception_direct (uint32_t exception
);
156 void cpu_dump_state(CPUState
*env
, FILE *f
,
157 int (*cpu_fprintf
)(FILE *f
, const char *fmt
, ...),
159 void cpu_mips_irqctrl_init (void);
160 uint32_t cpu_mips_get_random (CPUState
*env
);
161 uint32_t cpu_mips_get_count (CPUState
*env
);
162 void cpu_mips_store_count (CPUState
*env
, uint32_t value
);
163 void cpu_mips_store_compare (CPUState
*env
, uint32_t value
);
164 void cpu_mips_update_irq (CPUState
*env
);
165 void cpu_mips_clock_init (CPUState
*env
);
166 void cpu_mips_tlb_flush (CPUState
*env
, int flush_global
);
170 #define FOP_PROTO(op) \
171 void do_float_ ## op ## _s(void); \
172 void do_float_ ## op ## _d(void);
185 #define FOP_PROTO(op) \
186 void do_float_ ## op ## _s(void); \
187 void do_float_ ## op ## _d(void); \
188 void do_float_ ## op ## _ps(void);
199 void do_float_cvtd_s(void);
200 void do_float_cvtd_w(void);
201 void do_float_cvtd_l(void);
202 void do_float_cvtl_d(void);
203 void do_float_cvtl_s(void);
204 void do_float_cvtps_pw(void);
205 void do_float_cvtpw_ps(void);
206 void do_float_cvts_d(void);
207 void do_float_cvts_w(void);
208 void do_float_cvts_l(void);
209 void do_float_cvts_pl(void);
210 void do_float_cvts_pu(void);
211 void do_float_cvtw_s(void);
212 void do_float_cvtw_d(void);
214 void do_float_addr_ps(void);
215 void do_float_mulr_ps(void);
217 #define FOP_PROTO(op) \
218 void do_cmp_d_ ## op(long cc); \
219 void do_cmpabs_d_ ## op(long cc); \
220 void do_cmp_s_ ## op(long cc); \
221 void do_cmpabs_s_ ## op(long cc); \
222 void do_cmp_ps_ ## op(long cc); \
223 void do_cmpabs_ps_ ## op(long cc);
243 #endif /* !defined(__QEMU_MIPS_EXEC_H__) */