2 * ARM execution defines
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include "dyngen-exec.h"
23 register struct CPUARMState
*env
asm(AREG0
);
24 register uint32_t T0
asm(AREG1
);
25 register uint32_t T1
asm(AREG2
);
26 register uint32_t T2
asm(AREG3
);
28 /* TODO: Put these in FP regs on targets that have such things. */
29 /* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */
30 #define FT0s env->vfp.tmp0s
31 #define FT1s env->vfp.tmp1s
32 #define FT0d env->vfp.tmp0d
33 #define FT1d env->vfp.tmp1d
35 #define M0 env->iwmmxt.val
40 static inline void env_to_regs(void)
44 static inline void regs_to_env(void)
48 int cpu_arm_handle_mmu_fault (CPUState
*env
, target_ulong address
, int rw
,
49 int mmu_idx
, int is_softmmu
);
51 static inline int cpu_halted(CPUState
*env
) {
54 /* An interrupt wakes the CPU even if the I and F CPSR bits are
55 set. We use EXITTB to silently wake CPU without causing an
57 if (env
->interrupt_request
&
58 (CPU_INTERRUPT_FIQ
| CPU_INTERRUPT_HARD
| CPU_INTERRUPT_EXITTB
)) {
65 #if !defined(CONFIG_USER_ONLY)
66 #include "softmmu_exec.h"
71 void helper_set_cp(CPUState
*, uint32_t, uint32_t);
72 uint32_t helper_get_cp(CPUState
*, uint32_t);
73 void helper_set_cp15(CPUState
*, uint32_t, uint32_t);
74 uint32_t helper_get_cp15(CPUState
*, uint32_t);
75 void helper_set_r13_banked(CPUState
*env
, int mode
, uint32_t val
);
76 uint32_t helper_get_r13_banked(CPUState
*env
, int mode
);
77 uint32_t helper_v7m_mrs(CPUState
*env
, int reg
);
78 void helper_v7m_msr(CPUState
*env
, int reg
, uint32_t val
);
80 void helper_mark_exclusive(CPUARMState
*, uint32_t addr
);
81 int helper_test_exclusive(CPUARMState
*, uint32_t addr
);
82 void helper_clrex(CPUARMState
*env
);
84 void cpu_loop_exit(void);
86 void raise_exception(int);
88 void do_vfp_abss(void);
89 void do_vfp_absd(void);
90 void do_vfp_negs(void);
91 void do_vfp_negd(void);
92 void do_vfp_sqrts(void);
93 void do_vfp_sqrtd(void);
94 void do_vfp_cmps(void);
95 void do_vfp_cmpd(void);
96 void do_vfp_cmpes(void);
97 void do_vfp_cmped(void);
98 void do_vfp_set_fpscr(void);
99 void do_vfp_get_fpscr(void);
100 float32
helper_recps_f32(float32
, float32
);
101 float32
helper_rsqrts_f32(float32
, float32
);
102 uint32_t helper_recpe_u32(uint32_t);
103 uint32_t helper_rsqrte_u32(uint32_t);
104 float32
helper_recpe_f32(float32
);
105 float32
helper_rsqrte_f32(float32
);
106 void helper_neon_tbl(int rn
, int maxindex
);
107 uint32_t helper_neon_mul_p8(uint32_t op1
, uint32_t op2
);