SH4 delay slot code update, by Magnus Damm.
[qemu/qemu_0_9_1_stable.git] / hw / isa.h
blob89b3004a53f68cfb959035adbc168f09edb4d1b3
1 /* ISA bus */
3 extern target_phys_addr_t isa_mem_base;
5 int register_ioport_read(int start, int length, int size,
6 IOPortReadFunc *func, void *opaque);
7 int register_ioport_write(int start, int length, int size,
8 IOPortWriteFunc *func, void *opaque);
9 void isa_unassign_ioport(int start, int length);
11 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
13 /* dma.c */
14 int DMA_get_channel_mode (int nchan);
15 int DMA_read_memory (int nchan, void *buf, int pos, int size);
16 int DMA_write_memory (int nchan, void *buf, int pos, int size);
17 void DMA_hold_DREQ (int nchan);
18 void DMA_release_DREQ (int nchan);
19 void DMA_schedule(int nchan);
20 void DMA_run (void);
21 void DMA_init (int high_page_enable);
22 void DMA_register_channel (int nchan,
23 DMA_transfer_handler transfer_handler,
24 void *opaque);