hw/pc_piix.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "pc.h"
  27 #include "apic.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "net.h"
  32 #include "boards.h"
  33 #include "ide.h"
  34 #include "kvm.h"
  35 #include "kvmclock.h"
  36 #include "sysemu.h"
  37 #include "sysbus.h"
  38 #include "arch_init.h"
  39 #include "blockdev.h"
  40 #include "smbus.h"
  41
  42 qemu_irq *ioapic_irq_hack;
  43
  44 #define MAX_IDE_BUS 2
  45
  46 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  47 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  48 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  49
  50 const char *global_cpu_model; /* cpu hotadd */
  51
  52 static void ioapic_init(IsaIrqState *isa_irq_state)
  53 {
  54     DeviceState *dev;
  55     SysBusDevice *d;
  56     unsigned int i;
  57
  58     dev = qdev_create(NULL, "ioapic");
  59     qdev_init_nofail(dev);
  60     d = sysbus_from_qdev(dev);
  61     sysbus_mmio_map(d, 0, 0xfec00000);
  62
  63     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  64         isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
  65     }
  66 }
  67
  68 /* PC hardware initialisation */
  69 static void pc_init1(ram_addr_t ram_size,
  70                      const char *boot_device,
  71                      const char *kernel_filename,
  72                      const char *kernel_cmdline,
  73                      const char *initrd_filename,
  74                      const char *cpu_model,
  75                      int pci_enabled,
  76                      int kvmclock_enabled)
  77 {
  78     int i;
  79     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  80     PCIBus *pci_bus;
  81     PCII440FXState *i440fx_state;
  82     int piix3_devfn = -1;
  83     qemu_irq *cpu_irq;
  84     qemu_irq *isa_irq;
  85     qemu_irq *i8259;
  86     qemu_irq *cmos_s3;
  87     qemu_irq *smi_irq;
  88     IsaIrqState *isa_irq_state;
  89     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  90     BusState *idebus[MAX_IDE_BUS];
  91     ISADevice *rtc_state;
  92
  93     global_cpu_model = cpu_model;
  94
  95     pc_cpus_init(cpu_model);
  96
  97     if (kvmclock_enabled) {
  98         kvmclock_create();
  99     }
 100
 101     /* allocate ram and load rom/bios */
 102     pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
 103                    &below_4g_mem_size, &above_4g_mem_size);
 104
 105     cpu_irq = pc_allocate_cpu_irq();
 106 #ifdef KVM_CAP_IRQCHIP
 107     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
 108         isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
 109         if (pci_enabled) {
 110             ioapic_init(isa_irq_state);
 111         }
 112         isa_irq = i8259 = kvm_i8259_init(cpu_irq[0]);
 113         ioapic_irq_hack = isa_irq;
 114     } else
 115 #endif
 116     {
 117         i8259 = i8259_init(cpu_irq[0]);
 118         isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
 119         isa_irq_state->i8259 = i8259;
 120         if (pci_enabled) {
 121             ioapic_init(isa_irq_state);
 122         }
 123         isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 124     }
 125
 126     if (pci_enabled) {
 127         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
 128     } else {
 129         pci_bus = NULL;
 130         i440fx_state = NULL;
 131         isa_bus_new(NULL);
 132     }
 133     isa_bus_irqs(isa_irq);
 134
 135     pc_register_ferr_irq(isa_get_irq(13));
 136
 137     pc_vga_init(pci_enabled? pci_bus: NULL);
 138
 139     /* init basic PC hardware */
 140     pc_basic_device_init(isa_irq, &rtc_state);
 141
 142     for(i = 0; i < nb_nics; i++) {
 143         NICInfo *nd = &nd_table[i];
 144
 145         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
 146             pc_init_ne2k_isa(nd);
 147         else
 148             pci_nic_init_nofail(nd, "rtl8139", NULL);
 149     }
 150
 151     ide_drive_get(hd, MAX_IDE_BUS);
 152     if (pci_enabled) {
 153         PCIDevice *dev;
 154         dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
 155         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
 156         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
 157     } else {
 158         for(i = 0; i < MAX_IDE_BUS; i++) {
 159             ISADevice *dev;
 160             dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 161                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 162             idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
 163         }
 164     }
 165
 166     audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
 167
 168     pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
 169                  idebus[0], idebus[1], rtc_state);
 170
 171     if (pci_enabled && usb_enabled) {
 172         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 173     }
 174
 175     if (pci_enabled && acpi_enabled) {
 176         i2c_bus *smbus;
 177
 178         cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
 179         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
 180         /* TODO: Populate SPD eeprom data.  */
 181         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
 182                               isa_get_irq(9), *cmos_s3, *smi_irq,
 183                               kvm_enabled());
 184         smbus_eeprom_init(smbus, 8, NULL, 0);
 185     }
 186
 187     if (i440fx_state) {
 188         i440fx_init_memory_mappings(i440fx_state);
 189     }
 190
 191     if (pci_enabled) {
 192         pc_pci_device_init(pci_bus);
 193     }
 194 }
 195
 196 static void pc_init_pci(ram_addr_t ram_size,
 197                         const char *boot_device,
 198                         const char *kernel_filename,
 199                         const char *kernel_cmdline,
 200                         const char *initrd_filename,
 201                         const char *cpu_model)
 202 {
 203     pc_init1(ram_size, boot_device,
 204              kernel_filename, kernel_cmdline,
 205              initrd_filename, cpu_model, 1, 1);
 206 }
 207
 208 static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
 209                                     const char *boot_device,
 210                                     const char *kernel_filename,
 211                                     const char *kernel_cmdline,
 212                                     const char *initrd_filename,
 213                                     const char *cpu_model)
 214 {
 215     pc_init1(ram_size, boot_device,
 216              kernel_filename, kernel_cmdline,
 217              initrd_filename, cpu_model, 1, 0);
 218 }
 219
 220 static void pc_init_isa(ram_addr_t ram_size,
 221                         const char *boot_device,
 222                         const char *kernel_filename,
 223                         const char *kernel_cmdline,
 224                         const char *initrd_filename,
 225                         const char *cpu_model)
 226 {
 227     if (cpu_model == NULL)
 228         cpu_model = "486";
 229     pc_init1(ram_size, boot_device,
 230              kernel_filename, kernel_cmdline,
 231              initrd_filename, cpu_model, 0, 1);
 232 }
 233
 234 static QEMUMachine pc_machine = {
 235     .name = "pc-0.14",
 236     .alias = "pc",
 237     .desc = "Standard PC",
 238     .init = pc_init_pci,
 239     .max_cpus = 255,
 240     .is_default = 1,
 241 };
 242
 243 static QEMUMachine pc_machine_v0_13 = {
 244     .name = "pc-0.13",
 245     .desc = "Standard PC",
 246     .init = pc_init_pci_no_kvmclock,
 247     .max_cpus = 255,
 248     .compat_props = (GlobalProperty[]) {
 249         {
 250             .driver   = "virtio-9p-pci",
 251             .property = "vectors",
 252             .value    = stringify(0),
 253         },{
 254             .driver   = "VGA",
 255             .property = "rombar",
 256             .value    = stringify(0),
 257         },{
 258             .driver   = "vmware-svga",
 259             .property = "rombar",
 260             .value    = stringify(0),
 261         },{
 262             .driver   = "PCI",
 263             .property = "command_serr_enable",
 264             .value    = "off",
 265         },
 266         { /* end of list */ }
 267     },
 268 };
 269
 270 static QEMUMachine pc_machine_v0_12 = {
 271     .name = "pc-0.12",
 272     .desc = "Standard PC",
 273     .init = pc_init_pci_no_kvmclock,
 274     .max_cpus = 255,
 275     .compat_props = (GlobalProperty[]) {
 276         {
 277             .driver   = "virtio-serial-pci",
 278             .property = "max_ports",
 279             .value    = stringify(1),
 280         },{
 281             .driver   = "virtio-serial-pci",
 282             .property = "vectors",
 283             .value    = stringify(0),
 284         },{
 285             .driver   = "VGA",
 286             .property = "rombar",
 287             .value    = stringify(0),
 288         },{
 289             .driver   = "vmware-svga",
 290             .property = "rombar",
 291             .value    = stringify(0),
 292         },{
 293             .driver   = "PCI",
 294             .property = "command_serr_enable",
 295             .value    = "off",
 296         },
 297         { /* end of list */ }
 298     }
 299 };
 300
 301 static QEMUMachine pc_machine_v0_11 = {
 302     .name = "pc-0.11",
 303     .desc = "Standard PC, qemu 0.11",
 304     .init = pc_init_pci_no_kvmclock,
 305     .max_cpus = 255,
 306     .compat_props = (GlobalProperty[]) {
 307         {
 308             .driver   = "virtio-blk-pci",
 309             .property = "vectors",
 310             .value    = stringify(0),
 311         },{
 312             .driver   = "virtio-serial-pci",
 313             .property = "max_ports",
 314             .value    = stringify(1),
 315         },{
 316             .driver   = "virtio-serial-pci",
 317             .property = "vectors",
 318             .value    = stringify(0),
 319         },{
 320             .driver   = "ide-drive",
 321             .property = "ver",
 322             .value    = "0.11",
 323         },{
 324             .driver   = "scsi-disk",
 325             .property = "ver",
 326             .value    = "0.11",
 327         },{
 328             .driver   = "PCI",
 329             .property = "rombar",
 330             .value    = stringify(0),
 331         },{
 332             .driver   = "PCI",
 333             .property = "command_serr_enable",
 334             .value    = "off",
 335         },
 336         { /* end of list */ }
 337     }
 338 };
 339
 340 static QEMUMachine pc_machine_v0_10 = {
 341     .name = "pc-0.10",
 342     .desc = "Standard PC, qemu 0.10",
 343     .init = pc_init_pci_no_kvmclock,
 344     .max_cpus = 255,
 345     .compat_props = (GlobalProperty[]) {
 346         {
 347             .driver   = "virtio-blk-pci",
 348             .property = "class",
 349             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
 350         },{
 351             .driver   = "virtio-serial-pci",
 352             .property = "class",
 353             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
 354         },{
 355             .driver   = "virtio-serial-pci",
 356             .property = "max_ports",
 357             .value    = stringify(1),
 358         },{
 359             .driver   = "virtio-serial-pci",
 360             .property = "vectors",
 361             .value    = stringify(0),
 362         },{
 363             .driver   = "virtio-net-pci",
 364             .property = "vectors",
 365             .value    = stringify(0),
 366         },{
 367             .driver   = "virtio-blk-pci",
 368             .property = "vectors",
 369             .value    = stringify(0),
 370         },{
 371             .driver   = "ide-drive",
 372             .property = "ver",
 373             .value    = "0.10",
 374         },{
 375             .driver   = "scsi-disk",
 376             .property = "ver",
 377             .value    = "0.10",
 378         },{
 379             .driver   = "PCI",
 380             .property = "rombar",
 381             .value    = stringify(0),
 382         },{
 383             .driver   = "PCI",
 384             .property = "command_serr_enable",
 385             .value    = "off",
 386         },
 387         { /* end of list */ }
 388     },
 389 };
 390
 391 static QEMUMachine isapc_machine = {
 392     .name = "isapc",
 393     .desc = "ISA-only PC",
 394     .init = pc_init_isa,
 395     .max_cpus = 1,
 396 };
 397
 398 static void pc_machine_init(void)
 399 {
 400     qemu_register_machine(&pc_machine);
 401     qemu_register_machine(&pc_machine_v0_13);
 402     qemu_register_machine(&pc_machine_v0_12);
 403     qemu_register_machine(&pc_machine_v0_11);
 404     qemu_register_machine(&pc_machine_v0_10);
 405     qemu_register_machine(&isapc_machine);
 406 }
 407
 408 machine_init(pc_machine_init);