hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5 #include "ioport.h"
   6 #include "isa.h"
   7 #include "fdc.h"
   8 #include "net.h"
   9
  10 /* PC-style peripherals (also used by other machines).  */
  11
  12 /* serial.c */
  13
  14 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  15                          CharDriverState *chr);
  16 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
  17                              qemu_irq irq, int baudbase,
  18                              CharDriverState *chr, int ioregister,
  19                              int be);
  20 static inline bool serial_isa_init(int index, CharDriverState *chr)
  21 {
  22     ISADevice *dev;
  23
  24     dev = isa_try_create("isa-serial");
  25     if (!dev) {
  26         return false;
  27     }
  28     qdev_prop_set_uint32(&dev->qdev, "index", index);
  29     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  30     if (qdev_init(&dev->qdev) < 0) {
  31         return false;
  32     }
  33     return true;
  34 }
  35
  36 void serial_set_frequency(SerialState *s, uint32_t frequency);
  37
  38 /* parallel.c */
  39 static inline bool parallel_init(int index, CharDriverState *chr)
  40 {
  41     ISADevice *dev;
  42
  43     dev = isa_try_create("isa-parallel");
  44     if (!dev) {
  45         return false;
  46     }
  47     qdev_prop_set_uint32(&dev->qdev, "index", index);
  48     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  49     if (qdev_init(&dev->qdev) < 0) {
  50         return false;
  51     }
  52     return true;
  53 }
  54
  55 bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
  56                       CharDriverState *chr);
  57
  58 /* i8259.c */
  59
  60 typedef struct PicState2 PicState2;
  61 extern PicState2 *isa_pic;
  62 void pic_set_irq(int irq, int level);
  63 void pic_set_irq_new(void *opaque, int irq, int level);
  64 qemu_irq *i8259_init(qemu_irq parent_irq);
  65 qemu_irq *kvm_i8259_init(qemu_irq parent_irq);
  66 int pic_read_irq(PicState2 *s);
  67 void pic_update_irq(PicState2 *s);
  68 uint32_t pic_intack_read(PicState2 *s);
  69 void pic_info(Monitor *mon);
  70 void irq_info(Monitor *mon);
  71
  72 /* ISA */
  73 #define IOAPIC_NUM_PINS 0x18
  74
  75 typedef struct isa_irq_state {
  76     qemu_irq *i8259;
  77     qemu_irq ioapic[IOAPIC_NUM_PINS];
  78 } IsaIrqState;
  79
  80 void isa_irq_handler(void *opaque, int n, int level);
  81
  82 /* i8254.c */
  83
  84 #define PIT_FREQ 1193182
  85
  86 static inline ISADevice *pit_init(int base, int irq)
  87 {
  88     ISADevice *dev;
  89
  90     dev = isa_create("isa-pit");
  91     qdev_prop_set_uint32(&dev->qdev, "iobase", base);
  92     qdev_prop_set_uint32(&dev->qdev, "irq", irq);
  93     qdev_init_nofail(&dev->qdev);
  94
  95     return dev;
  96 }
  97
  98 void pit_set_gate(ISADevice *dev, int channel, int val);
  99 int pit_get_gate(ISADevice *dev, int channel);
 100 int pit_get_initial_count(ISADevice *dev, int channel);
 101 int pit_get_mode(ISADevice *dev, int channel);
 102 int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
 103
 104 void hpet_pit_disable(void);
 105 void hpet_pit_enable(void);
 106
 107 /* vmport.c */
 108 static inline void vmport_init(void)
 109 {
 110     isa_create_simple("vmport");
 111 }
 112 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
 113 void vmmouse_get_data(uint32_t *data);
 114 void vmmouse_set_data(const uint32_t *data);
 115
 116 /* pckbd.c */
 117
 118 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
 119 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 120                    target_phys_addr_t base, ram_addr_t size,
 121                    target_phys_addr_t mask);
 122 void i8042_isa_mouse_fake_event(void *opaque);
 123 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
 124
 125 /* pc.c */
 126 extern int fd_bootchk;
 127
 128 void pc_register_ferr_irq(qemu_irq irq);
 129 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
 130 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 131
 132 void pc_cpus_init(const char *cpu_model);
 133 void pc_memory_init(ram_addr_t ram_size,
 134                     const char *kernel_filename,
 135                     const char *kernel_cmdline,
 136                     const char *initrd_filename,
 137                     ram_addr_t *below_4g_mem_size_p,
 138                     ram_addr_t *above_4g_mem_size_p);
 139 qemu_irq *pc_allocate_cpu_irq(void);
 140 void pc_vga_init(PCIBus *pci_bus);
 141 void pc_basic_device_init(qemu_irq *isa_irq,
 142                           ISADevice **rtc_state);
 143 void pc_init_ne2k_isa(NICInfo *nd);
 144 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 145                   const char *boot_device,
 146                   BusState *ide0, BusState *ide1,
 147                   ISADevice *s);
 148 void pc_pci_device_init(PCIBus *pci_bus);
 149
 150 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 151 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 152
 153 /* acpi.c */
 154 extern int acpi_enabled;
 155 extern char *acpi_tables;
 156 extern size_t acpi_tables_len;
 157
 158 void acpi_bios_init(void);
 159 int acpi_table_add(const char *table_desc);
 160
 161 /* acpi_piix.c */
 162
 163 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 164                        qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
 165                        int kvm_enabled);
 166 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 167
 168 /* hpet.c */
 169 extern int no_hpet;
 170
 171 /* pcspk.c */
 172 void pcspk_init(ISADevice *pit);
 173 int pcspk_audio_init(qemu_irq *pic);
 174
 175 /* piix_pci.c */
 176 /* config space register for IRQ routing */
 177 #define PIIX_CONFIG_IRQ_ROUTE 0x60
 178
 179 struct PCII440FXState;
 180 typedef struct PCII440FXState PCII440FXState;
 181
 182 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
 183 void i440fx_init_memory_mappings(PCII440FXState *d);
 184
 185 /* piix4.c */
 186 extern PCIDevice *piix4_dev;
 187 int piix4_init(PCIBus *bus, int devfn);
 188
 189 int piix_get_irq(int pin);
 190
 191 int ipf_map_irq(PCIDevice *pci_dev, int irq_num);
 192
 193 /* vga.c */
 194 enum vga_retrace_method {
 195     VGA_RETRACE_DUMB,
 196     VGA_RETRACE_PRECISE
 197 };
 198
 199 extern enum vga_retrace_method vga_retrace_method;
 200
 201 static inline int isa_vga_init(void)
 202 {
 203     ISADevice *dev;
 204
 205     dev = isa_try_create("isa-vga");
 206     if (!dev) {
 207         fprintf(stderr, "Warning: isa-vga not available\n");
 208         return 0;
 209     }
 210     qdev_init_nofail(&dev->qdev);
 211     return 1;
 212 }
 213
 214 int pci_vga_init(PCIBus *bus);
 215 int isa_vga_mm_init(target_phys_addr_t vram_base,
 216                     target_phys_addr_t ctrl_base, int it_shift);
 217
 218 /* cirrus_vga.c */
 219 void pci_cirrus_vga_init(PCIBus *bus);
 220 void isa_cirrus_vga_init(void);
 221
 222 /* ne2000.c */
 223 static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
 224 {
 225     ISADevice *dev;
 226
 227     qemu_check_nic_model(nd, "ne2k_isa");
 228
 229     dev = isa_try_create("ne2k_isa");
 230     if (!dev) {
 231         return false;
 232     }
 233     qdev_prop_set_uint32(&dev->qdev, "iobase", base);
 234     qdev_prop_set_uint32(&dev->qdev, "irq",    irq);
 235     qdev_set_nic_properties(&dev->qdev, nd);
 236     qdev_init_nofail(&dev->qdev);
 237     return true;
 238 }
 239
 240 /* extboot.c */
 241
 242 void extboot_init(BlockDriverState *bs);
 243
 244 /* e820 types */
 245 #define E820_RAM        1
 246 #define E820_RESERVED   2
 247 #define E820_ACPI       3
 248 #define E820_NVS        4
 249 #define E820_UNUSABLE   5
 250
 251 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 252
 253 #endif