target-i386/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "hw/pc.h"
   4 #include "hw/isa.h"
   5
   6 #include "exec-all.h"
   7 #include "kvm.h"
   8
   9 static const VMStateDescription vmstate_segment = {
  10     .name = "segment",
  11     .version_id = 1,
  12     .minimum_version_id = 1,
  13     .minimum_version_id_old = 1,
  14     .fields      = (VMStateField []) {
  15         VMSTATE_UINT32(selector, SegmentCache),
  16         VMSTATE_UINTTL(base, SegmentCache),
  17         VMSTATE_UINT32(limit, SegmentCache),
  18         VMSTATE_UINT32(flags, SegmentCache),
  19         VMSTATE_END_OF_LIST()
  20     }
  21 };
  22
  23 #define VMSTATE_SEGMENT(_field, _state) {                            \
  24     .name       = (stringify(_field)),                               \
  25     .size       = sizeof(SegmentCache),                              \
  26     .vmsd       = &vmstate_segment,                                  \
  27     .flags      = VMS_STRUCT,                                        \
  28     .offset     = offsetof(_state, _field)                           \
  29             + type_check(SegmentCache,typeof_field(_state, _field))  \
  30 }
  31
  32 #define VMSTATE_SEGMENT_ARRAY(_field, _state, _n)                    \
  33     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
  34
  35 static const VMStateDescription vmstate_xmm_reg = {
  36     .name = "xmm_reg",
  37     .version_id = 1,
  38     .minimum_version_id = 1,
  39     .minimum_version_id_old = 1,
  40     .fields      = (VMStateField []) {
  41         VMSTATE_UINT64(XMM_Q(0), XMMReg),
  42         VMSTATE_UINT64(XMM_Q(1), XMMReg),
  43         VMSTATE_END_OF_LIST()
  44     }
  45 };
  46
  47 #define VMSTATE_XMM_REGS(_field, _state, _n)                         \
  48     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
  49
  50 /* YMMH format is the same as XMM */
  51 static const VMStateDescription vmstate_ymmh_reg = {
  52     .name = "ymmh_reg",
  53     .version_id = 1,
  54     .minimum_version_id = 1,
  55     .minimum_version_id_old = 1,
  56     .fields      = (VMStateField []) {
  57         VMSTATE_UINT64(XMM_Q(0), XMMReg),
  58         VMSTATE_UINT64(XMM_Q(1), XMMReg),
  59         VMSTATE_END_OF_LIST()
  60     }
  61 };
  62
  63 #define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v)                         \
  64     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
  65
  66 static const VMStateDescription vmstate_mtrr_var = {
  67     .name = "mtrr_var",
  68     .version_id = 1,
  69     .minimum_version_id = 1,
  70     .minimum_version_id_old = 1,
  71     .fields      = (VMStateField []) {
  72         VMSTATE_UINT64(base, MTRRVar),
  73         VMSTATE_UINT64(mask, MTRRVar),
  74         VMSTATE_END_OF_LIST()
  75     }
  76 };
  77
  78 #define VMSTATE_MTRR_VARS(_field, _state, _n, _v)                    \
  79     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
  80
  81 static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size)
  82 {
  83     fprintf(stderr, "call put_fpreg() with invalid arguments\n");
  84     exit(0);
  85 }
  86
  87 #ifdef USE_X86LDOUBLE
  88 /* XXX: add that in a FPU generic layer */
  89 union x86_longdouble {
  90     uint64_t mant;
  91     uint16_t exp;
  92 };
  93
  94 #define MANTD1(fp)      (fp & ((1LL << 52) - 1))
  95 #define EXPBIAS1 1023
  96 #define EXPD1(fp)       ((fp >> 52) & 0x7FF)
  97 #define SIGND1(fp)      ((fp >> 32) & 0x80000000)
  98
  99 static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
 100 {
 101     int e;
 102     /* mantissa */
 103     p->mant = (MANTD1(temp) << 11) | (1LL << 63);
 104     /* exponent + sign */
 105     e = EXPD1(temp) - EXPBIAS1 + 16383;
 106     e |= SIGND1(temp) >> 16;
 107     p->exp = e;
 108 }
 109
 110 static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
 111 {
 112     FPReg *fp_reg = opaque;
 113     uint64_t mant;
 114     uint16_t exp;
 115
 116     qemu_get_be64s(f, &mant);
 117     qemu_get_be16s(f, &exp);
 118     fp_reg->d = cpu_set_fp80(mant, exp);
 119     return 0;
 120 }
 121
 122 static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
 123 {
 124     FPReg *fp_reg = opaque;
 125     uint64_t mant;
 126     uint16_t exp;
 127     /* we save the real CPU data (in case of MMX usage only 'mant'
 128        contains the MMX register */
 129     cpu_get_fp80(&mant, &exp, fp_reg->d);
 130     qemu_put_be64s(f, &mant);
 131     qemu_put_be16s(f, &exp);
 132 }
 133
 134 static const VMStateInfo vmstate_fpreg = {
 135     .name = "fpreg",
 136     .get  = get_fpreg,
 137     .put  = put_fpreg,
 138 };
 139
 140 static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size)
 141 {
 142     union x86_longdouble *p = opaque;
 143     uint64_t mant;
 144
 145     qemu_get_be64s(f, &mant);
 146     p->mant = mant;
 147     p->exp = 0xffff;
 148     return 0;
 149 }
 150
 151 static const VMStateInfo vmstate_fpreg_1_mmx = {
 152     .name = "fpreg_1_mmx",
 153     .get  = get_fpreg_1_mmx,
 154     .put  = put_fpreg_error,
 155 };
 156
 157 static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size)
 158 {
 159     union x86_longdouble *p = opaque;
 160     uint64_t mant;
 161
 162     qemu_get_be64s(f, &mant);
 163     fp64_to_fp80(p, mant);
 164     return 0;
 165 }
 166
 167 static const VMStateInfo vmstate_fpreg_1_no_mmx = {
 168     .name = "fpreg_1_no_mmx",
 169     .get  = get_fpreg_1_no_mmx,
 170     .put  = put_fpreg_error,
 171 };
 172
 173 static bool fpregs_is_0(void *opaque, int version_id)
 174 {
 175     CPUState *env = opaque;
 176
 177     return (env->fpregs_format_vmstate == 0);
 178 }
 179
 180 static bool fpregs_is_1_mmx(void *opaque, int version_id)
 181 {
 182     CPUState *env = opaque;
 183     int guess_mmx;
 184
 185     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 186                  (env->fpus_vmstate & 0x3800) == 0);
 187     return (guess_mmx && (env->fpregs_format_vmstate == 1));
 188 }
 189
 190 static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
 191 {
 192     CPUState *env = opaque;
 193     int guess_mmx;
 194
 195     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 196                  (env->fpus_vmstate & 0x3800) == 0);
 197     return (!guess_mmx && (env->fpregs_format_vmstate == 1));
 198 }
 199
 200 #define VMSTATE_FP_REGS(_field, _state, _n)                               \
 201     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
 202     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
 203     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
 204
 205 #else
 206 static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
 207 {
 208     FPReg *fp_reg = opaque;
 209
 210     qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
 211     return 0;
 212 }
 213
 214 static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
 215 {
 216     FPReg *fp_reg = opaque;
 217     /* if we use doubles for float emulation, we save the doubles to
 218        avoid losing information in case of MMX usage. It can give
 219        problems if the image is restored on a CPU where long
 220        doubles are used instead. */
 221     qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
 222 }
 223
 224 const VMStateInfo vmstate_fpreg = {
 225     .name = "fpreg",
 226     .get  = get_fpreg,
 227     .put  = put_fpreg,
 228 };
 229
 230 static int get_fpreg_0_mmx(QEMUFile *f, void *opaque, size_t size)
 231 {
 232     FPReg *fp_reg = opaque;
 233     uint64_t mant;
 234     uint16_t exp;
 235
 236     qemu_get_be64s(f, &mant);
 237     qemu_get_be16s(f, &exp);
 238     fp_reg->mmx.MMX_Q(0) = mant;
 239     return 0;
 240 }
 241
 242 const VMStateInfo vmstate_fpreg_0_mmx = {
 243     .name = "fpreg_0_mmx",
 244     .get  = get_fpreg_0_mmx,
 245     .put  = put_fpreg_error,
 246 };
 247
 248 static int get_fpreg_0_no_mmx(QEMUFile *f, void *opaque, size_t size)
 249 {
 250     FPReg *fp_reg = opaque;
 251     uint64_t mant;
 252     uint16_t exp;
 253
 254     qemu_get_be64s(f, &mant);
 255     qemu_get_be16s(f, &exp);
 256
 257     fp_reg->d = cpu_set_fp80(mant, exp);
 258     return 0;
 259 }
 260
 261 const VMStateInfo vmstate_fpreg_0_no_mmx = {
 262     .name = "fpreg_0_no_mmx",
 263     .get  = get_fpreg_0_no_mmx,
 264     .put  = put_fpreg_error,
 265 };
 266
 267 static bool fpregs_is_1(void *opaque, int version_id)
 268 {
 269     CPUState *env = opaque;
 270
 271     return env->fpregs_format_vmstate == 1;
 272 }
 273
 274 static bool fpregs_is_0_mmx(void *opaque, int version_id)
 275 {
 276     CPUState *env = opaque;
 277     int guess_mmx;
 278
 279     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 280                  (env->fpus_vmstate & 0x3800) == 0);
 281     return guess_mmx && env->fpregs_format_vmstate == 0;
 282 }
 283
 284 static bool fpregs_is_0_no_mmx(void *opaque, int version_id)
 285 {
 286     CPUState *env = opaque;
 287     int guess_mmx;
 288
 289     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 290                  (env->fpus_vmstate & 0x3800) == 0);
 291     return !guess_mmx && env->fpregs_format_vmstate == 0;
 292 }
 293
 294 #define VMSTATE_FP_REGS(_field, _state, _n)                               \
 295     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \
 296     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \
 297     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)
 298
 299 #endif /* USE_X86LDOUBLE */
 300
 301 static bool version_is_5(void *opaque, int version_id)
 302 {
 303     return version_id == 5;
 304 }
 305
 306 #ifdef TARGET_X86_64
 307 static bool less_than_7(void *opaque, int version_id)
 308 {
 309     return version_id < 7;
 310 }
 311
 312 static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
 313 {
 314     uint64_t *v = pv;
 315     *v = qemu_get_be32(f);
 316     return 0;
 317 }
 318
 319 static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
 320 {
 321     uint64_t *v = pv;
 322     qemu_put_be32(f, *v);
 323 }
 324
 325 static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
 326     .name = "uint64_as_uint32",
 327     .get  = get_uint64_as_uint32,
 328     .put  = put_uint64_as_uint32,
 329 };
 330
 331 #define VMSTATE_HACK_UINT32(_f, _s, _t)                                  \
 332     VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
 333 #endif
 334
 335 static void cpu_pre_save(void *opaque)
 336 {
 337     CPUState *env = opaque;
 338     int i;
 339
 340     /* FPU */
 341     env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 342     env->fptag_vmstate = 0;
 343     for(i = 0; i < 8; i++) {
 344         env->fptag_vmstate |= ((!env->fptags[i]) << i);
 345     }
 346
 347 #ifdef USE_X86LDOUBLE
 348     env->fpregs_format_vmstate = 0;
 349 #else
 350     env->fpregs_format_vmstate = 1;
 351 #endif
 352 }
 353
 354 static int cpu_post_load(void *opaque, int version_id)
 355 {
 356     CPUState *env = opaque;
 357     int i;
 358
 359     /* XXX: restore FPU round state */
 360     env->fpstt = (env->fpus_vmstate >> 11) & 7;
 361     env->fpus = env->fpus_vmstate & ~0x3800;
 362     env->fptag_vmstate ^= 0xff;
 363     for(i = 0; i < 8; i++) {
 364         env->fptags[i] = (env->fptag_vmstate >> i) & 1;
 365     }
 366
 367     cpu_breakpoint_remove_all(env, BP_CPU);
 368     cpu_watchpoint_remove_all(env, BP_CPU);
 369     for (i = 0; i < 4; i++)
 370         hw_breakpoint_insert(env, i);
 371
 372     tlb_flush(env, 1);
 373     return 0;
 374 }
 375
 376 static bool async_pf_msr_needed(void *opaque)
 377 {
 378     CPUState *cpu = opaque;
 379
 380     return cpu->async_pf_en_msr != 0;
 381 }
 382
 383 static const VMStateDescription vmstate_async_pf_msr = {
 384     .name = "cpu/async_pf_msr",
 385     .version_id = 1,
 386     .minimum_version_id = 1,
 387     .minimum_version_id_old = 1,
 388     .fields      = (VMStateField []) {
 389         VMSTATE_UINT64(async_pf_en_msr, CPUState),
 390         VMSTATE_END_OF_LIST()
 391     }
 392 };
 393
 394 static const VMStateDescription vmstate_cpu = {
 395     .name = "cpu",
 396     .version_id = CPU_SAVE_VERSION,
 397     .minimum_version_id = 3,
 398     .minimum_version_id_old = 3,
 399     .pre_save = cpu_pre_save,
 400     .post_load = cpu_post_load,
 401     .fields      = (VMStateField []) {
 402         VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
 403         VMSTATE_UINTTL(eip, CPUState),
 404         VMSTATE_UINTTL(eflags, CPUState),
 405         VMSTATE_UINT32(hflags, CPUState),
 406         /* FPU */
 407         VMSTATE_UINT16(fpuc, CPUState),
 408         VMSTATE_UINT16(fpus_vmstate, CPUState),
 409         VMSTATE_UINT16(fptag_vmstate, CPUState),
 410         VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
 411         VMSTATE_FP_REGS(fpregs, CPUState, 8),
 412
 413         VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
 414         VMSTATE_SEGMENT(ldt, CPUState),
 415         VMSTATE_SEGMENT(tr, CPUState),
 416         VMSTATE_SEGMENT(gdt, CPUState),
 417         VMSTATE_SEGMENT(idt, CPUState),
 418
 419         VMSTATE_UINT32(sysenter_cs, CPUState),
 420 #ifdef TARGET_X86_64
 421         /* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
 422         VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
 423         VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
 424         VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
 425         VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
 426 #else
 427         VMSTATE_UINTTL(sysenter_esp, CPUState),
 428         VMSTATE_UINTTL(sysenter_eip, CPUState),
 429 #endif
 430
 431         VMSTATE_UINTTL(cr[0], CPUState),
 432         VMSTATE_UINTTL(cr[2], CPUState),
 433         VMSTATE_UINTTL(cr[3], CPUState),
 434         VMSTATE_UINTTL(cr[4], CPUState),
 435         VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
 436         /* MMU */
 437         VMSTATE_INT32(a20_mask, CPUState),
 438         /* XMM */
 439         VMSTATE_UINT32(mxcsr, CPUState),
 440         VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),
 441
 442 #ifdef TARGET_X86_64
 443         VMSTATE_UINT64(efer, CPUState),
 444         VMSTATE_UINT64(star, CPUState),
 445         VMSTATE_UINT64(lstar, CPUState),
 446         VMSTATE_UINT64(cstar, CPUState),
 447         VMSTATE_UINT64(fmask, CPUState),
 448         VMSTATE_UINT64(kernelgsbase, CPUState),
 449 #endif
 450         VMSTATE_UINT32_V(smbase, CPUState, 4),
 451
 452         VMSTATE_UINT64_V(pat, CPUState, 5),
 453         VMSTATE_UINT32_V(hflags2, CPUState, 5),
 454
 455         VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
 456         VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
 457         VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
 458         VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
 459         VMSTATE_UINT64_V(intercept, CPUState, 5),
 460         VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
 461         VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
 462         VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
 463         VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
 464         VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
 465         VMSTATE_UINT8_V(v_tpr, CPUState, 5),
 466         /* MTRRs */
 467         VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
 468         VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
 469         VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
 470         /* KVM-related states */
 471         VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
 472         VMSTATE_UINT32_V(mp_state, CPUState, 9),
 473         VMSTATE_UINT64_V(tsc, CPUState, 9),
 474         VMSTATE_INT32_V(exception_injected, CPUState, 11),
 475         VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
 476         VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
 477         VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
 478         VMSTATE_UINT8_V(has_error_code, CPUState, 11),
 479         VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
 480         /* MCE */
 481         VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
 482         VMSTATE_UINT64_V(mcg_status, CPUState, 10),
 483         VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
 484         VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
 485         /* rdtscp */
 486         VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
 487         /* KVM pvclock msr */
 488         VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
 489         VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
 490
 491         /* XSAVE related fields */
 492         VMSTATE_UINT64_V(xcr0, CPUState, 12),
 493         VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
 494         VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
 495         VMSTATE_END_OF_LIST()
 496         /* The above list is not sorted /wrt version numbers, watch out! */
 497     },
 498     .subsections = (VMStateSubsection []) {
 499         {
 500             .vmsd = &vmstate_async_pf_msr,
 501             .needed = async_pf_msr_needed,
 502         } , {
 503             /* empty */
 504         }
 505     }
 506 };
 507
 508 void cpu_save(QEMUFile *f, void *opaque)
 509 {
 510     vmstate_save_state(f, &vmstate_cpu, opaque);
 511 }
 512
 513 int cpu_load(QEMUFile *f, void *opaque, int version_id)
 514 {
 515     return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
 516 }