qemu-kvm-x86.c

   1 /*
   2  * qemu/kvm integration, x86 specific code
   3  *
   4  * Copyright (C) 2006-2008 Qumranet Technologies
   5  *
   6  * Licensed under the terms of the GNU GPL version 2 or higher.
   7  */
   8
   9 #include "config.h"
  10 #include "config-host.h"
  11
  12 #include <string.h>
  13 #include "hw/hw.h"
  14 #include "gdbstub.h"
  15 #include <sys/io.h>
  16
  17 #include "qemu-kvm.h"
  18 #include <pthread.h>
  19 #include <sys/utsname.h>
  20 #include <linux/kvm_para.h>
  21 #include <sys/ioctl.h>
  22
  23 #include "kvm.h"
  24 #include "hw/apic.h"
  25
  26 static int kvm_create_pit(kvm_context_t kvm)
  27 {
  28 #ifdef KVM_CAP_PIT
  29     int r;
  30
  31     if (kvm_pit_in_kernel()) {
  32         r = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT);
  33         if (r < 0) {
  34             fprintf(stderr, "Create kernel PIC irqchip failed\n");
  35             return r;
  36         }
  37         if (!kvm_pit_reinject) {
  38             r = kvm_reinject_control(kvm_context, 0);
  39             if (r < 0) {
  40                 fprintf(stderr,
  41                         "failure to disable in-kernel PIT reinjection\n");
  42                 return r;
  43             }
  44         }
  45     }
  46 #endif
  47     return 0;
  48 }
  49
  50 #ifdef KVM_EXIT_TPR_ACCESS
  51
  52 static int kvm_handle_tpr_access(CPUState *env)
  53 {
  54     struct kvm_run *run = env->kvm_run;
  55     kvm_tpr_access_report(env,
  56                           run->tpr_access.rip,
  57                           run->tpr_access.is_write);
  58     return 0;
  59 }
  60
  61
  62 int kvm_enable_vapic(CPUState *env, uint64_t vapic)
  63 {
  64     struct kvm_vapic_addr va = {
  65         .vapic_addr = vapic,
  66     };
  67
  68     return kvm_vcpu_ioctl(env, KVM_SET_VAPIC_ADDR, &va);
  69 }
  70
  71 #endif
  72
  73 extern CPUState *kvm_debug_cpu_requested;
  74
  75 int kvm_arch_run(CPUState *env)
  76 {
  77     int r = 0;
  78     struct kvm_run *run = env->kvm_run;
  79
  80     switch (run->exit_reason) {
  81 #ifdef KVM_EXIT_SET_TPR
  82     case KVM_EXIT_SET_TPR:
  83         break;
  84 #endif
  85 #ifdef KVM_EXIT_TPR_ACCESS
  86     case KVM_EXIT_TPR_ACCESS:
  87         r = kvm_handle_tpr_access(env);
  88         break;
  89 #endif
  90 #ifdef KVM_CAP_SET_GUEST_DEBUG
  91     case KVM_EXIT_DEBUG:
  92         DPRINTF("kvm_exit_debug\n");
  93         r = kvm_handle_debug(&run->debug.arch);
  94         if (r == EXCP_DEBUG) {
  95             kvm_debug_cpu_requested = env;
  96             env->stopped = 1;
  97         }
  98         break;
  99 #endif /* KVM_CAP_SET_GUEST_DEBUG */
 100     default:
 101         r = -1;
 102         break;
 103     }
 104
 105     return r;
 106 }
 107
 108 #ifdef KVM_CAP_IRQCHIP
 109
 110 int kvm_get_lapic(CPUState *env, struct kvm_lapic_state *s)
 111 {
 112     int r = 0;
 113
 114     if (!kvm_irqchip_in_kernel()) {
 115         return r;
 116     }
 117
 118     r = kvm_vcpu_ioctl(env, KVM_GET_LAPIC, s);
 119     if (r < 0) {
 120         fprintf(stderr, "KVM_GET_LAPIC failed\n");
 121     }
 122     return r;
 123 }
 124
 125 int kvm_set_lapic(CPUState *env, struct kvm_lapic_state *s)
 126 {
 127     int r = 0;
 128
 129     if (!kvm_irqchip_in_kernel()) {
 130         return 0;
 131     }
 132
 133     r = kvm_vcpu_ioctl(env, KVM_SET_LAPIC, s);
 134
 135     if (r < 0) {
 136         fprintf(stderr, "KVM_SET_LAPIC failed\n");
 137     }
 138     return r;
 139 }
 140
 141 #endif
 142
 143 #ifdef KVM_CAP_PIT
 144
 145 int kvm_get_pit(kvm_context_t kvm, struct kvm_pit_state *s)
 146 {
 147     if (!kvm_pit_in_kernel()) {
 148         return 0;
 149     }
 150     return kvm_vm_ioctl(kvm_state, KVM_GET_PIT, s);
 151 }
 152
 153 int kvm_set_pit(kvm_context_t kvm, struct kvm_pit_state *s)
 154 {
 155     if (!kvm_pit_in_kernel()) {
 156         return 0;
 157     }
 158     return kvm_vm_ioctl(kvm_state, KVM_SET_PIT, s);
 159 }
 160
 161 #ifdef KVM_CAP_PIT_STATE2
 162 int kvm_get_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
 163 {
 164     if (!kvm_pit_in_kernel()) {
 165         return 0;
 166     }
 167     return kvm_vm_ioctl(kvm_state, KVM_GET_PIT2, ps2);
 168 }
 169
 170 int kvm_set_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
 171 {
 172     if (!kvm_pit_in_kernel()) {
 173         return 0;
 174     }
 175     return kvm_vm_ioctl(kvm_state, KVM_SET_PIT2, ps2);
 176 }
 177
 178 #endif
 179 #endif
 180
 181 int kvm_has_pit_state2(kvm_context_t kvm)
 182 {
 183     int r = 0;
 184
 185 #ifdef KVM_CAP_PIT_STATE2
 186     r = kvm_check_extension(kvm_state, KVM_CAP_PIT_STATE2);
 187 #endif
 188     return r;
 189 }
 190
 191 static void kvm_set_cr8(CPUState *env, uint64_t cr8)
 192 {
 193     env->kvm_run->cr8 = cr8;
 194 }
 195
 196 #ifdef KVM_CAP_VAPIC
 197 static int kvm_enable_tpr_access_reporting(CPUState *env)
 198 {
 199     int r;
 200     struct kvm_tpr_access_ctl tac = { .enabled = 1 };
 201
 202     r = kvm_ioctl(env->kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_VAPIC);
 203     if (r <= 0) {
 204         return -ENOSYS;
 205     }
 206     return kvm_vcpu_ioctl(env, KVM_TPR_ACCESS_REPORTING, &tac);
 207 }
 208 #endif
 209
 210 static int _kvm_arch_init_vcpu(CPUState *env)
 211 {
 212     kvm_arch_reset_vcpu(env);
 213
 214 #ifdef KVM_EXIT_TPR_ACCESS
 215     kvm_enable_tpr_access_reporting(env);
 216 #endif
 217     return 0;
 218 }
 219
 220 int kvm_arch_halt(CPUState *env)
 221 {
 222
 223     if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 224           (env->eflags & IF_MASK)) &&
 225         !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
 226         env->halted = 1;
 227     }
 228     return 1;
 229 }
 230
 231 void kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
 232 {
 233     if (!kvm_irqchip_in_kernel()) {
 234         kvm_set_cr8(env, cpu_get_apic_tpr(env->apic_state));
 235     }
 236 }
 237
 238 int kvm_arch_has_work(CPUState *env)
 239 {
 240     if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 241          (env->eflags & IF_MASK)) ||
 242         (env->interrupt_request & CPU_INTERRUPT_NMI)) {
 243         return 1;
 244     }
 245     return 0;
 246 }
 247
 248 int kvm_arch_try_push_interrupts(void *opaque)
 249 {
 250     CPUState *env = cpu_single_env;
 251     int r, irq;
 252
 253     if (kvm_is_ready_for_interrupt_injection(env) &&
 254         (env->interrupt_request & CPU_INTERRUPT_HARD) &&
 255         (env->eflags & IF_MASK)) {
 256         env->interrupt_request &= ~CPU_INTERRUPT_HARD;
 257         irq = cpu_get_pic_interrupt(env);
 258         if (irq >= 0) {
 259             r = kvm_inject_irq(env, irq);
 260             if (r < 0) {
 261                 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
 262             }
 263         }
 264     }
 265
 266     return (env->interrupt_request & CPU_INTERRUPT_HARD) != 0;
 267 }
 268
 269 #ifdef KVM_CAP_USER_NMI
 270 void kvm_arch_push_nmi(void)
 271 {
 272     CPUState *env = cpu_single_env;
 273     int r;
 274
 275     if (likely(!(env->interrupt_request & CPU_INTERRUPT_NMI))) {
 276         return;
 277     }
 278
 279     env->interrupt_request &= ~CPU_INTERRUPT_NMI;
 280     r = kvm_inject_nmi(env);
 281     if (r < 0) {
 282         printf("cpu %d fail inject NMI\n", env->cpu_index);
 283     }
 284 }
 285 #endif /* KVM_CAP_USER_NMI */
 286
 287 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
 288 void kvm_arch_do_ioperm(void *_data)
 289 {
 290     struct ioperm_data *data = _data;
 291     ioperm(data->start_port, data->num, data->turn_on);
 292 }
 293 #endif
 294
 295 /*
 296  * Setup x86 specific IRQ routing
 297  */
 298 int kvm_arch_init_irq_routing(void)
 299 {
 300     int i, r;
 301
 302     if (kvm_irqchip && kvm_has_gsi_routing()) {
 303         kvm_clear_gsi_routes();
 304         for (i = 0; i < 8; ++i) {
 305             if (i == 2) {
 306                 continue;
 307             }
 308             r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_MASTER, i);
 309             if (r < 0) {
 310                 return r;
 311             }
 312         }
 313         for (i = 8; i < 16; ++i) {
 314             r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
 315             if (r < 0) {
 316                 return r;
 317             }
 318         }
 319         for (i = 0; i < 24; ++i) {
 320             if (i == 0 && irq0override) {
 321                 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, 2);
 322             } else if (i != 2 || !irq0override) {
 323                 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, i);
 324             }
 325             if (r < 0) {
 326                 return r;
 327             }
 328         }
 329         kvm_commit_irq_routes();
 330     }
 331     return 0;
 332 }
 333
 334 void kvm_arch_process_irqchip_events(CPUState *env)
 335 {
 336     if (env->interrupt_request & CPU_INTERRUPT_INIT) {
 337         kvm_cpu_synchronize_state(env);
 338         do_cpu_init(env);
 339     }
 340     if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
 341         kvm_cpu_synchronize_state(env);
 342         do_cpu_sipi(env);
 343     }
 344 }
 345
 346 int kvm_arch_process_async_events(CPUState *env)
 347 {
 348     if (env->interrupt_request & CPU_INTERRUPT_MCE) {
 349         /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
 350         assert(env->mcg_cap);
 351
 352         env->interrupt_request &= ~CPU_INTERRUPT_MCE;
 353
 354         kvm_cpu_synchronize_state(env);
 355
 356         if (env->exception_injected == EXCP08_DBLE) {
 357             /* this means triple fault */
 358             qemu_system_reset_request();
 359             env->exit_request = 1;
 360             return 0;
 361         }
 362         env->exception_injected = EXCP12_MCHK;
 363         env->has_error_code = 0;
 364
 365         env->halted = 0;
 366         if (kvm_irqchip_in_kernel() && env->mp_state == KVM_MP_STATE_HALTED) {
 367             env->mp_state = KVM_MP_STATE_RUNNABLE;
 368         }
 369     }
 370     return 0;
 371 }