2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #include "vmware_vga.h"
33 #include "hpet_emul.h"
37 #include "multiboot.h"
38 #include "mc146818rtc.h"
42 #include "device-assignment.h"
45 #include "ui/qemu-spice.h"
47 /* output Bochs bios info messages */
50 /* debug PC/ISA interrupts */
54 #define DPRINTF(fmt, ...) \
55 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
57 #define DPRINTF(fmt, ...)
60 #define BIOS_FILENAME "bios.bin"
61 #define EXTBOOT_FILENAME "extboot.bin"
62 #define VAPIC_FILENAME "vapic.bin"
64 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
66 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
67 #define ACPI_DATA_SIZE 0x10000
68 #define BIOS_CFG_IOPORT 0x510
69 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
70 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
71 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
72 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
73 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
75 #define MSI_ADDR_BASE 0xfee00000
77 #define E820_NR_ENTRIES 16
83 } __attribute((__packed__
, __aligned__(4)));
87 struct e820_entry entry
[E820_NR_ENTRIES
];
88 } __attribute((__packed__
, __aligned__(4)));
90 static struct e820_table e820_table
;
91 struct hpet_fw_config hpet_cfg
= {.count
= UINT8_MAX
};
93 void isa_irq_handler(void *opaque
, int n
, int level
)
95 IsaIrqState
*isa
= (IsaIrqState
*)opaque
;
97 DPRINTF("isa_irqs: %s irq %d\n", level
? "raise" : "lower", n
);
99 qemu_set_irq(isa
->i8259
[n
], level
);
102 qemu_set_irq(isa
->ioapic
[n
], level
);
105 static void ioport80_write(void *opaque
, uint32_t addr
, uint32_t data
)
109 /* MSDOS compatibility mode FPU exception support */
110 static qemu_irq ferr_irq
;
112 void pc_register_ferr_irq(qemu_irq irq
)
117 /* XXX: add IGNNE support */
118 void cpu_set_ferr(CPUX86State
*s
)
120 qemu_irq_raise(ferr_irq
);
123 static void ioportF0_write(void *opaque
, uint32_t addr
, uint32_t data
)
125 qemu_irq_lower(ferr_irq
);
129 uint64_t cpu_get_tsc(CPUX86State
*env
)
131 return cpu_get_ticks();
136 static cpu_set_smm_t smm_set
;
137 static void *smm_arg
;
139 void cpu_smm_register(cpu_set_smm_t callback
, void *arg
)
141 assert(smm_set
== NULL
);
142 assert(smm_arg
== NULL
);
147 void cpu_smm_update(CPUState
*env
)
149 if (smm_set
&& smm_arg
&& env
== first_cpu
)
150 smm_set(!!(env
->hflags
& HF_SMM_MASK
), smm_arg
);
155 int cpu_get_pic_interrupt(CPUState
*env
)
159 intno
= apic_get_interrupt(env
->apic_state
);
161 /* set irq request if a PIC irq is still pending */
162 /* XXX: improve that */
163 pic_update_irq(isa_pic
);
166 /* read the irq from the PIC */
167 if (!apic_accept_pic_intr(env
->apic_state
)) {
171 intno
= pic_read_irq(isa_pic
);
175 static void pic_irq_request(void *opaque
, int irq
, int level
)
177 CPUState
*env
= first_cpu
;
179 DPRINTF("pic_irqs: %s irq %d\n", level
? "raise" : "lower", irq
);
180 if (env
->apic_state
) {
182 if (apic_accept_pic_intr(env
->apic_state
)) {
183 apic_deliver_pic_intr(env
->apic_state
, level
);
189 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
191 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
195 /* PC cmos mappings */
197 #define REG_EQUIPMENT_BYTE 0x14
199 static int cmos_get_fd_drive_type(FDriveType fd0
)
205 /* 1.44 Mb 3"5 drive */
209 /* 2.88 Mb 3"5 drive */
213 /* 1.2 Mb 5"5 drive */
216 case FDRIVE_DRV_NONE
:
224 static void cmos_init_hd(int type_ofs
, int info_ofs
, BlockDriverState
*hd
,
227 int cylinders
, heads
, sectors
;
228 bdrv_get_geometry_hint(hd
, &cylinders
, &heads
, §ors
);
229 rtc_set_memory(s
, type_ofs
, 47);
230 rtc_set_memory(s
, info_ofs
, cylinders
);
231 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
232 rtc_set_memory(s
, info_ofs
+ 2, heads
);
233 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
234 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
235 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
236 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
237 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
238 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
241 /* convert boot_device letter to something recognizable by the bios */
242 static int boot_device2nibble(char boot_device
)
244 switch(boot_device
) {
247 return 0x01; /* floppy boot */
249 return 0x02; /* hard drive boot */
251 return 0x03; /* CD-ROM boot */
253 return 0x04; /* Network boot */
258 static int set_boot_dev(ISADevice
*s
, const char *boot_device
, int fd_bootchk
)
260 #define PC_MAX_BOOT_DEVICES 3
261 int nbds
, bds
[3] = { 0, };
264 nbds
= strlen(boot_device
);
265 if (nbds
> PC_MAX_BOOT_DEVICES
) {
266 error_report("Too many boot devices for PC");
269 for (i
= 0; i
< nbds
; i
++) {
270 bds
[i
] = boot_device2nibble(boot_device
[i
]);
272 error_report("Invalid boot device for PC: '%c'",
277 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
278 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
282 static int pc_boot_set(void *opaque
, const char *boot_device
)
284 return set_boot_dev(opaque
, boot_device
, 0);
287 typedef struct pc_cmos_init_late_arg
{
288 ISADevice
*rtc_state
;
289 BusState
*idebus0
, *idebus1
;
290 } pc_cmos_init_late_arg
;
292 static void pc_cmos_init_late(void *opaque
)
294 pc_cmos_init_late_arg
*arg
= opaque
;
295 ISADevice
*s
= arg
->rtc_state
;
297 BlockDriverState
*hd_table
[4];
300 ide_get_bs(hd_table
, arg
->idebus0
);
301 ide_get_bs(hd_table
+ 2, arg
->idebus1
);
303 rtc_set_memory(s
, 0x12, (hd_table
[0] ? 0xf0 : 0) | (hd_table
[1] ? 0x0f : 0));
305 cmos_init_hd(0x19, 0x1b, hd_table
[0], s
);
307 cmos_init_hd(0x1a, 0x24, hd_table
[1], s
);
310 for (i
= 0; i
< 4; i
++) {
312 int cylinders
, heads
, sectors
, translation
;
313 /* NOTE: bdrv_get_geometry_hint() returns the physical
314 geometry. It is always such that: 1 <= sects <= 63, 1
315 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
316 geometry can be different if a translation is done. */
317 translation
= bdrv_get_translation_hint(hd_table
[i
]);
318 if (translation
== BIOS_ATA_TRANSLATION_AUTO
) {
319 bdrv_get_geometry_hint(hd_table
[i
], &cylinders
, &heads
, §ors
);
320 if (cylinders
<= 1024 && heads
<= 16 && sectors
<= 63) {
321 /* No translation. */
324 /* LBA translation. */
330 val
|= translation
<< (i
* 2);
333 rtc_set_memory(s
, 0x39, val
);
335 qemu_unregister_reset(pc_cmos_init_late
, opaque
);
338 void pc_cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
339 const char *boot_device
,
340 BusState
*idebus0
, BusState
*idebus1
,
343 int val
, nb
, nb_heads
, max_track
, last_sect
, i
;
344 FDriveType fd_type
[2];
346 static pc_cmos_init_late_arg arg
;
348 /* various important CMOS locations needed by PC/Bochs bios */
351 val
= 640; /* base memory in K */
352 rtc_set_memory(s
, 0x15, val
);
353 rtc_set_memory(s
, 0x16, val
>> 8);
355 val
= (ram_size
/ 1024) - 1024;
358 rtc_set_memory(s
, 0x17, val
);
359 rtc_set_memory(s
, 0x18, val
>> 8);
360 rtc_set_memory(s
, 0x30, val
);
361 rtc_set_memory(s
, 0x31, val
>> 8);
363 if (above_4g_mem_size
) {
364 rtc_set_memory(s
, 0x5b, (unsigned int)above_4g_mem_size
>> 16);
365 rtc_set_memory(s
, 0x5c, (unsigned int)above_4g_mem_size
>> 24);
366 rtc_set_memory(s
, 0x5d, (uint64_t)above_4g_mem_size
>> 32);
369 if (ram_size
> (16 * 1024 * 1024))
370 val
= (ram_size
/ 65536) - ((16 * 1024 * 1024) / 65536);
375 rtc_set_memory(s
, 0x34, val
);
376 rtc_set_memory(s
, 0x35, val
>> 8);
378 /* set the number of CPU */
379 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
381 /* set boot devices, and disable floppy signature check if requested */
382 if (set_boot_dev(s
, boot_device
, fd_bootchk
)) {
387 for (i
= 0; i
< 2; i
++) {
388 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
389 if (fd
[i
] && bdrv_is_inserted(fd
[i
]->bdrv
)) {
390 bdrv_get_floppy_geometry_hint(fd
[i
]->bdrv
, &nb_heads
, &max_track
,
391 &last_sect
, FDRIVE_DRV_NONE
,
394 fd_type
[i
] = FDRIVE_DRV_NONE
;
397 val
= (cmos_get_fd_drive_type(fd_type
[0]) << 4) |
398 cmos_get_fd_drive_type(fd_type
[1]);
399 rtc_set_memory(s
, 0x10, val
);
403 if (fd_type
[0] < FDRIVE_DRV_NONE
) {
406 if (fd_type
[1] < FDRIVE_DRV_NONE
) {
413 val
|= 0x01; /* 1 drive, ready for boot */
416 val
|= 0x41; /* 2 drives, ready for boot */
419 val
|= 0x02; /* FPU is there */
420 val
|= 0x04; /* PS/2 mouse installed */
421 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
425 arg
.idebus0
= idebus0
;
426 arg
.idebus1
= idebus1
;
427 qemu_register_reset(pc_cmos_init_late
, &arg
);
430 /* port 92 stuff: could be split off */
431 typedef struct Port92State
{
437 static void port92_write(void *opaque
, uint32_t addr
, uint32_t val
)
439 Port92State
*s
= opaque
;
441 DPRINTF("port92: write 0x%02x\n", val
);
443 qemu_set_irq(*s
->a20_out
, (val
>> 1) & 1);
445 qemu_system_reset_request();
449 static uint32_t port92_read(void *opaque
, uint32_t addr
)
451 Port92State
*s
= opaque
;
455 DPRINTF("port92: read 0x%02x\n", ret
);
459 static void port92_init(ISADevice
*dev
, qemu_irq
*a20_out
)
461 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
463 s
->a20_out
= a20_out
;
466 static const VMStateDescription vmstate_port92_isa
= {
469 .minimum_version_id
= 1,
470 .minimum_version_id_old
= 1,
471 .fields
= (VMStateField
[]) {
472 VMSTATE_UINT8(outport
, Port92State
),
473 VMSTATE_END_OF_LIST()
477 static void port92_reset(DeviceState
*d
)
479 Port92State
*s
= container_of(d
, Port92State
, dev
.qdev
);
484 static int port92_initfn(ISADevice
*dev
)
486 Port92State
*s
= DO_UPCAST(Port92State
, dev
, dev
);
488 register_ioport_read(0x92, 1, 1, port92_read
, s
);
489 register_ioport_write(0x92, 1, 1, port92_write
, s
);
490 isa_init_ioport(dev
, 0x92);
495 static ISADeviceInfo port92_info
= {
496 .qdev
.name
= "port92",
497 .qdev
.size
= sizeof(Port92State
),
498 .qdev
.vmsd
= &vmstate_port92_isa
,
500 .qdev
.reset
= port92_reset
,
501 .init
= port92_initfn
,
504 static void port92_register(void)
506 isa_qdev_register(&port92_info
);
508 device_init(port92_register
)
510 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
512 CPUState
*cpu
= opaque
;
514 /* XXX: send to all CPUs ? */
515 /* XXX: add logic to handle multiple A20 line sources */
516 cpu_x86_set_a20(cpu
, level
);
519 /***********************************************************/
520 /* Bochs BIOS debug ports */
522 static void bochs_bios_write(void *opaque
, uint32_t addr
, uint32_t val
)
524 static const char shutdown_str
[8] = "Shutdown";
525 static int shutdown_index
= 0;
528 /* Bochs BIOS messages */
531 /* used to be panic, now unused */
536 fprintf(stderr
, "%c", val
);
540 /* same as Bochs power off */
541 if (val
== shutdown_str
[shutdown_index
]) {
543 if (shutdown_index
== 8) {
545 qemu_system_shutdown_request();
552 /* LGPL'ed VGA BIOS messages */
555 fprintf(stderr
, "VGA BIOS panic, line %d\n", val
);
560 fprintf(stderr
, "%c", val
);
566 int e820_add_entry(uint64_t address
, uint64_t length
, uint32_t type
)
568 int index
= le32_to_cpu(e820_table
.count
);
569 struct e820_entry
*entry
;
571 if (index
>= E820_NR_ENTRIES
)
573 entry
= &e820_table
.entry
[index
++];
575 entry
->address
= cpu_to_le64(address
);
576 entry
->length
= cpu_to_le64(length
);
577 entry
->type
= cpu_to_le32(type
);
579 e820_table
.count
= cpu_to_le32(index
);
583 static void *bochs_bios_init(void)
586 uint8_t *smbios_table
;
588 uint64_t *numa_fw_cfg
;
591 register_ioport_write(0x400, 1, 2, bochs_bios_write
, NULL
);
592 register_ioport_write(0x401, 1, 2, bochs_bios_write
, NULL
);
593 register_ioport_write(0x402, 1, 1, bochs_bios_write
, NULL
);
594 register_ioport_write(0x403, 1, 1, bochs_bios_write
, NULL
);
595 register_ioport_write(0x8900, 1, 1, bochs_bios_write
, NULL
);
597 register_ioport_write(0x501, 1, 2, bochs_bios_write
, NULL
);
598 register_ioport_write(0x502, 1, 2, bochs_bios_write
, NULL
);
599 register_ioport_write(0x500, 1, 1, bochs_bios_write
, NULL
);
600 register_ioport_write(0x503, 1, 1, bochs_bios_write
, NULL
);
602 fw_cfg
= fw_cfg_init(BIOS_CFG_IOPORT
, BIOS_CFG_IOPORT
+ 1, 0, 0);
604 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
605 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
606 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
, (uint8_t *)acpi_tables
,
608 fw_cfg_add_bytes(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, &irq0override
, 1);
610 smbios_table
= smbios_get_table(&smbios_len
);
612 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
613 smbios_table
, smbios_len
);
614 fw_cfg_add_bytes(fw_cfg
, FW_CFG_E820_TABLE
, (uint8_t *)&e820_table
,
615 sizeof(struct e820_table
));
617 fw_cfg_add_bytes(fw_cfg
, FW_CFG_HPET
, (uint8_t *)&hpet_cfg
,
618 sizeof(struct hpet_fw_config
));
619 /* allocate memory for the NUMA channel: one (64bit) word for the number
620 * of nodes, one word for each VCPU->node and one word for each node to
621 * hold the amount of memory.
623 numa_fw_cfg
= qemu_mallocz((1 + smp_cpus
+ nb_numa_nodes
) * 8);
624 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
625 for (i
= 0; i
< smp_cpus
; i
++) {
626 for (j
= 0; j
< nb_numa_nodes
; j
++) {
627 if (node_cpumask
[j
] & (1 << i
)) {
628 numa_fw_cfg
[i
+ 1] = cpu_to_le64(j
);
633 for (i
= 0; i
< nb_numa_nodes
; i
++) {
634 numa_fw_cfg
[smp_cpus
+ 1 + i
] = cpu_to_le64(node_mem
[i
]);
636 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, (uint8_t *)numa_fw_cfg
,
637 (1 + smp_cpus
+ nb_numa_nodes
) * 8);
642 static long get_file_size(FILE *f
)
646 /* XXX: on Unix systems, using fstat() probably makes more sense */
649 fseek(f
, 0, SEEK_END
);
651 fseek(f
, where
, SEEK_SET
);
656 static void load_linux(void *fw_cfg
,
657 const char *kernel_filename
,
658 const char *initrd_filename
,
659 const char *kernel_cmdline
,
660 target_phys_addr_t max_ram_size
)
663 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
665 uint8_t header
[8192], *setup
, *kernel
, *initrd_data
;
666 target_phys_addr_t real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
670 /* Align to 16 bytes as a paranoia measure */
671 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
673 /* load the kernel header */
674 f
= fopen(kernel_filename
, "rb");
675 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
676 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
677 MIN(ARRAY_SIZE(header
), kernel_size
)) {
678 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
679 kernel_filename
, strerror(errno
));
683 /* kernel protocol version */
685 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
687 if (ldl_p(header
+0x202) == 0x53726448)
688 protocol
= lduw_p(header
+0x206);
690 /* This looks like a multiboot kernel. If it is, let's stop
691 treating it like a Linux kernel. */
692 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
693 kernel_cmdline
, kernel_size
, header
))
698 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
701 cmdline_addr
= 0x9a000 - cmdline_size
;
703 } else if (protocol
< 0x202) {
704 /* High but ancient kernel */
706 cmdline_addr
= 0x9a000 - cmdline_size
;
707 prot_addr
= 0x100000;
709 /* High and recent kernel */
711 cmdline_addr
= 0x20000;
712 prot_addr
= 0x100000;
717 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
718 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
719 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
725 /* highest address for loading the initrd */
726 if (protocol
>= 0x203)
727 initrd_max
= ldl_p(header
+0x22c);
729 initrd_max
= 0x37ffffff;
731 if (initrd_max
>= max_ram_size
-ACPI_DATA_SIZE
)
732 initrd_max
= max_ram_size
-ACPI_DATA_SIZE
-1;
734 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
735 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
)+1);
736 fw_cfg_add_bytes(fw_cfg
, FW_CFG_CMDLINE_DATA
,
737 (uint8_t*)strdup(kernel_cmdline
),
738 strlen(kernel_cmdline
)+1);
740 if (protocol
>= 0x202) {
741 stl_p(header
+0x228, cmdline_addr
);
743 stw_p(header
+0x20, 0xA33F);
744 stw_p(header
+0x22, cmdline_addr
-real_addr
);
747 /* handle vga= parameter */
748 vmode
= strstr(kernel_cmdline
, "vga=");
750 unsigned int video_mode
;
753 if (!strncmp(vmode
, "normal", 6)) {
755 } else if (!strncmp(vmode
, "ext", 3)) {
757 } else if (!strncmp(vmode
, "ask", 3)) {
760 video_mode
= strtol(vmode
, NULL
, 0);
762 stw_p(header
+0x1fa, video_mode
);
766 /* High nybble = B reserved for Qemu; low nybble is revision number.
767 If this code is substantially changed, you may want to consider
768 incrementing the revision. */
769 if (protocol
>= 0x200)
770 header
[0x210] = 0xB0;
773 if (protocol
>= 0x201) {
774 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
775 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
779 if (initrd_filename
) {
780 if (protocol
< 0x200) {
781 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
785 initrd_size
= get_image_size(initrd_filename
);
786 if (initrd_size
< 0) {
787 fprintf(stderr
, "qemu: error reading initrd %s\n",
792 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
794 initrd_data
= qemu_malloc(initrd_size
);
795 load_image(initrd_filename
, initrd_data
);
797 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
798 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
799 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
801 stl_p(header
+0x218, initrd_addr
);
802 stl_p(header
+0x21c, initrd_size
);
805 /* load kernel and setup */
806 setup_size
= header
[0x1f1];
809 setup_size
= (setup_size
+1)*512;
810 kernel_size
-= setup_size
;
812 setup
= qemu_malloc(setup_size
);
813 kernel
= qemu_malloc(kernel_size
);
814 fseek(f
, 0, SEEK_SET
);
815 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
816 fprintf(stderr
, "fread() failed\n");
819 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
820 fprintf(stderr
, "fread() failed\n");
824 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
826 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
827 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
828 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
830 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
831 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
832 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
834 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
835 option_rom
[nb_option_roms
].bootindex
= 0;
839 #define NE2000_NB_MAX 6
841 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
843 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
845 static const int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
846 static const int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
848 void pc_init_ne2k_isa(NICInfo
*nd
)
850 static int nb_ne2k
= 0;
852 if (nb_ne2k
== NE2000_NB_MAX
)
854 isa_ne2000_init(ne2000_io
[nb_ne2k
],
855 ne2000_irq
[nb_ne2k
], nd
);
859 int cpu_is_bsp(CPUState
*env
)
861 /* We hard-wire the BSP to the first CPU. */
862 return env
->cpu_index
== 0;
865 DeviceState
*cpu_get_current_apic(void)
867 if (cpu_single_env
) {
868 return cpu_single_env
->apic_state
;
874 static DeviceState
*apic_init(void *env
, uint8_t apic_id
)
878 static int apic_mapped
;
880 dev
= qdev_create(NULL
, "apic");
881 qdev_prop_set_uint8(dev
, "id", apic_id
);
882 qdev_prop_set_ptr(dev
, "cpu_env", env
);
883 qdev_init_nofail(dev
);
884 d
= sysbus_from_qdev(dev
);
886 /* XXX: mapping more APICs at the same memory location */
887 if (apic_mapped
== 0) {
888 /* NOTE: the APIC is directly connected to the CPU - it is not
889 on the global memory bus. */
890 /* XXX: what if the base changes? */
891 sysbus_mmio_map(d
, 0, MSI_ADDR_BASE
);
900 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
901 BIOS will read it and start S3 resume at POST Entry */
902 void pc_cmos_set_s3_resume(void *opaque
, int irq
, int level
)
904 ISADevice
*s
= opaque
;
907 rtc_set_memory(s
, 0xF, 0xFE);
911 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
913 CPUState
*s
= opaque
;
916 cpu_interrupt(s
, CPU_INTERRUPT_SMI
);
920 static void pc_cpu_reset(void *opaque
)
922 CPUState
*env
= opaque
;
925 env
->halted
= !cpu_is_bsp(env
);
928 CPUState
*pc_new_cpu(const char *cpu_model
)
932 if (cpu_model
== NULL
) {
934 cpu_model
= "qemu64";
936 cpu_model
= "qemu32";
940 env
= cpu_init(cpu_model
);
942 fprintf(stderr
, "Unable to find x86 CPU definition\n");
945 if ((env
->cpuid_features
& CPUID_APIC
) || smp_cpus
> 1) {
946 env
->cpuid_apic_id
= env
->cpu_index
;
947 env
->apic_state
= apic_init(env
, env
->cpuid_apic_id
);
949 qemu_register_reset(pc_cpu_reset
, env
);
954 void pc_cpus_init(const char *cpu_model
)
959 for(i
= 0; i
< smp_cpus
; i
++) {
960 pc_new_cpu(cpu_model
);
964 void pc_memory_init(ram_addr_t ram_size
,
965 const char *kernel_filename
,
966 const char *kernel_cmdline
,
967 const char *initrd_filename
,
968 ram_addr_t
*below_4g_mem_size_p
,
969 ram_addr_t
*above_4g_mem_size_p
)
972 int ret
, linux_boot
, i
;
973 ram_addr_t ram_addr
, bios_offset
, option_rom_offset
;
974 ram_addr_t below_4g_mem_size
, above_4g_mem_size
= 0;
975 int bios_size
, isa_bios_size
;
978 if (ram_size
>= 0xe0000000 ) {
979 above_4g_mem_size
= ram_size
- 0xe0000000;
980 below_4g_mem_size
= 0xe0000000;
982 below_4g_mem_size
= ram_size
;
984 *above_4g_mem_size_p
= above_4g_mem_size
;
985 *below_4g_mem_size_p
= below_4g_mem_size
;
987 linux_boot
= (kernel_filename
!= NULL
);
990 ram_addr
= qemu_ram_alloc(NULL
, "pc.ram",
991 below_4g_mem_size
+ above_4g_mem_size
);
992 cpu_register_physical_memory(0, 0xa0000, ram_addr
);
993 cpu_register_physical_memory(0x100000,
994 below_4g_mem_size
- 0x100000,
995 ram_addr
+ 0x100000);
996 if (above_4g_mem_size
> 0) {
997 cpu_register_physical_memory(0x100000000ULL
, above_4g_mem_size
,
998 ram_addr
+ below_4g_mem_size
);
1002 if (bios_name
== NULL
)
1003 bios_name
= BIOS_FILENAME
;
1004 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1006 bios_size
= get_image_size(filename
);
1010 if (bios_size
<= 0 ||
1011 (bios_size
% 65536) != 0) {
1014 bios_offset
= qemu_ram_alloc(NULL
, "pc.bios", bios_size
);
1015 ret
= rom_add_file_fixed(bios_name
, (uint32_t)(-bios_size
), -1);
1018 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
1022 qemu_free(filename
);
1024 /* map the last 128KB of the BIOS in ISA space */
1025 isa_bios_size
= bios_size
;
1026 if (isa_bios_size
> (128 * 1024))
1027 isa_bios_size
= 128 * 1024;
1028 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size
,
1030 cpu_register_physical_memory(0x100000 - isa_bios_size
,
1032 (bios_offset
+ bios_size
- isa_bios_size
) | IO_MEM_ROM
);
1034 if (extboot_drive
) {
1035 option_rom
[nb_option_roms
].name
= qemu_strdup(EXTBOOT_FILENAME
);
1036 option_rom
[nb_option_roms
].bootindex
= 0;
1039 option_rom
[nb_option_roms
].name
= qemu_strdup(VAPIC_FILENAME
);
1040 option_rom
[nb_option_roms
].bootindex
= -1;
1043 option_rom_offset
= qemu_ram_alloc(NULL
, "pc.rom", PC_ROM_SIZE
);
1044 cpu_register_physical_memory(PC_ROM_MIN_VGA
, PC_ROM_SIZE
, option_rom_offset
);
1046 /* map all the bios at the top of memory */
1047 cpu_register_physical_memory((uint32_t)(-bios_size
),
1048 bios_size
, bios_offset
| IO_MEM_ROM
);
1050 fw_cfg
= bochs_bios_init();
1054 load_linux(fw_cfg
, kernel_filename
, initrd_filename
, kernel_cmdline
, below_4g_mem_size
);
1057 for (i
= 0; i
< nb_option_roms
; i
++) {
1058 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
1062 qemu_irq
*pc_allocate_cpu_irq(void)
1064 return qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
1067 void pc_vga_init(PCIBus
*pci_bus
)
1069 if (cirrus_vga_enabled
) {
1071 pci_cirrus_vga_init(pci_bus
);
1073 isa_cirrus_vga_init();
1075 } else if (vmsvga_enabled
) {
1077 if (!pci_vmsvga_init(pci_bus
)) {
1078 fprintf(stderr
, "Warning: vmware_vga not available,"
1079 " using standard VGA instead\n");
1080 pci_vga_init(pci_bus
);
1083 fprintf(stderr
, "%s: vmware_vga: no PCI bus\n", __FUNCTION__
);
1086 } else if (qxl_enabled
) {
1088 pci_create_simple(pci_bus
, -1, "qxl-vga");
1090 fprintf(stderr
, "%s: qxl: no PCI bus\n", __FUNCTION__
);
1092 } else if (std_vga_enabled
) {
1094 pci_vga_init(pci_bus
);
1101 static void cpu_request_exit(void *opaque
, int irq
, int level
)
1103 CPUState
*env
= cpu_single_env
;
1110 void pc_basic_device_init(qemu_irq
*isa_irq
,
1111 ISADevice
**rtc_state
)
1114 DriveInfo
*fd
[MAX_FD
];
1115 qemu_irq rtc_irq
= NULL
;
1117 ISADevice
*i8042
, *port92
, *vmmouse
, *pit
;
1118 qemu_irq
*cpu_exit_irq
;
1120 register_ioport_write(0x80, 1, 1, ioport80_write
, NULL
);
1122 register_ioport_write(0xf0, 1, 1, ioportF0_write
, NULL
);
1125 DeviceState
*hpet
= sysbus_try_create_simple("hpet", HPET_BASE
, NULL
);
1128 for (i
= 0; i
< 24; i
++) {
1129 sysbus_connect_irq(sysbus_from_qdev(hpet
), i
, isa_irq
[i
]);
1131 rtc_irq
= qdev_get_gpio_in(hpet
, 0);
1134 *rtc_state
= rtc_init(2000, rtc_irq
);
1136 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1138 pit
= pit_init(0x40, 0);
1141 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1142 if (serial_hds
[i
]) {
1143 serial_isa_init(i
, serial_hds
[i
]);
1147 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1148 if (parallel_hds
[i
]) {
1149 parallel_init(i
, parallel_hds
[i
]);
1153 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 2);
1154 i8042
= isa_create_simple("i8042");
1155 i8042_setup_a20_line(i8042
, &a20_line
[0]);
1157 vmmouse
= isa_try_create("vmmouse");
1159 qdev_prop_set_ptr(&vmmouse
->qdev
, "ps2_mouse", i8042
);
1160 qdev_init_nofail(&vmmouse
->qdev
);
1162 port92
= isa_create_simple("port92");
1163 port92_init(port92
, &a20_line
[1]);
1165 cpu_exit_irq
= qemu_allocate_irqs(cpu_request_exit
, NULL
, 1);
1166 DMA_init(0, cpu_exit_irq
);
1168 for(i
= 0; i
< MAX_FD
; i
++) {
1169 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1171 fdctrl_init_isa(fd
);
1174 void pc_pci_device_init(PCIBus
*pci_bus
)
1179 max_bus
= drive_get_max_bus(IF_SCSI
);
1180 for (bus
= 0; bus
<= max_bus
; bus
++) {
1181 pci_create_simple(pci_bus
, -1, "lsi53c895a");
1184 if (extboot_drive
) {
1185 DriveInfo
*info
= extboot_drive
;
1186 int cyls
, heads
, secs
;
1188 if (info
->type
!= IF_IDE
&& info
->type
!= IF_VIRTIO
) {
1189 bdrv_guess_geometry(info
->bdrv
, &cyls
, &heads
, &secs
);
1190 bdrv_set_geometry_hint(info
->bdrv
, cyls
, heads
, secs
);
1193 extboot_init(info
->bdrv
);