cpu-common.h

   1 #ifndef CPU_COMMON_H
   2 #define CPU_COMMON_H 1
   3
   4 /* CPU interfaces that are target indpendent.  */
   5
   6 #if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) || defined(__ia64__)
   7 #define WORDS_ALIGNED
   8 #endif
   9
  10 #ifdef TARGET_PHYS_ADDR_BITS
  11 #include "targphys.h"
  12 #endif
  13
  14 #ifndef NEED_CPU_H
  15 #include "poison.h"
  16 #endif
  17
  18 #include "bswap.h"
  19 #include "qemu-queue.h"
  20
  21 #if !defined(CONFIG_USER_ONLY)
  22
  23 /* address in the RAM (different from a physical address) */
  24 typedef unsigned long ram_addr_t;
  25
  26 /* memory API */
  27
  28 typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
  29 typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
  30
  31 void cpu_register_physical_memory_offset(target_phys_addr_t start_addr,
  32                                          ram_addr_t size,
  33                                          ram_addr_t phys_offset,
  34                                          ram_addr_t region_offset);
  35 static inline void cpu_register_physical_memory(target_phys_addr_t start_addr,
  36                                                 ram_addr_t size,
  37                                                 ram_addr_t phys_offset)
  38 {
  39     cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0);
  40 }
  41
  42 ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
  43 ram_addr_t qemu_ram_map(ram_addr_t size, void *host);
  44 ram_addr_t qemu_ram_alloc(ram_addr_t);
  45 void qemu_ram_free(ram_addr_t addr);
  46 /* This should only be used for ram local to a device.  */
  47 void *qemu_get_ram_ptr(ram_addr_t addr);
  48 /* This should not be used by devices.  */
  49 int do_qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
  50 ram_addr_t qemu_ram_addr_from_host(void *ptr);
  51
  52 int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
  53                            CPUWriteMemoryFunc * const *mem_write,
  54                            void *opaque);
  55 void cpu_unregister_io_memory(int table_address);
  56
  57 void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
  58                             int len, int is_write);
  59 static inline void cpu_physical_memory_read(target_phys_addr_t addr,
  60                                             uint8_t *buf, int len)
  61 {
  62     cpu_physical_memory_rw(addr, buf, len, 0);
  63 }
  64 static inline void cpu_physical_memory_write(target_phys_addr_t addr,
  65                                              const uint8_t *buf, int len)
  66 {
  67     cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
  68 }
  69 void *cpu_physical_memory_map(target_phys_addr_t addr,
  70                               target_phys_addr_t *plen,
  71                               int is_write);
  72 void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
  73                                int is_write, target_phys_addr_t access_len);
  74 void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
  75 void cpu_unregister_map_client(void *cookie);
  76
  77 struct CPUPhysMemoryClient;
  78 typedef struct CPUPhysMemoryClient CPUPhysMemoryClient;
  79 struct CPUPhysMemoryClient {
  80     void (*set_memory)(struct CPUPhysMemoryClient *client,
  81                        target_phys_addr_t start_addr,
  82                        ram_addr_t size,
  83                        ram_addr_t phys_offset);
  84     int (*sync_dirty_bitmap)(struct CPUPhysMemoryClient *client,
  85                              target_phys_addr_t start_addr,
  86                              target_phys_addr_t end_addr);
  87     int (*migration_log)(struct CPUPhysMemoryClient *client,
  88                          int enable);
  89     QLIST_ENTRY(CPUPhysMemoryClient) list;
  90 };
  91
  92 void cpu_register_phys_memory_client(CPUPhysMemoryClient *);
  93 void cpu_unregister_phys_memory_client(CPUPhysMemoryClient *);
  94
  95 /* Coalesced MMIO regions are areas where write operations can be reordered.
  96  * This usually implies that write operations are side-effect free.  This allows
  97  * batching which can make a major impact on performance when using
  98  * virtualization.
  99  */
 100 void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
 101
 102 void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
 103
 104 void qemu_flush_coalesced_mmio_buffer(void);
 105
 106 uint32_t ldub_phys(target_phys_addr_t addr);
 107 uint32_t lduw_phys(target_phys_addr_t addr);
 108 uint32_t ldl_phys(target_phys_addr_t addr);
 109 uint64_t ldq_phys(target_phys_addr_t addr);
 110 void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
 111 void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
 112 void stb_phys(target_phys_addr_t addr, uint32_t val);
 113 void stw_phys(target_phys_addr_t addr, uint32_t val);
 114 void stl_phys(target_phys_addr_t addr, uint32_t val);
 115 void stq_phys(target_phys_addr_t addr, uint64_t val);
 116
 117 void cpu_physical_memory_write_rom(target_phys_addr_t addr,
 118                                    const uint8_t *buf, int len);
 119
 120 #define IO_MEM_SHIFT       3
 121
 122 #define IO_MEM_RAM         (0 << IO_MEM_SHIFT) /* hardcoded offset */
 123 #define IO_MEM_ROM         (1 << IO_MEM_SHIFT) /* hardcoded offset */
 124 #define IO_MEM_UNASSIGNED  (2 << IO_MEM_SHIFT)
 125 #define IO_MEM_NOTDIRTY    (3 << IO_MEM_SHIFT)
 126
 127 /* Acts like a ROM when read and like a device when written.  */
 128 #define IO_MEM_ROMD        (1)
 129 #define IO_MEM_SUBPAGE     (2)
 130
 131 #endif
 132
 133 #endif /* !CPU_COMMON_H */