hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "vmware_vga.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "prep_pci.h"
  32 #include "apb_pci.h"
  33 #include "block.h"
  34 #include "sysemu.h"
  35 #include "audio/audio.h"
  36 #include "net.h"
  37 #include "smbus.h"
  38 #include "boards.h"
  39 #include "monitor.h"
  40 #include "fw_cfg.h"
  41 #include "hpet_emul.h"
  42 #include "watchdog.h"
  43 #include "smbios.h"
  44 #include "ide.h"
  45 #include "loader.h"
  46 #include "elf.h"
  47 #include "device-assignment.h"
  48
  49 #include "qemu-kvm.h"
  50
  51 /* output Bochs bios info messages */
  52 //#define DEBUG_BIOS
  53
  54 /* Show multiboot debug output */
  55 //#define DEBUG_MULTIBOOT
  56
  57 #define BIOS_FILENAME "bios.bin"
  58 #define EXTBOOT_FILENAME "extboot.bin"
  59 #define VAPIC_FILENAME "vapic.bin"
  60
  61 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  62
  63 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  64 #define ACPI_DATA_SIZE       0x10000
  65 #define BIOS_CFG_IOPORT 0x510
  66 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  67 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
  68 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
  69
  70 #define MAX_IDE_BUS 2
  71
  72 static fdctrl_t *floppy_controller;
  73 static RTCState *rtc_state;
  74 static PITState *pit;
  75 static PCII440FXState *i440fx_state;
  76
  77 qemu_irq *ioapic_irq_hack;
  78
  79 typedef struct isa_irq_state {
  80     qemu_irq *i8259;
  81     qemu_irq *ioapic;
  82 } IsaIrqState;
  83
  84 static void isa_irq_handler(void *opaque, int n, int level)
  85 {
  86     IsaIrqState *isa = (IsaIrqState *)opaque;
  87
  88     if (n < 16) {
  89         qemu_set_irq(isa->i8259[n], level);
  90     }
  91     if (isa->ioapic)
  92         qemu_set_irq(isa->ioapic[n], level);
  93 };
  94
  95 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  96 {
  97 }
  98
  99 /* MSDOS compatibility mode FPU exception support */
 100 static qemu_irq ferr_irq;
 101 /* XXX: add IGNNE support */
 102 void cpu_set_ferr(CPUX86State *s)
 103 {
 104     qemu_irq_raise(ferr_irq);
 105 }
 106
 107 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
 108 {
 109     qemu_irq_lower(ferr_irq);
 110 }
 111
 112 /* TSC handling */
 113 uint64_t cpu_get_tsc(CPUX86State *env)
 114 {
 115     return cpu_get_ticks();
 116 }
 117
 118 /* SMM support */
 119 void cpu_smm_update(CPUState *env)
 120 {
 121     if (i440fx_state && env == first_cpu)
 122         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
 123 }
 124
 125
 126 /* IRQ handling */
 127 int cpu_get_pic_interrupt(CPUState *env)
 128 {
 129     int intno;
 130
 131     intno = apic_get_interrupt(env);
 132     if (intno >= 0) {
 133         /* set irq request if a PIC irq is still pending */
 134         /* XXX: improve that */
 135         pic_update_irq(isa_pic);
 136         return intno;
 137     }
 138     /* read the irq from the PIC */
 139     if (!apic_accept_pic_intr(env))
 140         return -1;
 141
 142     intno = pic_read_irq(isa_pic);
 143     return intno;
 144 }
 145
 146 static void pic_irq_request(void *opaque, int irq, int level)
 147 {
 148     CPUState *env = first_cpu;
 149
 150     if (env->apic_state) {
 151         while (env) {
 152             if (apic_accept_pic_intr(env))
 153                 apic_deliver_pic_intr(env, level);
 154             env = env->next_cpu;
 155         }
 156     } else {
 157         if (level)
 158             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 159         else
 160             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 161     }
 162 }
 163
 164 /* PC cmos mappings */
 165
 166 #define REG_EQUIPMENT_BYTE          0x14
 167
 168 static int cmos_get_fd_drive_type(int fd0)
 169 {
 170     int val;
 171
 172     switch (fd0) {
 173     case 0:
 174         /* 1.44 Mb 3"5 drive */
 175         val = 4;
 176         break;
 177     case 1:
 178         /* 2.88 Mb 3"5 drive */
 179         val = 5;
 180         break;
 181     case 2:
 182         /* 1.2 Mb 5"5 drive */
 183         val = 2;
 184         break;
 185     default:
 186         val = 0;
 187         break;
 188     }
 189     return val;
 190 }
 191
 192 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 193 {
 194     RTCState *s = rtc_state;
 195     int cylinders, heads, sectors;
 196     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 197     rtc_set_memory(s, type_ofs, 47);
 198     rtc_set_memory(s, info_ofs, cylinders);
 199     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 200     rtc_set_memory(s, info_ofs + 2, heads);
 201     rtc_set_memory(s, info_ofs + 3, 0xff);
 202     rtc_set_memory(s, info_ofs + 4, 0xff);
 203     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 204     rtc_set_memory(s, info_ofs + 6, cylinders);
 205     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 206     rtc_set_memory(s, info_ofs + 8, sectors);
 207 }
 208
 209 /* convert boot_device letter to something recognizable by the bios */
 210 static int boot_device2nibble(char boot_device)
 211 {
 212     switch(boot_device) {
 213     case 'a':
 214     case 'b':
 215         return 0x01; /* floppy boot */
 216     case 'c':
 217         return 0x02; /* hard drive boot */
 218     case 'd':
 219         return 0x03; /* CD-ROM boot */
 220     case 'n':
 221         return 0x04; /* Network boot */
 222     }
 223     return 0;
 224 }
 225
 226 /* copy/pasted from cmos_init, should be made a general function
 227  and used there as well */
 228 static int pc_boot_set(void *opaque, const char *boot_device)
 229 {
 230     Monitor *mon = cur_mon;
 231 #define PC_MAX_BOOT_DEVICES 3
 232     RTCState *s = (RTCState *)opaque;
 233     int nbds, bds[3] = { 0, };
 234     int i;
 235
 236     nbds = strlen(boot_device);
 237     if (nbds > PC_MAX_BOOT_DEVICES) {
 238         monitor_printf(mon, "Too many boot devices for PC\n");
 239         return(1);
 240     }
 241     for (i = 0; i < nbds; i++) {
 242         bds[i] = boot_device2nibble(boot_device[i]);
 243         if (bds[i] == 0) {
 244             monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
 245                            boot_device[i]);
 246             return(1);
 247         }
 248     }
 249     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 250     rtc_set_memory(s, 0x38, (bds[2] << 4));
 251     return(0);
 252 }
 253
 254 /* hd_table must contain 4 block drivers */
 255 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 256                       const char *boot_device, DriveInfo **hd_table)
 257 {
 258     RTCState *s = rtc_state;
 259     int nbds, bds[3] = { 0, };
 260     int val;
 261     int fd0, fd1, nb;
 262     int i;
 263
 264     /* various important CMOS locations needed by PC/Bochs bios */
 265
 266     /* memory size */
 267     val = 640; /* base memory in K */
 268     rtc_set_memory(s, 0x15, val);
 269     rtc_set_memory(s, 0x16, val >> 8);
 270
 271     val = (ram_size / 1024) - 1024;
 272     if (val > 65535)
 273         val = 65535;
 274     rtc_set_memory(s, 0x17, val);
 275     rtc_set_memory(s, 0x18, val >> 8);
 276     rtc_set_memory(s, 0x30, val);
 277     rtc_set_memory(s, 0x31, val >> 8);
 278
 279     if (above_4g_mem_size) {
 280         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 281         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 282         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 283     }
 284
 285     if (ram_size > (16 * 1024 * 1024))
 286         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 287     else
 288         val = 0;
 289     if (val > 65535)
 290         val = 65535;
 291     rtc_set_memory(s, 0x34, val);
 292     rtc_set_memory(s, 0x35, val >> 8);
 293
 294     /* set the number of CPU */
 295     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 296
 297     /* set boot devices, and disable floppy signature check if requested */
 298 #define PC_MAX_BOOT_DEVICES 3
 299     nbds = strlen(boot_device);
 300     if (nbds > PC_MAX_BOOT_DEVICES) {
 301         fprintf(stderr, "Too many boot devices for PC\n");
 302         exit(1);
 303     }
 304     for (i = 0; i < nbds; i++) {
 305         bds[i] = boot_device2nibble(boot_device[i]);
 306         if (bds[i] == 0) {
 307             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 308                     boot_device[i]);
 309             exit(1);
 310         }
 311     }
 312     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 313     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 314
 315     /* floppy type */
 316
 317     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 318     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 319
 320     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 321     rtc_set_memory(s, 0x10, val);
 322
 323     val = 0;
 324     nb = 0;
 325     if (fd0 < 3)
 326         nb++;
 327     if (fd1 < 3)
 328         nb++;
 329     switch (nb) {
 330     case 0:
 331         break;
 332     case 1:
 333         val |= 0x01; /* 1 drive, ready for boot */
 334         break;
 335     case 2:
 336         val |= 0x41; /* 2 drives, ready for boot */
 337         break;
 338     }
 339     val |= 0x02; /* FPU is there */
 340     val |= 0x04; /* PS/2 mouse installed */
 341     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 342
 343     /* hard drives */
 344
 345     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 346     if (hd_table[0])
 347         cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
 348     if (hd_table[1])
 349         cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
 350
 351     val = 0;
 352     for (i = 0; i < 4; i++) {
 353         if (hd_table[i]) {
 354             int cylinders, heads, sectors, translation;
 355             /* NOTE: bdrv_get_geometry_hint() returns the physical
 356                 geometry.  It is always such that: 1 <= sects <= 63, 1
 357                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 358                 geometry can be different if a translation is done. */
 359             translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
 360             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 361                 bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
 362                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 363                     /* No translation. */
 364                     translation = 0;
 365                 } else {
 366                     /* LBA translation. */
 367                     translation = 1;
 368                 }
 369             } else {
 370                 translation--;
 371             }
 372             val |= translation << (i * 2);
 373         }
 374     }
 375     rtc_set_memory(s, 0x39, val);
 376 }
 377
 378 void ioport_set_a20(int enable)
 379 {
 380     /* XXX: send to all CPUs ? */
 381     cpu_x86_set_a20(first_cpu, enable);
 382 }
 383
 384 int ioport_get_a20(void)
 385 {
 386     return ((first_cpu->a20_mask >> 20) & 1);
 387 }
 388
 389 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 390 {
 391     ioport_set_a20((val >> 1) & 1);
 392     /* XXX: bit 0 is fast reset */
 393 }
 394
 395 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 396 {
 397     return ioport_get_a20() << 1;
 398 }
 399
 400 /***********************************************************/
 401 /* Bochs BIOS debug ports */
 402
 403 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 404 {
 405     static const char shutdown_str[8] = "Shutdown";
 406     static int shutdown_index = 0;
 407
 408     switch(addr) {
 409         /* Bochs BIOS messages */
 410     case 0x400:
 411     case 0x401:
 412         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 413         exit(1);
 414     case 0x402:
 415     case 0x403:
 416 #ifdef DEBUG_BIOS
 417         fprintf(stderr, "%c", val);
 418 #endif
 419         break;
 420     case 0x8900:
 421         /* same as Bochs power off */
 422         if (val == shutdown_str[shutdown_index]) {
 423             shutdown_index++;
 424             if (shutdown_index == 8) {
 425                 shutdown_index = 0;
 426                 qemu_system_shutdown_request();
 427             }
 428         } else {
 429             shutdown_index = 0;
 430         }
 431         break;
 432
 433         /* LGPL'ed VGA BIOS messages */
 434     case 0x501:
 435     case 0x502:
 436         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 437         exit(1);
 438     case 0x500:
 439     case 0x503:
 440 #ifdef DEBUG_BIOS
 441         fprintf(stderr, "%c", val);
 442 #endif
 443         break;
 444     }
 445 }
 446
 447 static void *bochs_bios_init(void)
 448 {
 449     void *fw_cfg;
 450     uint8_t *smbios_table;
 451     size_t smbios_len;
 452     uint64_t *numa_fw_cfg;
 453     int i, j;
 454
 455     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 456     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 457     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 458     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 459     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 460
 461     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 462     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 463     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 464     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 465
 466     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 467
 468     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 469     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 470     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
 471                      acpi_tables_len);
 472     fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
 473
 474     smbios_table = smbios_get_table(&smbios_len);
 475     if (smbios_table)
 476         fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
 477                          smbios_table, smbios_len);
 478
 479     /* allocate memory for the NUMA channel: one (64bit) word for the number
 480      * of nodes, one word for each VCPU->node and one word for each node to
 481      * hold the amount of memory.
 482      */
 483     numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
 484     numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
 485     for (i = 0; i < smp_cpus; i++) {
 486         for (j = 0; j < nb_numa_nodes; j++) {
 487             if (node_cpumask[j] & (1 << i)) {
 488                 numa_fw_cfg[i + 1] = cpu_to_le64(j);
 489                 break;
 490             }
 491         }
 492     }
 493     for (i = 0; i < nb_numa_nodes; i++) {
 494         numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
 495     }
 496     fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
 497                      (1 + smp_cpus + nb_numa_nodes) * 8);
 498
 499     return fw_cfg;
 500 }
 501
 502 static long get_file_size(FILE *f)
 503 {
 504     long where, size;
 505
 506     /* XXX: on Unix systems, using fstat() probably makes more sense */
 507
 508     where = ftell(f);
 509     fseek(f, 0, SEEK_END);
 510     size = ftell(f);
 511     fseek(f, where, SEEK_SET);
 512
 513     return size;
 514 }
 515
 516 #define MULTIBOOT_STRUCT_ADDR 0x9000
 517
 518 #if MULTIBOOT_STRUCT_ADDR > 0xf0000
 519 #error multiboot struct needs to fit in 16 bit real mode
 520 #endif
 521
 522 static int load_multiboot(void *fw_cfg,
 523                           FILE *f,
 524                           const char *kernel_filename,
 525                           const char *initrd_filename,
 526                           const char *kernel_cmdline,
 527                           uint8_t *header)
 528 {
 529     int i, is_multiboot = 0;
 530     uint32_t flags = 0;
 531     uint32_t mh_entry_addr;
 532     uint32_t mh_load_addr;
 533     uint32_t mb_kernel_size;
 534     uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
 535     uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
 536     uint32_t mb_mod_end;
 537     uint8_t bootinfo[0x500];
 538     uint32_t cmdline = 0x200;
 539     uint8_t *mb_kernel_data;
 540     uint8_t *mb_bootinfo_data;
 541
 542     /* Ok, let's see if it is a multiboot image.
 543        The header is 12x32bit long, so the latest entry may be 8192 - 48. */
 544     for (i = 0; i < (8192 - 48); i += 4) {
 545         if (ldl_p(header+i) == 0x1BADB002) {
 546             uint32_t checksum = ldl_p(header+i+8);
 547             flags = ldl_p(header+i+4);
 548             checksum += flags;
 549             checksum += (uint32_t)0x1BADB002;
 550             if (!checksum) {
 551                 is_multiboot = 1;
 552                 break;
 553             }
 554         }
 555     }
 556
 557     if (!is_multiboot)
 558         return 0; /* no multiboot */
 559
 560 #ifdef DEBUG_MULTIBOOT
 561     fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
 562 #endif
 563     memset(bootinfo, 0, sizeof(bootinfo));
 564
 565     if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
 566         fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
 567     }
 568     if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
 569         uint64_t elf_entry;
 570         uint64_t elf_low, elf_high;
 571         int kernel_size;
 572         fclose(f);
 573         kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_low, &elf_high,
 574                                0, ELF_MACHINE, 0);
 575         if (kernel_size < 0) {
 576             fprintf(stderr, "Error while loading elf kernel\n");
 577             exit(1);
 578         }
 579         mh_load_addr = elf_low;
 580         mb_kernel_size = elf_high - elf_low;
 581         mh_entry_addr = elf_entry;
 582
 583         mb_kernel_data = qemu_malloc(mb_kernel_size);
 584         if (rom_copy(mb_kernel_data, mh_load_addr, mb_kernel_size) != mb_kernel_size) {
 585             fprintf(stderr, "Error while fetching elf kernel from rom\n");
 586             exit(1);
 587         }
 588
 589 #ifdef DEBUG_MULTIBOOT
 590         fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
 591                 mb_kernel_size, (size_t)mh_entry_addr);
 592 #endif
 593     } else {
 594         /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
 595         uint32_t mh_header_addr = ldl_p(header+i+12);
 596         mh_load_addr = ldl_p(header+i+16);
 597 #ifdef DEBUG_MULTIBOOT
 598         uint32_t mh_load_end_addr = ldl_p(header+i+20);
 599         uint32_t mh_bss_end_addr = ldl_p(header+i+24);
 600 #endif
 601         uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
 602
 603         mh_entry_addr = ldl_p(header+i+28);
 604         mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
 605
 606         /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
 607         uint32_t mh_mode_type = ldl_p(header+i+32);
 608         uint32_t mh_width = ldl_p(header+i+36);
 609         uint32_t mh_height = ldl_p(header+i+40);
 610         uint32_t mh_depth = ldl_p(header+i+44); */
 611
 612 #ifdef DEBUG_MULTIBOOT
 613         fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
 614         fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
 615         fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
 616         fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
 617         fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
 618                 mb_kernel_size, mh_load_addr);
 619 #endif
 620
 621         mb_kernel_data = qemu_malloc(mb_kernel_size);
 622         fseek(f, mb_kernel_text_offset, SEEK_SET);
 623         fread(mb_kernel_data, 1, mb_kernel_size, f);
 624         fclose(f);
 625     }
 626
 627     /* blob size is only the kernel for now */
 628     mb_mod_end = mh_load_addr + mb_kernel_size;
 629
 630     /* load modules */
 631     stl_p(bootinfo + 20, 0x0); /* mods_count */
 632     if (initrd_filename) {
 633         uint32_t mb_mod_info = 0x100;
 634         uint32_t mb_mod_cmdline = 0x300;
 635         uint32_t mb_mod_start = mh_load_addr;
 636         uint32_t mb_mod_length = mb_kernel_size;
 637         char *next_initrd;
 638         char *next_space;
 639         int mb_mod_count = 0;
 640
 641         do {
 642             if (mb_mod_info + 16 > mb_mod_cmdline) {
 643                 printf("WARNING: Too many modules loaded, aborting.\n");
 644                 break;
 645             }
 646
 647             next_initrd = strchr(initrd_filename, ',');
 648             if (next_initrd)
 649                 *next_initrd = '\0';
 650             /* if a space comes after the module filename, treat everything
 651                after that as parameters */
 652             pstrcpy((char*)bootinfo + mb_mod_cmdline,
 653                     sizeof(bootinfo) - mb_mod_cmdline,
 654                     initrd_filename);
 655             stl_p(bootinfo + mb_mod_info + 8, mb_bootinfo + mb_mod_cmdline); /* string */
 656             mb_mod_cmdline += strlen(initrd_filename) + 1;
 657             if (mb_mod_cmdline > sizeof(bootinfo)) {
 658                 mb_mod_cmdline = sizeof(bootinfo);
 659                 printf("WARNING: Too many module cmdlines loaded, aborting.\n");
 660                 break;
 661             }
 662             if ((next_space = strchr(initrd_filename, ' ')))
 663                 *next_space = '\0';
 664 #ifdef DEBUG_MULTIBOOT
 665             printf("multiboot loading module: %s\n", initrd_filename);
 666 #endif
 667             mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
 668                          & (TARGET_PAGE_MASK);
 669             mb_mod_length = get_image_size(initrd_filename);
 670             if (mb_mod_length < 0) {
 671                 fprintf(stderr, "failed to get %s image size\n", initrd_filename);
 672                 exit(1);
 673             }
 674             mb_mod_end = mb_mod_start + mb_mod_length;
 675             mb_mod_count++;
 676
 677             /* append module data at the end of last module */
 678             mb_kernel_data = qemu_realloc(mb_kernel_data,
 679                                           mb_mod_end - mh_load_addr);
 680             load_image(initrd_filename,
 681                        mb_kernel_data + mb_mod_start - mh_load_addr);
 682
 683             stl_p(bootinfo + mb_mod_info + 0, mb_mod_start);
 684             stl_p(bootinfo + mb_mod_info + 4, mb_mod_start + mb_mod_length);
 685             stl_p(bootinfo + mb_mod_info + 12, 0x0); /* reserved */
 686 #ifdef DEBUG_MULTIBOOT
 687             printf("mod_start: %#x\nmod_end:   %#x\n", mb_mod_start,
 688                    mb_mod_start + mb_mod_length);
 689 #endif
 690             initrd_filename = next_initrd+1;
 691             mb_mod_info += 16;
 692         } while (next_initrd);
 693         stl_p(bootinfo + 20, mb_mod_count); /* mods_count */
 694         stl_p(bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
 695     }
 696
 697     /* Commandline support */
 698     stl_p(bootinfo + 16, mb_bootinfo + cmdline);
 699     snprintf((char*)bootinfo + cmdline, 0x100, "%s %s",
 700              kernel_filename, kernel_cmdline);
 701
 702     /* the kernel is where we want it to be now */
 703 #define MULTIBOOT_FLAGS_MEMORY (1 << 0)
 704 #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
 705 #define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
 706 #define MULTIBOOT_FLAGS_MODULES (1 << 3)
 707 #define MULTIBOOT_FLAGS_MMAP (1 << 6)
 708     stl_p(bootinfo, MULTIBOOT_FLAGS_MEMORY
 709                   | MULTIBOOT_FLAGS_BOOT_DEVICE
 710                   | MULTIBOOT_FLAGS_CMDLINE
 711                   | MULTIBOOT_FLAGS_MODULES
 712                   | MULTIBOOT_FLAGS_MMAP);
 713     stl_p(bootinfo + 4, 640); /* mem_lower */
 714     stl_p(bootinfo + 8, ram_size / 1024); /* mem_upper */
 715     stl_p(bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
 716     stl_p(bootinfo + 48, mmap_addr); /* mmap_addr */
 717
 718 #ifdef DEBUG_MULTIBOOT
 719     fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
 720 #endif
 721
 722     /* save bootinfo off the stack */
 723     mb_bootinfo_data = qemu_malloc(sizeof(bootinfo));
 724     memcpy(mb_bootinfo_data, bootinfo, sizeof(bootinfo));
 725
 726     /* Pass variables to option rom */
 727     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, mh_entry_addr);
 728     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr);
 729     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, mb_mod_end - mh_load_addr);
 730     fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, mb_kernel_data,
 731                      mb_mod_end - mh_load_addr);
 732
 733     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
 734     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, sizeof(bootinfo));
 735     fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, mb_bootinfo_data,
 736                      sizeof(bootinfo));
 737
 738     option_rom[nb_option_roms] = "multiboot.bin";
 739     nb_option_roms++;
 740
 741     return 1; /* yes, we are multiboot */
 742 }
 743
 744 static void load_linux(void *fw_cfg,
 745                        const char *kernel_filename,
 746                        const char *initrd_filename,
 747                        const char *kernel_cmdline,
 748                        target_phys_addr_t max_ram_size)
 749 {
 750     uint16_t protocol;
 751     int setup_size, kernel_size, initrd_size = 0, cmdline_size;
 752     uint32_t initrd_max;
 753     uint8_t header[8192], *setup, *kernel, *initrd_data;
 754     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
 755     FILE *f;
 756     char *vmode;
 757
 758     /* Align to 16 bytes as a paranoia measure */
 759     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 760
 761     /* load the kernel header */
 762     f = fopen(kernel_filename, "rb");
 763     if (!f || !(kernel_size = get_file_size(f)) ||
 764         fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
 765         MIN(ARRAY_SIZE(header), kernel_size)) {
 766         fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
 767                 kernel_filename, strerror(errno));
 768         exit(1);
 769     }
 770
 771     /* kernel protocol version */
 772 #if 0
 773     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 774 #endif
 775     if (ldl_p(header+0x202) == 0x53726448)
 776         protocol = lduw_p(header+0x206);
 777     else {
 778         /* This looks like a multiboot kernel. If it is, let's stop
 779            treating it like a Linux kernel. */
 780         if (load_multiboot(fw_cfg, f, kernel_filename,
 781                            initrd_filename, kernel_cmdline, header))
 782             return;
 783         protocol = 0;
 784     }
 785
 786     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 787         /* Low kernel */
 788         real_addr    = 0x90000;
 789         cmdline_addr = 0x9a000 - cmdline_size;
 790         prot_addr    = 0x10000;
 791     } else if (protocol < 0x202) {
 792         /* High but ancient kernel */
 793         real_addr    = 0x90000;
 794         cmdline_addr = 0x9a000 - cmdline_size;
 795         prot_addr    = 0x100000;
 796     } else {
 797         /* High and recent kernel */
 798         real_addr    = 0x10000;
 799         cmdline_addr = 0x20000;
 800         prot_addr    = 0x100000;
 801     }
 802
 803 #if 0
 804     fprintf(stderr,
 805             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 806             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 807             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 808             real_addr,
 809             cmdline_addr,
 810             prot_addr);
 811 #endif
 812
 813     /* highest address for loading the initrd */
 814     if (protocol >= 0x203)
 815         initrd_max = ldl_p(header+0x22c);
 816     else
 817         initrd_max = 0x37ffffff;
 818
 819     if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
 820         initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
 821
 822     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
 823     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
 824     fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
 825                      (uint8_t*)strdup(kernel_cmdline),
 826                      strlen(kernel_cmdline)+1);
 827
 828     if (protocol >= 0x202) {
 829         stl_p(header+0x228, cmdline_addr);
 830     } else {
 831         stw_p(header+0x20, 0xA33F);
 832         stw_p(header+0x22, cmdline_addr-real_addr);
 833     }
 834
 835     /* handle vga= parameter */
 836     vmode = strstr(kernel_cmdline, "vga=");
 837     if (vmode) {
 838         unsigned int video_mode;
 839         /* skip "vga=" */
 840         vmode += 4;
 841         if (!strncmp(vmode, "normal", 6)) {
 842             video_mode = 0xffff;
 843         } else if (!strncmp(vmode, "ext", 3)) {
 844             video_mode = 0xfffe;
 845         } else if (!strncmp(vmode, "ask", 3)) {
 846             video_mode = 0xfffd;
 847         } else {
 848             video_mode = strtol(vmode, NULL, 0);
 849         }
 850         stw_p(header+0x1fa, video_mode);
 851     }
 852
 853     /* loader type */
 854     /* High nybble = B reserved for Qemu; low nybble is revision number.
 855        If this code is substantially changed, you may want to consider
 856        incrementing the revision. */
 857     if (protocol >= 0x200)
 858         header[0x210] = 0xB0;
 859
 860     /* heap */
 861     if (protocol >= 0x201) {
 862         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 863         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 864     }
 865
 866     /* load initrd */
 867     if (initrd_filename) {
 868         if (protocol < 0x200) {
 869             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 870             exit(1);
 871         }
 872
 873         initrd_size = get_image_size(initrd_filename);
 874         initrd_addr = (initrd_max-initrd_size) & ~4095;
 875
 876         initrd_data = qemu_malloc(initrd_size);
 877         load_image(initrd_filename, initrd_data);
 878
 879         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
 880         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 881         fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
 882
 883         stl_p(header+0x218, initrd_addr);
 884         stl_p(header+0x21c, initrd_size);
 885     }
 886
 887     /* load kernel and setup */
 888     setup_size = header[0x1f1];
 889     if (setup_size == 0)
 890         setup_size = 4;
 891     setup_size = (setup_size+1)*512;
 892     kernel_size -= setup_size;
 893
 894     setup  = qemu_malloc(setup_size);
 895     kernel = qemu_malloc(kernel_size);
 896     fseek(f, 0, SEEK_SET);
 897     fread(setup, 1, setup_size, f);
 898     fread(kernel, 1, kernel_size, f);
 899     fclose(f);
 900     memcpy(setup, header, MIN(sizeof(header), setup_size));
 901
 902     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
 903     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 904     fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
 905
 906     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
 907     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
 908     fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
 909
 910     option_rom[nb_option_roms] = "linuxboot.bin";
 911     nb_option_roms++;
 912 }
 913
 914 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 915 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 916 static const int ide_irq[2] = { 14, 15 };
 917
 918 #define NE2000_NB_MAX 6
 919
 920 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
 921                                               0x280, 0x380 };
 922 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 923
 924 static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 925 static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 926
 927 #ifdef HAS_AUDIO
 928 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 929 {
 930     struct soundhw *c;
 931
 932     for (c = soundhw; c->name; ++c) {
 933         if (c->enabled) {
 934             if (c->isa) {
 935                 c->init.init_isa(pic);
 936             } else {
 937                 if (pci_bus) {
 938                     c->init.init_pci(pci_bus);
 939                 }
 940             }
 941         }
 942     }
 943 }
 944 #endif
 945
 946 static void pc_init_ne2k_isa(NICInfo *nd)
 947 {
 948     static int nb_ne2k = 0;
 949
 950     if (nb_ne2k == NE2000_NB_MAX)
 951         return;
 952     isa_ne2000_init(ne2000_io[nb_ne2k],
 953                     ne2000_irq[nb_ne2k], nd);
 954     nb_ne2k++;
 955 }
 956
 957 int cpu_is_bsp(CPUState *env)
 958 {
 959     return env->cpuid_apic_id == 0;
 960 }
 961
 962 CPUState *pc_new_cpu(const char *cpu_model)
 963 {
 964     CPUState *env;
 965
 966     env = cpu_init(cpu_model);
 967     if (!env) {
 968         fprintf(stderr, "Unable to find x86 CPU definition\n");
 969         exit(1);
 970     }
 971     env->kvm_cpu_state.regs_modified = 1;
 972     if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
 973         env->cpuid_apic_id = env->cpu_index;
 974         /* APIC reset callback resets cpu */
 975         apic_init(env);
 976     } else {
 977         qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
 978     }
 979
 980     /* kvm needs this to run after the apic is initialized. Otherwise,
 981      * it can access invalid state and crash.
 982      */
 983     qemu_init_vcpu(env);
 984     return env;
 985 }
 986
 987 /* PC hardware initialisation */
 988 static void pc_init1(ram_addr_t ram_size,
 989                      const char *boot_device,
 990                      const char *kernel_filename,
 991                      const char *kernel_cmdline,
 992                      const char *initrd_filename,
 993                      const char *cpu_model,
 994                      int pci_enabled)
 995 {
 996     char *filename;
 997     int ret, linux_boot, i;
 998     ram_addr_t ram_addr, bios_offset, option_rom_offset;
 999     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1000     int bios_size, isa_bios_size;
1001     PCIBus *pci_bus;
1002     ISADevice *isa_dev;
1003     int piix3_devfn = -1;
1004     CPUState *env;
1005     qemu_irq *cpu_irq;
1006     qemu_irq *isa_irq;
1007     qemu_irq *i8259;
1008     IsaIrqState *isa_irq_state;
1009     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1010     DriveInfo *fd[MAX_FD];
1011     void *fw_cfg;
1012
1013     if (ram_size >= 0xe0000000 ) {
1014         above_4g_mem_size = ram_size - 0xe0000000;
1015         below_4g_mem_size = 0xe0000000;
1016     } else {
1017         below_4g_mem_size = ram_size;
1018     }
1019
1020     linux_boot = (kernel_filename != NULL);
1021
1022     /* init CPUs */
1023     if (cpu_model == NULL) {
1024 #ifdef TARGET_X86_64
1025         cpu_model = "qemu64";
1026 #else
1027         cpu_model = "qemu32";
1028 #endif
1029     }
1030
1031     if (kvm_enabled()) {
1032         kvm_set_boot_cpu_id(0);
1033     }
1034     for (i = 0; i < smp_cpus; i++) {
1035         env = pc_new_cpu(cpu_model);
1036     }
1037
1038     vmport_init();
1039
1040     /* allocate RAM */
1041     ram_addr = qemu_ram_alloc(below_4g_mem_size);
1042     cpu_register_physical_memory(0, 0xa0000, ram_addr);
1043     cpu_register_physical_memory(0x100000,
1044                  below_4g_mem_size - 0x100000,
1045                  ram_addr + 0x100000);
1046
1047     /* above 4giga memory allocation */
1048     if (above_4g_mem_size > 0) {
1049 #if TARGET_PHYS_ADDR_BITS == 32
1050         hw_error("To much RAM for 32-bit physical address");
1051 #else
1052         ram_addr = qemu_ram_alloc(above_4g_mem_size);
1053         cpu_register_physical_memory(0x100000000ULL,
1054                                      above_4g_mem_size,
1055                                      ram_addr);
1056 #endif
1057     }
1058
1059
1060     /* BIOS load */
1061     if (bios_name == NULL)
1062         bios_name = BIOS_FILENAME;
1063     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1064     if (filename) {
1065         bios_size = get_image_size(filename);
1066     } else {
1067         bios_size = -1;
1068     }
1069     if (bios_size <= 0 ||
1070         (bios_size % 65536) != 0) {
1071         goto bios_error;
1072     }
1073     bios_offset = qemu_ram_alloc(bios_size);
1074     ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
1075     if (ret != 0) {
1076     bios_error:
1077         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1078         exit(1);
1079     }
1080     if (filename) {
1081         qemu_free(filename);
1082     }
1083     /* map the last 128KB of the BIOS in ISA space */
1084     isa_bios_size = bios_size;
1085     if (isa_bios_size > (128 * 1024))
1086         isa_bios_size = 128 * 1024;
1087     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
1088                                  IO_MEM_UNASSIGNED);
1089     /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
1090     cpu_register_physical_memory(0x100000 - isa_bios_size,
1091                                  isa_bios_size,
1092                                  (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
1093
1094     if (extboot_drive) {
1095         option_rom[nb_option_roms++] = qemu_strdup(EXTBOOT_FILENAME);
1096     }
1097     option_rom[nb_option_roms++] = qemu_strdup(VAPIC_FILENAME);
1098
1099     rom_enable_driver_roms = 1;
1100     option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
1101     cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
1102
1103     /* map all the bios at the top of memory */
1104     cpu_register_physical_memory((uint32_t)(-bios_size),
1105                                  bios_size, bios_offset | IO_MEM_ROM);
1106
1107     fw_cfg = bochs_bios_init();
1108
1109     if (linux_boot) {
1110         load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1111     }
1112
1113     for (i = 0; i < nb_option_roms; i++) {
1114         rom_add_option(option_rom[i]);
1115     }
1116
1117     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1118 #ifdef KVM_CAP_IRQCHIP
1119     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
1120         isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1121         isa_irq = i8259 = kvm_i8259_init(cpu_irq[0]);
1122     } else
1123 #endif
1124     {
1125         i8259 = i8259_init(cpu_irq[0]);
1126         isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1127         isa_irq_state->i8259 = i8259;
1128         isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1129     }
1130
1131     if (pci_enabled) {
1132         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
1133     } else {
1134         pci_bus = NULL;
1135         isa_bus_new(NULL);
1136     }
1137     isa_bus_irqs(isa_irq);
1138
1139     ferr_irq = isa_reserve_irq(13);
1140
1141     /* init basic PC hardware */
1142     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1143
1144     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1145
1146     if (cirrus_vga_enabled) {
1147         if (pci_enabled) {
1148             pci_cirrus_vga_init(pci_bus);
1149         } else {
1150             isa_cirrus_vga_init();
1151         }
1152     } else if (vmsvga_enabled) {
1153         if (pci_enabled)
1154             pci_vmsvga_init(pci_bus);
1155         else
1156             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1157     } else if (std_vga_enabled) {
1158         if (pci_enabled) {
1159             pci_vga_init(pci_bus, 0, 0);
1160         } else {
1161             isa_vga_init();
1162         }
1163     }
1164
1165     rtc_state = rtc_init(2000);
1166
1167     qemu_register_boot_set(pc_boot_set, rtc_state);
1168
1169     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1170     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1171
1172     if (pci_enabled) {
1173         isa_irq_state->ioapic = ioapic_init();
1174         ioapic_irq_hack = isa_irq;
1175     }
1176 #ifdef CONFIG_KVM_PIT
1177     if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1178         pit = kvm_pit_init(0x40, isa_reserve_irq(0));
1179     else
1180 #endif
1181         pit = pit_init(0x40, isa_reserve_irq(0));
1182     pcspk_init(pit);
1183     if (!no_hpet) {
1184         hpet_init(isa_irq);
1185     }
1186
1187     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1188         if (serial_hds[i]) {
1189             serial_isa_init(i, serial_hds[i]);
1190         }
1191     }
1192
1193     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1194         if (parallel_hds[i]) {
1195             parallel_init(i, parallel_hds[i]);
1196         }
1197     }
1198
1199     for(i = 0; i < nb_nics; i++) {
1200         NICInfo *nd = &nd_table[i];
1201
1202         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1203             pc_init_ne2k_isa(nd);
1204         else
1205             pci_nic_init_nofail(nd, "rtl8139", NULL);
1206     }
1207
1208     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1209         fprintf(stderr, "qemu: too many IDE bus\n");
1210         exit(1);
1211     }
1212
1213     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1214         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1215     }
1216
1217     if (pci_enabled) {
1218         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
1219     } else {
1220         for(i = 0; i < MAX_IDE_BUS; i++) {
1221             isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
1222                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1223         }
1224     }
1225
1226     isa_dev = isa_create_simple("i8042");
1227     DMA_init(0);
1228 #ifdef HAS_AUDIO
1229     audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1230 #endif
1231
1232     for(i = 0; i < MAX_FD; i++) {
1233         fd[i] = drive_get(IF_FLOPPY, 0, i);
1234     }
1235     floppy_controller = fdctrl_init_isa(fd);
1236
1237     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1238
1239     if (pci_enabled && usb_enabled) {
1240         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1241     }
1242
1243     if (pci_enabled && acpi_enabled) {
1244         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1245         i2c_bus *smbus;
1246
1247         /* TODO: Populate SPD eeprom data.  */
1248         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
1249                               isa_reserve_irq(9));
1250         for (i = 0; i < 8; i++) {
1251             DeviceState *eeprom;
1252             eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1253             qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1254             qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1255             qdev_init_nofail(eeprom);
1256         }
1257         piix4_acpi_system_hot_add_init(pci_bus, cpu_model);
1258     }
1259
1260     if (i440fx_state) {
1261         i440fx_init_memory_mappings(i440fx_state);
1262     }
1263
1264     if (pci_enabled) {
1265         int max_bus;
1266         int bus;
1267
1268         max_bus = drive_get_max_bus(IF_SCSI);
1269         for (bus = 0; bus <= max_bus; bus++) {
1270             pci_create_simple(pci_bus, -1, "lsi53c895a");
1271         }
1272     }
1273
1274     if (extboot_drive) {
1275         DriveInfo *info = extboot_drive;
1276         int cyls, heads, secs;
1277
1278         if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1279             bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1280             bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1281         }
1282
1283         extboot_init(info->bdrv, 1);
1284     }
1285
1286     /* Add virtio console devices */
1287     if (pci_enabled) {
1288         for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1289             if (virtcon_hds[i]) {
1290                 pci_create_simple(pci_bus, -1, "virtio-console-pci");
1291             }
1292         }
1293     }
1294
1295 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
1296     if (kvm_enabled()) {
1297         add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1298     }
1299 #endif /* CONFIG_KVM_DEVICE_ASSIGNMENT */
1300 }
1301
1302 static void pc_init_pci(ram_addr_t ram_size,
1303                         const char *boot_device,
1304                         const char *kernel_filename,
1305                         const char *kernel_cmdline,
1306                         const char *initrd_filename,
1307                         const char *cpu_model)
1308 {
1309     pc_init1(ram_size, boot_device,
1310              kernel_filename, kernel_cmdline,
1311              initrd_filename, cpu_model, 1);
1312 }
1313
1314 static void pc_init_isa(ram_addr_t ram_size,
1315                         const char *boot_device,
1316                         const char *kernel_filename,
1317                         const char *kernel_cmdline,
1318                         const char *initrd_filename,
1319                         const char *cpu_model)
1320 {
1321     if (cpu_model == NULL)
1322         cpu_model = "486";
1323     pc_init1(ram_size, boot_device,
1324              kernel_filename, kernel_cmdline,
1325              initrd_filename, cpu_model, 0);
1326 }
1327
1328 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1329    BIOS will read it and start S3 resume at POST Entry */
1330 void cmos_set_s3_resume(void)
1331 {
1332     if (rtc_state)
1333         rtc_set_memory(rtc_state, 0xF, 0xFE);
1334 }
1335
1336 static QEMUMachine pc_machine = {
1337     .name = "pc-0.11",
1338     .alias = "pc",
1339     .desc = "Standard PC",
1340     .init = pc_init_pci,
1341     .max_cpus = 255,
1342     .is_default = 1,
1343 };
1344
1345 static QEMUMachine pc_machine_v0_10 = {
1346     .name = "pc-0.10",
1347     .desc = "Standard PC, qemu 0.10",
1348     .init = pc_init_pci,
1349     .max_cpus = 255,
1350     .compat_props = (GlobalProperty[]) {
1351         {
1352             .driver   = "virtio-blk-pci",
1353             .property = "class",
1354             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
1355         },{
1356             .driver   = "virtio-console-pci",
1357             .property = "class",
1358             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
1359         },{
1360             .driver   = "virtio-net-pci",
1361             .property = "vectors",
1362             .value    = stringify(0),
1363         },{
1364             .driver   = "virtio-blk-pci",
1365             .property = "vectors",
1366             .value    = stringify(0),
1367         },
1368         { /* end of list */ }
1369     },
1370 };
1371
1372 static QEMUMachine isapc_machine = {
1373     .name = "isapc",
1374     .desc = "ISA-only PC",
1375     .init = pc_init_isa,
1376     .max_cpus = 1,
1377 };
1378
1379 static void pc_machine_init(void)
1380 {
1381     qemu_register_machine(&pc_machine);
1382     qemu_register_machine(&pc_machine_v0_10);
1383     qemu_register_machine(&isapc_machine);
1384 }
1385
1386 machine_init(pc_machine_init);