Merge branch 'master' of git://git.sv.gnu.org/qemu into next
[qemu/qemu-dev-zwu.git] / hw / device-assignment.h
blob9a3ea12c9aede150414763acf9899ed913e3b051
1 /*
2 * Copyright (c) 2007, Neocleus Corporation.
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Data structures for storing PCI state
20 * Adapted to kvm by Qumranet
22 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
23 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
24 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
25 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
28 #ifndef __DEVICE_ASSIGNMENT_H__
29 #define __DEVICE_ASSIGNMENT_H__
31 #include <sys/mman.h>
32 #include "qemu-common.h"
33 #include "qemu-queue.h"
34 #include "pci.h"
36 /* From include/linux/pci.h in the kernel sources */
37 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
39 typedef struct PCIHostDevice {
40 int seg;
41 int bus;
42 int dev;
43 int func;
44 } PCIHostDevice;
46 typedef struct {
47 int type; /* Memory or port I/O */
48 int valid;
49 uint32_t base_addr;
50 uint32_t size; /* size of the region */
51 int resource_fd;
52 } PCIRegion;
54 typedef struct {
55 uint8_t bus, dev, func; /* Bus inside domain, device and function */
56 int irq; /* IRQ number */
57 uint16_t region_number; /* number of active regions */
59 /* Port I/O or MMIO Regions */
60 PCIRegion regions[PCI_NUM_REGIONS];
61 int config_fd;
62 } PCIDevRegions;
64 typedef struct {
65 pcibus_t e_physbase;
66 ram_addr_t memory_index;
67 union {
68 void *r_virtbase; /* mmapped access address for memory regions */
69 uint32_t r_baseport; /* the base guest port for I/O regions */
70 } u;
71 int num; /* our index within v_addrs[] */
72 pcibus_t e_size; /* emulated size of region in bytes */
73 pcibus_t r_size; /* real size of region in bytes */
74 PCIRegion *region;
75 } AssignedDevRegion;
77 typedef struct AssignedDevice {
78 PCIDevice dev;
79 PCIHostDevice host;
80 uint32_t use_iommu;
81 int intpin;
82 uint8_t debug_flags;
83 AssignedDevRegion v_addrs[PCI_NUM_REGIONS];
84 PCIDevRegions real_device;
85 int run;
86 int girq;
87 unsigned int h_segnr;
88 unsigned char h_busnr;
89 unsigned int h_devfn;
90 int irq_requested_type;
91 int bound;
92 struct {
93 #define ASSIGNED_DEVICE_CAP_MSI (1 << 0)
94 #define ASSIGNED_DEVICE_CAP_MSIX (1 << 1)
95 uint32_t available;
96 #define ASSIGNED_DEVICE_MSI_ENABLED (1 << 0)
97 #define ASSIGNED_DEVICE_MSIX_ENABLED (1 << 1)
98 #define ASSIGNED_DEVICE_MSIX_MASKED (1 << 2)
99 uint32_t state;
100 } cap;
101 int irq_entries_nr;
102 struct kvm_irq_routing_entry *entry;
103 void *msix_table_page;
104 target_phys_addr_t msix_table_addr;
105 int mmio_index;
106 int need_emulate_cmd;
107 char *configfd_name;
108 QLIST_ENTRY(AssignedDevice) next;
109 } AssignedDevice;
111 QemuOpts *add_assigned_device(const char *arg);
112 void add_assigned_devices(PCIBus *bus, const char **devices, int n_devices);
113 void assigned_dev_update_irqs(void);
115 #define MAX_DEV_ASSIGN_CMDLINE 8
117 extern const char *assigned_devices[MAX_DEV_ASSIGN_CMDLINE];
118 extern int assigned_devices_index;
120 #endif /* __DEVICE_ASSIGNMENT_H__ */