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Remove pcbios subdirectory
[qemu/qemu-dev-zwu.git] / hw / pc.c
blob97685d56e988caf75381188efe900e8d6f648f5a
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "vmware_vga.h"
29 #include "usb-uhci.h"
30 #include "usb-ohci.h"
31 #include "prep_pci.h"
32 #include "apb_pci.h"
33 #include "block.h"
34 #include "sysemu.h"
35 #include "audio/audio.h"
36 #include "net.h"
37 #include "smbus.h"
38 #include "boards.h"
39 #include "monitor.h"
40 #include "fw_cfg.h"
41 #include "hpet_emul.h"
42 #include "watchdog.h"
43 #include "smbios.h"
44 #include "ide.h"
45 #include "loader.h"
46 #include "elf.h"
47 #include "device-assignment.h"
48
49 #include "qemu-kvm.h"
50
51 /* output Bochs bios info messages */
52 //#define DEBUG_BIOS
53
54 /* Show multiboot debug output */
55 //#define DEBUG_MULTIBOOT
56
57 #define BIOS_FILENAME "bios.bin"
58 #define EXTBOOT_FILENAME "extboot.bin"
59 #define VAPIC_FILENAME "vapic.bin"
60
61 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
62
63 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
64 #define ACPI_DATA_SIZE 0x10000
65 #define BIOS_CFG_IOPORT 0x510
66 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
67 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
68 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
69
70 #define MAX_IDE_BUS 2
71
72 static fdctrl_t *floppy_controller;
73 static RTCState *rtc_state;
74 static PITState *pit;
75 static PCII440FXState *i440fx_state;
76
77 qemu_irq *ioapic_irq_hack;
78
79 typedef struct isa_irq_state {
80 qemu_irq *i8259;
81 qemu_irq *ioapic;
82 } IsaIrqState;
83
84 static void isa_irq_handler(void *opaque, int n, int level)
85 {
86 IsaIrqState *isa = (IsaIrqState *)opaque;
87
88 if (n < 16) {
89 qemu_set_irq(isa->i8259[n], level);
90 }
91 if (isa->ioapic)
92 qemu_set_irq(isa->ioapic[n], level);
93 };
94
95 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
96 {
97 }
98
99 /* MSDOS compatibility mode FPU exception support */
100 static qemu_irq ferr_irq;
101 /* XXX: add IGNNE support */
102 void cpu_set_ferr(CPUX86State *s)
103 {
104 qemu_irq_raise(ferr_irq);
105 }
106
107 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
108 {
109 qemu_irq_lower(ferr_irq);
110 }
111
112 /* TSC handling */
113 uint64_t cpu_get_tsc(CPUX86State *env)
114 {
115 return cpu_get_ticks();
116 }
117
118 /* SMM support */
119 void cpu_smm_update(CPUState *env)
120 {
121 if (i440fx_state && env == first_cpu)
122 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
123 }
124
125
126 /* IRQ handling */
127 int cpu_get_pic_interrupt(CPUState *env)
128 {
129 int intno;
130
131 intno = apic_get_interrupt(env);
132 if (intno >= 0) {
133 /* set irq request if a PIC irq is still pending */
134 /* XXX: improve that */
135 pic_update_irq(isa_pic);
136 return intno;
137 }
138 /* read the irq from the PIC */
139 if (!apic_accept_pic_intr(env))
140 return -1;
141
142 intno = pic_read_irq(isa_pic);
143 return intno;
144 }
145
146 static void pic_irq_request(void *opaque, int irq, int level)
147 {
148 CPUState *env = first_cpu;
149
150 if (env->apic_state) {
151 while (env) {
152 if (apic_accept_pic_intr(env))
153 apic_deliver_pic_intr(env, level);
154 env = env->next_cpu;
155 }
156 } else {
157 if (level)
158 cpu_interrupt(env, CPU_INTERRUPT_HARD);
159 else
160 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
161 }
162 }
163
164 /* PC cmos mappings */
165
166 #define REG_EQUIPMENT_BYTE 0x14
167
168 static int cmos_get_fd_drive_type(int fd0)
169 {
170 int val;
171
172 switch (fd0) {
173 case 0:
174 /* 1.44 Mb 3"5 drive */
175 val = 4;
176 break;
177 case 1:
178 /* 2.88 Mb 3"5 drive */
179 val = 5;
180 break;
181 case 2:
182 /* 1.2 Mb 5"5 drive */
183 val = 2;
184 break;
185 default:
186 val = 0;
187 break;
188 }
189 return val;
190 }
191
192 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
193 {
194 RTCState *s = rtc_state;
195 int cylinders, heads, sectors;
196 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
197 rtc_set_memory(s, type_ofs, 47);
198 rtc_set_memory(s, info_ofs, cylinders);
199 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
200 rtc_set_memory(s, info_ofs + 2, heads);
201 rtc_set_memory(s, info_ofs + 3, 0xff);
202 rtc_set_memory(s, info_ofs + 4, 0xff);
203 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
204 rtc_set_memory(s, info_ofs + 6, cylinders);
205 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
206 rtc_set_memory(s, info_ofs + 8, sectors);
207 }
208
209 /* convert boot_device letter to something recognizable by the bios */
210 static int boot_device2nibble(char boot_device)
211 {
212 switch(boot_device) {
213 case 'a':
214 case 'b':
215 return 0x01; /* floppy boot */
216 case 'c':
217 return 0x02; /* hard drive boot */
218 case 'd':
219 return 0x03; /* CD-ROM boot */
220 case 'n':
221 return 0x04; /* Network boot */
222 }
223 return 0;
224 }
225
226 /* copy/pasted from cmos_init, should be made a general function
227 and used there as well */
228 static int pc_boot_set(void *opaque, const char *boot_device)
229 {
230 Monitor *mon = cur_mon;
231 #define PC_MAX_BOOT_DEVICES 3
232 RTCState *s = (RTCState *)opaque;
233 int nbds, bds[3] = { 0, };
234 int i;
235
236 nbds = strlen(boot_device);
237 if (nbds > PC_MAX_BOOT_DEVICES) {
238 monitor_printf(mon, "Too many boot devices for PC\n");
239 return(1);
240 }
241 for (i = 0; i < nbds; i++) {
242 bds[i] = boot_device2nibble(boot_device[i]);
243 if (bds[i] == 0) {
244 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
245 boot_device[i]);
246 return(1);
247 }
248 }
249 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
250 rtc_set_memory(s, 0x38, (bds[2] << 4));
251 return(0);
252 }
253
254 /* hd_table must contain 4 block drivers */
255 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
256 const char *boot_device, DriveInfo **hd_table)
257 {
258 RTCState *s = rtc_state;
259 int nbds, bds[3] = { 0, };
260 int val;
261 int fd0, fd1, nb;
262 int i;
263
264 /* various important CMOS locations needed by PC/Bochs bios */
265
266 /* memory size */
267 val = 640; /* base memory in K */
268 rtc_set_memory(s, 0x15, val);
269 rtc_set_memory(s, 0x16, val >> 8);
270
271 val = (ram_size / 1024) - 1024;
272 if (val > 65535)
273 val = 65535;
274 rtc_set_memory(s, 0x17, val);
275 rtc_set_memory(s, 0x18, val >> 8);
276 rtc_set_memory(s, 0x30, val);
277 rtc_set_memory(s, 0x31, val >> 8);
278
279 if (above_4g_mem_size) {
280 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
281 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
282 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
283 }
284
285 if (ram_size > (16 * 1024 * 1024))
286 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
287 else
288 val = 0;
289 if (val > 65535)
290 val = 65535;
291 rtc_set_memory(s, 0x34, val);
292 rtc_set_memory(s, 0x35, val >> 8);
293
294 /* set the number of CPU */
295 rtc_set_memory(s, 0x5f, smp_cpus - 1);
296
297 /* set boot devices, and disable floppy signature check if requested */
298 #define PC_MAX_BOOT_DEVICES 3
299 nbds = strlen(boot_device);
300 if (nbds > PC_MAX_BOOT_DEVICES) {
301 fprintf(stderr, "Too many boot devices for PC\n");
302 exit(1);
303 }
304 for (i = 0; i < nbds; i++) {
305 bds[i] = boot_device2nibble(boot_device[i]);
306 if (bds[i] == 0) {
307 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
308 boot_device[i]);
309 exit(1);
310 }
311 }
312 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
313 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
314
315 /* floppy type */
316
317 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
318 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
319
320 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
321 rtc_set_memory(s, 0x10, val);
322
323 val = 0;
324 nb = 0;
325 if (fd0 < 3)
326 nb++;
327 if (fd1 < 3)
328 nb++;
329 switch (nb) {
330 case 0:
331 break;
332 case 1:
333 val |= 0x01; /* 1 drive, ready for boot */
334 break;
335 case 2:
336 val |= 0x41; /* 2 drives, ready for boot */
337 break;
338 }
339 val |= 0x02; /* FPU is there */
340 val |= 0x04; /* PS/2 mouse installed */
341 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
342
343 /* hard drives */
344
345 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
346 if (hd_table[0])
347 cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
348 if (hd_table[1])
349 cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
350
351 val = 0;
352 for (i = 0; i < 4; i++) {
353 if (hd_table[i]) {
354 int cylinders, heads, sectors, translation;
355 /* NOTE: bdrv_get_geometry_hint() returns the physical
356 geometry. It is always such that: 1 <= sects <= 63, 1
357 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
358 geometry can be different if a translation is done. */
359 translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
360 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
361 bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
362 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
363 /* No translation. */
364 translation = 0;
365 } else {
366 /* LBA translation. */
367 translation = 1;
368 }
369 } else {
370 translation--;
371 }
372 val |= translation << (i * 2);
373 }
374 }
375 rtc_set_memory(s, 0x39, val);
376 }
377
378 void ioport_set_a20(int enable)
379 {
380 /* XXX: send to all CPUs ? */
381 cpu_x86_set_a20(first_cpu, enable);
382 }
383
384 int ioport_get_a20(void)
385 {
386 return ((first_cpu->a20_mask >> 20) & 1);
387 }
388
389 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
390 {
391 ioport_set_a20((val >> 1) & 1);
392 /* XXX: bit 0 is fast reset */
393 }
394
395 static uint32_t ioport92_read(void *opaque, uint32_t addr)
396 {
397 return ioport_get_a20() << 1;
398 }
399
400 /***********************************************************/
401 /* Bochs BIOS debug ports */
402
403 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
404 {
405 static const char shutdown_str[8] = "Shutdown";
406 static int shutdown_index = 0;
407
408 switch(addr) {
409 /* Bochs BIOS messages */
410 case 0x400:
411 case 0x401:
412 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
413 exit(1);
414 case 0x402:
415 case 0x403:
416 #ifdef DEBUG_BIOS
417 fprintf(stderr, "%c", val);
418 #endif
419 break;
420 case 0x8900:
421 /* same as Bochs power off */
422 if (val == shutdown_str[shutdown_index]) {
423 shutdown_index++;
424 if (shutdown_index == 8) {
425 shutdown_index = 0;
426 qemu_system_shutdown_request();
427 }
428 } else {
429 shutdown_index = 0;
430 }
431 break;
432
433 /* LGPL'ed VGA BIOS messages */
434 case 0x501:
435 case 0x502:
436 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
437 exit(1);
438 case 0x500:
439 case 0x503:
440 #ifdef DEBUG_BIOS
441 fprintf(stderr, "%c", val);
442 #endif
443 break;
444 }
445 }
446
447 static void *bochs_bios_init(void)
448 {
449 void *fw_cfg;
450 uint8_t *smbios_table;
451 size_t smbios_len;
452 uint64_t *numa_fw_cfg;
453 int i, j;
454
455 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
456 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
457 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
458 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
459 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
460
461 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
462 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
463 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
464 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
465
466 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
467
468 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
469 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
470 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
471 acpi_tables_len);
472 fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
473
474 smbios_table = smbios_get_table(&smbios_len);
475 if (smbios_table)
476 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
477 smbios_table, smbios_len);
478
479 /* allocate memory for the NUMA channel: one (64bit) word for the number
480 * of nodes, one word for each VCPU->node and one word for each node to
481 * hold the amount of memory.
482 */
483 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
484 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
485 for (i = 0; i < smp_cpus; i++) {
486 for (j = 0; j < nb_numa_nodes; j++) {
487 if (node_cpumask[j] & (1 << i)) {
488 numa_fw_cfg[i + 1] = cpu_to_le64(j);
489 break;
490 }
491 }
492 }
493 for (i = 0; i < nb_numa_nodes; i++) {
494 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
495 }
496 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
497 (1 + smp_cpus + nb_numa_nodes) * 8);
498
499 return fw_cfg;
500 }
501
502 static long get_file_size(FILE *f)
503 {
504 long where, size;
505
506 /* XXX: on Unix systems, using fstat() probably makes more sense */
507
508 where = ftell(f);
509 fseek(f, 0, SEEK_END);
510 size = ftell(f);
511 fseek(f, where, SEEK_SET);
512
513 return size;
514 }
515
516 #define MULTIBOOT_STRUCT_ADDR 0x9000
517
518 #if MULTIBOOT_STRUCT_ADDR > 0xf0000
519 #error multiboot struct needs to fit in 16 bit real mode
520 #endif
521
522 static int load_multiboot(void *fw_cfg,
523 FILE *f,
524 const char *kernel_filename,
525 const char *initrd_filename,
526 const char *kernel_cmdline,
527 uint8_t *header)
528 {
529 int i, is_multiboot = 0;
530 uint32_t flags = 0;
531 uint32_t mh_entry_addr;
532 uint32_t mh_load_addr;
533 uint32_t mb_kernel_size;
534 uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
535 uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
536 uint32_t mb_mod_end;
537 uint8_t bootinfo[0x500];
538 uint32_t cmdline = 0x200;
539 uint8_t *mb_kernel_data;
540 uint8_t *mb_bootinfo_data;
541
542 /* Ok, let's see if it is a multiboot image.
543 The header is 12x32bit long, so the latest entry may be 8192 - 48. */
544 for (i = 0; i < (8192 - 48); i += 4) {
545 if (ldl_p(header+i) == 0x1BADB002) {
546 uint32_t checksum = ldl_p(header+i+8);
547 flags = ldl_p(header+i+4);
548 checksum += flags;
549 checksum += (uint32_t)0x1BADB002;
550 if (!checksum) {
551 is_multiboot = 1;
552 break;
553 }
554 }
555 }
556
557 if (!is_multiboot)
558 return 0; /* no multiboot */
559
560 #ifdef DEBUG_MULTIBOOT
561 fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
562 #endif
563 memset(bootinfo, 0, sizeof(bootinfo));
564
565 if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
566 fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
567 }
568 if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
569 uint64_t elf_entry;
570 int kernel_size;
571 fclose(f);
572 kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL,
573 0, ELF_MACHINE, 0);
574 if (kernel_size < 0) {
575 fprintf(stderr, "Error while loading elf kernel\n");
576 exit(1);
577 }
578 mh_load_addr = mh_entry_addr = elf_entry;
579 mb_kernel_size = kernel_size;
580
581 mb_kernel_data = qemu_malloc(mb_kernel_size);
582 if (rom_copy(mb_kernel_data, elf_entry, kernel_size) != kernel_size) {
583 fprintf(stderr, "Error while fetching elf kernel from rom\n");
584 exit(1);
585 }
586
587 #ifdef DEBUG_MULTIBOOT
588 fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
589 mb_kernel_size, (size_t)mh_entry_addr);
590 #endif
591 } else {
592 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
593 uint32_t mh_header_addr = ldl_p(header+i+12);
594 mh_load_addr = ldl_p(header+i+16);
595 #ifdef DEBUG_MULTIBOOT
596 uint32_t mh_load_end_addr = ldl_p(header+i+20);
597 uint32_t mh_bss_end_addr = ldl_p(header+i+24);
598 #endif
599 uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
600
601 mh_entry_addr = ldl_p(header+i+28);
602 mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
603
604 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
605 uint32_t mh_mode_type = ldl_p(header+i+32);
606 uint32_t mh_width = ldl_p(header+i+36);
607 uint32_t mh_height = ldl_p(header+i+40);
608 uint32_t mh_depth = ldl_p(header+i+44); */
609
610 #ifdef DEBUG_MULTIBOOT
611 fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
612 fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
613 fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
614 fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
615 fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
616 mb_kernel_size, mh_load_addr);
617 #endif
618
619 mb_kernel_data = qemu_malloc(mb_kernel_size);
620 fseek(f, mb_kernel_text_offset, SEEK_SET);
621 fread(mb_kernel_data, 1, mb_kernel_size, f);
622 fclose(f);
623 }
624
625 /* blob size is only the kernel for now */
626 mb_mod_end = mh_load_addr + mb_kernel_size;
627
628 /* load modules */
629 stl_p(bootinfo + 20, 0x0); /* mods_count */
630 if (initrd_filename) {
631 uint32_t mb_mod_info = 0x100;
632 uint32_t mb_mod_cmdline = 0x300;
633 uint32_t mb_mod_start = mh_load_addr;
634 uint32_t mb_mod_length = mb_kernel_size;
635 char *next_initrd;
636 char *next_space;
637 int mb_mod_count = 0;
638
639 do {
640 if (mb_mod_info + 16 > mb_mod_cmdline) {
641 printf("WARNING: Too many modules loaded, aborting.\n");
642 break;
643 }
644
645 next_initrd = strchr(initrd_filename, ',');
646 if (next_initrd)
647 *next_initrd = '\0';
648 /* if a space comes after the module filename, treat everything
649 after that as parameters */
650 pstrcpy((char*)bootinfo + mb_mod_cmdline,
651 sizeof(bootinfo) - mb_mod_cmdline,
652 initrd_filename);
653 stl_p(bootinfo + mb_mod_info + 8, mb_bootinfo + mb_mod_cmdline); /* string */
654 mb_mod_cmdline += strlen(initrd_filename) + 1;
655 if (mb_mod_cmdline > sizeof(bootinfo)) {
656 mb_mod_cmdline = sizeof(bootinfo);
657 printf("WARNING: Too many module cmdlines loaded, aborting.\n");
658 break;
659 }
660 if ((next_space = strchr(initrd_filename, ' ')))
661 *next_space = '\0';
662 #ifdef DEBUG_MULTIBOOT
663 printf("multiboot loading module: %s\n", initrd_filename);
664 #endif
665 mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
666 & (TARGET_PAGE_MASK);
667 mb_mod_length = get_image_size(initrd_filename);
668 if (mb_mod_length < 0) {
669 fprintf(stderr, "failed to get %s image size\n", initrd_filename);
670 exit(1);
671 }
672 mb_mod_end = mb_mod_start + mb_mod_length;
673 mb_mod_count++;
674
675 /* append module data at the end of last module */
676 mb_kernel_data = qemu_realloc(mb_kernel_data,
677 mb_mod_end - mh_load_addr);
678 load_image(initrd_filename,
679 mb_kernel_data + mb_mod_start - mh_load_addr);
680
681 stl_p(bootinfo + mb_mod_info + 0, mb_mod_start);
682 stl_p(bootinfo + mb_mod_info + 4, mb_mod_start + mb_mod_length);
683 stl_p(bootinfo + mb_mod_info + 12, 0x0); /* reserved */
684 #ifdef DEBUG_MULTIBOOT
685 printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start,
686 mb_mod_start + mb_mod_length);
687 #endif
688 initrd_filename = next_initrd+1;
689 mb_mod_info += 16;
690 } while (next_initrd);
691 stl_p(bootinfo + 20, mb_mod_count); /* mods_count */
692 stl_p(bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
693 }
694
695 /* Commandline support */
696 stl_p(bootinfo + 16, mb_bootinfo + cmdline);
697 snprintf((char*)bootinfo + cmdline, 0x100, "%s %s",
698 kernel_filename, kernel_cmdline);
699
700 /* the kernel is where we want it to be now */
701 #define MULTIBOOT_FLAGS_MEMORY (1 << 0)
702 #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
703 #define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
704 #define MULTIBOOT_FLAGS_MODULES (1 << 3)
705 #define MULTIBOOT_FLAGS_MMAP (1 << 6)
706 stl_p(bootinfo, MULTIBOOT_FLAGS_MEMORY
707 | MULTIBOOT_FLAGS_BOOT_DEVICE
708 | MULTIBOOT_FLAGS_CMDLINE
709 | MULTIBOOT_FLAGS_MODULES
710 | MULTIBOOT_FLAGS_MMAP);
711 stl_p(bootinfo + 4, 640); /* mem_lower */
712 stl_p(bootinfo + 8, ram_size / 1024); /* mem_upper */
713 stl_p(bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
714 stl_p(bootinfo + 48, mmap_addr); /* mmap_addr */
715
716 #ifdef DEBUG_MULTIBOOT
717 fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
718 #endif
719
720 /* save bootinfo off the stack */
721 mb_bootinfo_data = qemu_malloc(sizeof(bootinfo));
722 memcpy(mb_bootinfo_data, bootinfo, sizeof(bootinfo));
723
724 /* Pass variables to option rom */
725 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, mh_entry_addr);
726 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr);
727 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, mb_mod_end - mh_load_addr);
728 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, mb_kernel_data,
729 mb_mod_end - mh_load_addr);
730
731 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
732 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, sizeof(bootinfo));
733 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, mb_bootinfo_data,
734 sizeof(bootinfo));
735
736 option_rom[nb_option_roms] = "multiboot.bin";
737 nb_option_roms++;
738
739 return 1; /* yes, we are multiboot */
740 }
741
742 static void load_linux(void *fw_cfg,
743 const char *kernel_filename,
744 const char *initrd_filename,
745 const char *kernel_cmdline,
746 target_phys_addr_t max_ram_size)
747 {
748 uint16_t protocol;
749 int setup_size, kernel_size, initrd_size = 0, cmdline_size;
750 uint32_t initrd_max;
751 uint8_t header[8192], *setup, *kernel, *initrd_data;
752 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
753 FILE *f;
754 char *vmode;
755
756 /* Align to 16 bytes as a paranoia measure */
757 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
758
759 /* load the kernel header */
760 f = fopen(kernel_filename, "rb");
761 if (!f || !(kernel_size = get_file_size(f)) ||
762 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
763 MIN(ARRAY_SIZE(header), kernel_size)) {
764 fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
765 kernel_filename, strerror(errno));
766 exit(1);
767 }
768
769 /* kernel protocol version */
770 #if 0
771 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
772 #endif
773 if (ldl_p(header+0x202) == 0x53726448)
774 protocol = lduw_p(header+0x206);
775 else {
776 /* This looks like a multiboot kernel. If it is, let's stop
777 treating it like a Linux kernel. */
778 if (load_multiboot(fw_cfg, f, kernel_filename,
779 initrd_filename, kernel_cmdline, header))
780 return;
781 protocol = 0;
782 }
783
784 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
785 /* Low kernel */
786 real_addr = 0x90000;
787 cmdline_addr = 0x9a000 - cmdline_size;
788 prot_addr = 0x10000;
789 } else if (protocol < 0x202) {
790 /* High but ancient kernel */
791 real_addr = 0x90000;
792 cmdline_addr = 0x9a000 - cmdline_size;
793 prot_addr = 0x100000;
794 } else {
795 /* High and recent kernel */
796 real_addr = 0x10000;
797 cmdline_addr = 0x20000;
798 prot_addr = 0x100000;
799 }
800
801 #if 0
802 fprintf(stderr,
803 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
804 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
805 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
806 real_addr,
807 cmdline_addr,
808 prot_addr);
809 #endif
810
811 /* highest address for loading the initrd */
812 if (protocol >= 0x203)
813 initrd_max = ldl_p(header+0x22c);
814 else
815 initrd_max = 0x37ffffff;
816
817 if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
818 initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
819
820 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
821 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
822 fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
823 (uint8_t*)strdup(kernel_cmdline),
824 strlen(kernel_cmdline)+1);
825
826 if (protocol >= 0x202) {
827 stl_p(header+0x228, cmdline_addr);
828 } else {
829 stw_p(header+0x20, 0xA33F);
830 stw_p(header+0x22, cmdline_addr-real_addr);
831 }
832
833 /* handle vga= parameter */
834 vmode = strstr(kernel_cmdline, "vga=");
835 if (vmode) {
836 unsigned int video_mode;
837 /* skip "vga=" */
838 vmode += 4;
839 if (!strncmp(vmode, "normal", 6)) {
840 video_mode = 0xffff;
841 } else if (!strncmp(vmode, "ext", 3)) {
842 video_mode = 0xfffe;
843 } else if (!strncmp(vmode, "ask", 3)) {
844 video_mode = 0xfffd;
845 } else {
846 video_mode = strtol(vmode, NULL, 0);
847 }
848 stw_p(header+0x1fa, video_mode);
849 }
850
851 /* loader type */
852 /* High nybble = B reserved for Qemu; low nybble is revision number.
853 If this code is substantially changed, you may want to consider
854 incrementing the revision. */
855 if (protocol >= 0x200)
856 header[0x210] = 0xB0;
857
858 /* heap */
859 if (protocol >= 0x201) {
860 header[0x211] |= 0x80; /* CAN_USE_HEAP */
861 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
862 }
863
864 /* load initrd */
865 if (initrd_filename) {
866 if (protocol < 0x200) {
867 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
868 exit(1);
869 }
870
871 initrd_size = get_image_size(initrd_filename);
872 initrd_addr = (initrd_max-initrd_size) & ~4095;
873
874 initrd_data = qemu_malloc(initrd_size);
875 load_image(initrd_filename, initrd_data);
876
877 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
878 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
879 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
880
881 stl_p(header+0x218, initrd_addr);
882 stl_p(header+0x21c, initrd_size);
883 }
884
885 /* load kernel and setup */
886 setup_size = header[0x1f1];
887 if (setup_size == 0)
888 setup_size = 4;
889 setup_size = (setup_size+1)*512;
890 kernel_size -= setup_size;
891
892 setup = qemu_malloc(setup_size);
893 kernel = qemu_malloc(kernel_size);
894 fseek(f, 0, SEEK_SET);
895 fread(setup, 1, setup_size, f);
896 fread(kernel, 1, kernel_size, f);
897 fclose(f);
898 memcpy(setup, header, MIN(sizeof(header), setup_size));
899
900 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
901 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
902 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
903
904 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
905 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
906 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
907
908 option_rom[nb_option_roms] = "linuxboot.bin";
909 nb_option_roms++;
910 }
911
912 static const int ide_iobase[2] = { 0x1f0, 0x170 };
913 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
914 static const int ide_irq[2] = { 14, 15 };
915
916 #define NE2000_NB_MAX 6
917
918 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
919 0x280, 0x380 };
920 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
921
922 static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
923 static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
924
925 #ifdef HAS_AUDIO
926 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
927 {
928 struct soundhw *c;
929
930 for (c = soundhw; c->name; ++c) {
931 if (c->enabled) {
932 if (c->isa) {
933 c->init.init_isa(pic);
934 } else {
935 if (pci_bus) {
936 c->init.init_pci(pci_bus);
937 }
938 }
939 }
940 }
941 }
942 #endif
943
944 static void pc_init_ne2k_isa(NICInfo *nd)
945 {
946 static int nb_ne2k = 0;
947
948 if (nb_ne2k == NE2000_NB_MAX)
949 return;
950 isa_ne2000_init(ne2000_io[nb_ne2k],
951 ne2000_irq[nb_ne2k], nd);
952 nb_ne2k++;
953 }
954
955 int cpu_is_bsp(CPUState *env)
956 {
957 return env->cpuid_apic_id == 0;
958 }
959
960 CPUState *pc_new_cpu(const char *cpu_model)
961 {
962 CPUState *env;
963
964 env = cpu_init(cpu_model);
965 if (!env) {
966 fprintf(stderr, "Unable to find x86 CPU definition\n");
967 exit(1);
968 }
969 env->kvm_cpu_state.regs_modified = 1;
970 if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
971 env->cpuid_apic_id = env->cpu_index;
972 /* APIC reset callback resets cpu */
973 apic_init(env);
974 } else {
975 qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
976 }
977
978 /* kvm needs this to run after the apic is initialized. Otherwise,
979 * it can access invalid state and crash.
980 */
981 qemu_init_vcpu(env);
982 return env;
983 }
984
985 /* PC hardware initialisation */
986 static void pc_init1(ram_addr_t ram_size,
987 const char *boot_device,
988 const char *kernel_filename,
989 const char *kernel_cmdline,
990 const char *initrd_filename,
991 const char *cpu_model,
992 int pci_enabled)
993 {
994 char *filename;
995 int ret, linux_boot, i;
996 ram_addr_t ram_addr, bios_offset, option_rom_offset;
997 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
998 int bios_size, isa_bios_size;
999 PCIBus *pci_bus;
1000 ISADevice *isa_dev;
1001 int piix3_devfn = -1;
1002 CPUState *env;
1003 qemu_irq *cpu_irq;
1004 qemu_irq *isa_irq;
1005 qemu_irq *i8259;
1006 IsaIrqState *isa_irq_state;
1007 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1008 DriveInfo *fd[MAX_FD];
1009 void *fw_cfg;
1010
1011 if (ram_size >= 0xe0000000 ) {
1012 above_4g_mem_size = ram_size - 0xe0000000;
1013 below_4g_mem_size = 0xe0000000;
1014 } else {
1015 below_4g_mem_size = ram_size;
1016 }
1017
1018 linux_boot = (kernel_filename != NULL);
1019
1020 /* init CPUs */
1021 if (cpu_model == NULL) {
1022 #ifdef TARGET_X86_64
1023 cpu_model = "qemu64";
1024 #else
1025 cpu_model = "qemu32";
1026 #endif
1027 }
1028
1029 if (kvm_enabled()) {
1030 kvm_set_boot_cpu_id(0);
1031 }
1032 for (i = 0; i < smp_cpus; i++) {
1033 env = pc_new_cpu(cpu_model);
1034 }
1035
1036 vmport_init();
1037
1038 /* allocate RAM */
1039 ram_addr = qemu_ram_alloc(below_4g_mem_size);
1040 cpu_register_physical_memory(0, 0xa0000, ram_addr);
1041 cpu_register_physical_memory(0x100000,
1042 below_4g_mem_size - 0x100000,
1043 ram_addr + 0x100000);
1044
1045 /* above 4giga memory allocation */
1046 if (above_4g_mem_size > 0) {
1047 #if TARGET_PHYS_ADDR_BITS == 32
1048 hw_error("To much RAM for 32-bit physical address");
1049 #else
1050 ram_addr = qemu_ram_alloc(above_4g_mem_size);
1051 cpu_register_physical_memory(0x100000000ULL,
1052 above_4g_mem_size,
1053 ram_addr);
1054 #endif
1055 }
1056
1057
1058 /* BIOS load */
1059 if (bios_name == NULL)
1060 bios_name = BIOS_FILENAME;
1061 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1062 if (filename) {
1063 bios_size = get_image_size(filename);
1064 } else {
1065 bios_size = -1;
1066 }
1067 if (bios_size <= 0 ||
1068 (bios_size % 65536) != 0) {
1069 goto bios_error;
1070 }
1071 bios_offset = qemu_ram_alloc(bios_size);
1072 ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
1073 if (ret != 0) {
1074 bios_error:
1075 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1076 exit(1);
1077 }
1078 if (filename) {
1079 qemu_free(filename);
1080 }
1081 /* map the last 128KB of the BIOS in ISA space */
1082 isa_bios_size = bios_size;
1083 if (isa_bios_size > (128 * 1024))
1084 isa_bios_size = 128 * 1024;
1085 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
1086 IO_MEM_UNASSIGNED);
1087 /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
1088 cpu_register_physical_memory(0x100000 - isa_bios_size,
1089 isa_bios_size,
1090 (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
1091
1092 if (extboot_drive) {
1093 option_rom[nb_option_roms++] = qemu_strdup(EXTBOOT_FILENAME);
1094 }
1095 option_rom[nb_option_roms++] = qemu_strdup(VAPIC_FILENAME);
1096
1097 rom_enable_driver_roms = 1;
1098 option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
1099 cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
1100
1101 /* map all the bios at the top of memory */
1102 cpu_register_physical_memory((uint32_t)(-bios_size),
1103 bios_size, bios_offset | IO_MEM_ROM);
1104
1105 fw_cfg = bochs_bios_init();
1106
1107 if (linux_boot) {
1108 load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1109 }
1110
1111 for (i = 0; i < nb_option_roms; i++) {
1112 rom_add_option(option_rom[i]);
1113 }
1114
1115 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1116 #ifdef KVM_CAP_IRQCHIP
1117 if (kvm_enabled() && kvm_irqchip_in_kernel()) {
1118 isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1119 isa_irq = i8259 = kvm_i8259_init(cpu_irq[0]);
1120 } else
1121 #endif
1122 {
1123 i8259 = i8259_init(cpu_irq[0]);
1124 isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1125 isa_irq_state->i8259 = i8259;
1126 isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1127 }
1128
1129 if (pci_enabled) {
1130 pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
1131 } else {
1132 pci_bus = NULL;
1133 isa_bus_new(NULL);
1134 }
1135 isa_bus_irqs(isa_irq);
1136
1137 ferr_irq = isa_reserve_irq(13);
1138
1139 /* init basic PC hardware */
1140 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1141
1142 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1143
1144 if (cirrus_vga_enabled) {
1145 if (pci_enabled) {
1146 pci_cirrus_vga_init(pci_bus);
1147 } else {
1148 isa_cirrus_vga_init();
1149 }
1150 } else if (vmsvga_enabled) {
1151 if (pci_enabled)
1152 pci_vmsvga_init(pci_bus);
1153 else
1154 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1155 } else if (std_vga_enabled) {
1156 if (pci_enabled) {
1157 pci_vga_init(pci_bus, 0, 0);
1158 } else {
1159 isa_vga_init();
1160 }
1161 }
1162
1163 rtc_state = rtc_init(2000);
1164
1165 qemu_register_boot_set(pc_boot_set, rtc_state);
1166
1167 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1168 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1169
1170 if (pci_enabled) {
1171 isa_irq_state->ioapic = ioapic_init();
1172 ioapic_irq_hack = isa_irq;
1173 }
1174 #ifdef CONFIG_KVM_PIT
1175 if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1176 pit = kvm_pit_init(0x40, isa_reserve_irq(0));
1177 else
1178 #endif
1179 pit = pit_init(0x40, isa_reserve_irq(0));
1180 pcspk_init(pit);
1181 if (!no_hpet) {
1182 hpet_init(isa_irq);
1183 }
1184
1185 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1186 if (serial_hds[i]) {
1187 serial_isa_init(i, serial_hds[i]);
1188 }
1189 }
1190
1191 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1192 if (parallel_hds[i]) {
1193 parallel_init(i, parallel_hds[i]);
1194 }
1195 }
1196
1197 for(i = 0; i < nb_nics; i++) {
1198 NICInfo *nd = &nd_table[i];
1199
1200 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1201 pc_init_ne2k_isa(nd);
1202 else
1203 pci_nic_init_nofail(nd, "rtl8139", NULL);
1204 }
1205
1206 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1207 fprintf(stderr, "qemu: too many IDE bus\n");
1208 exit(1);
1209 }
1210
1211 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1212 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1213 }
1214
1215 if (pci_enabled) {
1216 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
1217 } else {
1218 for(i = 0; i < MAX_IDE_BUS; i++) {
1219 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
1220 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1221 }
1222 }
1223
1224 isa_dev = isa_create_simple("i8042");
1225 DMA_init(0);
1226 #ifdef HAS_AUDIO
1227 audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1228 #endif
1229
1230 for(i = 0; i < MAX_FD; i++) {
1231 fd[i] = drive_get(IF_FLOPPY, 0, i);
1232 }
1233 floppy_controller = fdctrl_init_isa(fd);
1234
1235 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1236
1237 if (pci_enabled && usb_enabled) {
1238 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1239 }
1240
1241 if (pci_enabled && acpi_enabled) {
1242 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1243 i2c_bus *smbus;
1244
1245 /* TODO: Populate SPD eeprom data. */
1246 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
1247 isa_reserve_irq(9));
1248 for (i = 0; i < 8; i++) {
1249 DeviceState *eeprom;
1250 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1251 qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1252 qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1253 qdev_init_nofail(eeprom);
1254 }
1255 piix4_acpi_system_hot_add_init(pci_bus, cpu_model);
1256 }
1257
1258 if (i440fx_state) {
1259 i440fx_init_memory_mappings(i440fx_state);
1260 }
1261
1262 if (pci_enabled) {
1263 int max_bus;
1264 int bus;
1265
1266 max_bus = drive_get_max_bus(IF_SCSI);
1267 for (bus = 0; bus <= max_bus; bus++) {
1268 pci_create_simple(pci_bus, -1, "lsi53c895a");
1269 }
1270 }
1271
1272 if (extboot_drive) {
1273 DriveInfo *info = extboot_drive;
1274 int cyls, heads, secs;
1275
1276 if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1277 bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1278 bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1279 }
1280
1281 extboot_init(info->bdrv, 1);
1282 }
1283
1284 /* Add virtio console devices */
1285 if (pci_enabled) {
1286 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1287 if (virtcon_hds[i]) {
1288 pci_create_simple(pci_bus, -1, "virtio-console-pci");
1289 }
1290 }
1291 }
1292
1293 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
1294 if (kvm_enabled()) {
1295 add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
1296 }
1297 #endif /* CONFIG_KVM_DEVICE_ASSIGNMENT */
1298 }
1299
1300 static void pc_init_pci(ram_addr_t ram_size,
1301 const char *boot_device,
1302 const char *kernel_filename,
1303 const char *kernel_cmdline,
1304 const char *initrd_filename,
1305 const char *cpu_model)
1306 {
1307 pc_init1(ram_size, boot_device,
1308 kernel_filename, kernel_cmdline,
1309 initrd_filename, cpu_model, 1);
1310 }
1311
1312 static void pc_init_isa(ram_addr_t ram_size,
1313 const char *boot_device,
1314 const char *kernel_filename,
1315 const char *kernel_cmdline,
1316 const char *initrd_filename,
1317 const char *cpu_model)
1318 {
1319 if (cpu_model == NULL)
1320 cpu_model = "486";
1321 pc_init1(ram_size, boot_device,
1322 kernel_filename, kernel_cmdline,
1323 initrd_filename, cpu_model, 0);
1324 }
1325
1326 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1327 BIOS will read it and start S3 resume at POST Entry */
1328 void cmos_set_s3_resume(void)
1329 {
1330 if (rtc_state)
1331 rtc_set_memory(rtc_state, 0xF, 0xFE);
1332 }
1333
1334 static QEMUMachine pc_machine = {
1335 .name = "pc-0.11",
1336 .alias = "pc",
1337 .desc = "Standard PC",
1338 .init = pc_init_pci,
1339 .max_cpus = 255,
1340 .is_default = 1,
1341 };
1342
1343 static QEMUMachine pc_machine_v0_10 = {
1344 .name = "pc-0.10",
1345 .desc = "Standard PC, qemu 0.10",
1346 .init = pc_init_pci,
1347 .max_cpus = 255,
1348 .compat_props = (GlobalProperty[]) {
1349 {
1350 .driver = "virtio-blk-pci",
1351 .property = "class",
1352 .value = stringify(PCI_CLASS_STORAGE_OTHER),
1353 },{
1354 .driver = "virtio-console-pci",
1355 .property = "class",
1356 .value = stringify(PCI_CLASS_DISPLAY_OTHER),
1357 },{
1358 .driver = "virtio-net-pci",
1359 .property = "vectors",
1360 .value = stringify(0),
1361 },{
1362 .driver = "virtio-blk-pci",
1363 .property = "vectors",
1364 .value = stringify(0),
1365 },
1366 { /* end of list */ }
1367 },
1368 };
1369
1370 static QEMUMachine isapc_machine = {
1371 .name = "isapc",
1372 .desc = "ISA-only PC",
1373 .init = pc_init_isa,
1374 .max_cpus = 1,
1375 };
1376
1377 static void pc_machine_init(void)
1378 {
1379 qemu_register_machine(&pc_machine);
1380 qemu_register_machine(&pc_machine_v0_10);
1381 qemu_register_machine(&isapc_machine);
1382 }
1383
1384 machine_init(pc_machine_init);
Zhi Yong Wu's QEmu Source Tree - dev