hw/pc_piix.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "pc.h"
  27 #include "apic.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "net.h"
  32 #include "boards.h"
  33 #include "ide.h"
  34 #include "kvm.h"
  35 #include "sysemu.h"
  36 #include "sysbus.h"
  37 #include "arch_init.h"
  38 #include "blockdev.h"
  39
  40 qemu_irq *ioapic_irq_hack;
  41
  42 #define MAX_IDE_BUS 2
  43
  44 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  45 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  46 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  47
  48 const char *global_cpu_model; /* cpu hotadd */
  49
  50 static void ioapic_init(IsaIrqState *isa_irq_state)
  51 {
  52     DeviceState *dev;
  53     SysBusDevice *d;
  54     unsigned int i;
  55
  56     dev = qdev_create(NULL, "ioapic");
  57     qdev_init_nofail(dev);
  58     d = sysbus_from_qdev(dev);
  59     sysbus_mmio_map(d, 0, 0xfec00000);
  60
  61     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  62         isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
  63     }
  64 }
  65
  66 /* PC hardware initialisation */
  67 static void pc_init1(ram_addr_t ram_size,
  68                      const char *boot_device,
  69                      const char *kernel_filename,
  70                      const char *kernel_cmdline,
  71                      const char *initrd_filename,
  72                      const char *cpu_model,
  73                      int pci_enabled)
  74 {
  75     int i;
  76     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  77     PCIBus *pci_bus;
  78     PCII440FXState *i440fx_state;
  79     int piix3_devfn = -1;
  80     qemu_irq *cpu_irq;
  81     qemu_irq *isa_irq;
  82     qemu_irq *i8259;
  83     qemu_irq *cmos_s3;
  84     qemu_irq *smi_irq;
  85     IsaIrqState *isa_irq_state;
  86     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  87     FDCtrl *floppy_controller;
  88     BusState *idebus[MAX_IDE_BUS];
  89     ISADevice *rtc_state;
  90
  91     global_cpu_model = cpu_model;
  92
  93     pc_cpus_init(cpu_model);
  94
  95     vmport_init();
  96
  97     /* allocate ram and load rom/bios */
  98     pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
  99                    &below_4g_mem_size, &above_4g_mem_size);
 100
 101     cpu_irq = pc_allocate_cpu_irq();
 102 #ifdef KVM_CAP_IRQCHIP
 103     if (kvm_enabled() && kvm_irqchip_in_kernel()) {
 104         isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
 105         if (pci_enabled) {
 106             ioapic_init(isa_irq_state);
 107         }
 108         isa_irq = i8259 = kvm_i8259_init(cpu_irq[0]);
 109         ioapic_irq_hack = isa_irq;
 110     } else
 111 #endif
 112     {
 113         i8259 = i8259_init(cpu_irq[0]);
 114         isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
 115         isa_irq_state->i8259 = i8259;
 116         if (pci_enabled) {
 117             ioapic_init(isa_irq_state);
 118         }
 119         isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 120     }
 121
 122     if (pci_enabled) {
 123         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
 124     } else {
 125         pci_bus = NULL;
 126         i440fx_state = NULL;
 127         isa_bus_new(NULL);
 128     }
 129     isa_bus_irqs(isa_irq);
 130
 131     pc_register_ferr_irq(isa_reserve_irq(13));
 132
 133     pc_vga_init(pci_enabled? pci_bus: NULL);
 134
 135     /* init basic PC hardware */
 136     pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
 137
 138     for(i = 0; i < nb_nics; i++) {
 139         NICInfo *nd = &nd_table[i];
 140
 141         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
 142             pc_init_ne2k_isa(nd);
 143         else
 144             pci_nic_init_nofail(nd, "rtl8139", NULL);
 145     }
 146
 147     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 148         fprintf(stderr, "qemu: too many IDE bus\n");
 149         exit(1);
 150     }
 151
 152     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 153         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 154     }
 155
 156     if (pci_enabled) {
 157         PCIDevice *dev;
 158         dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
 159         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
 160         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
 161     } else {
 162         for(i = 0; i < MAX_IDE_BUS; i++) {
 163             ISADevice *dev;
 164             dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 165                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 166             idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
 167         }
 168     }
 169
 170     audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
 171
 172     pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
 173                  idebus[0], idebus[1], floppy_controller, rtc_state);
 174
 175     if (pci_enabled && usb_enabled) {
 176         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 177     }
 178
 179     if (pci_enabled && acpi_enabled) {
 180         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 181         i2c_bus *smbus;
 182
 183         cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
 184         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
 185         /* TODO: Populate SPD eeprom data.  */
 186         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
 187                               isa_reserve_irq(9), *cmos_s3, *smi_irq,
 188                               kvm_enabled());
 189         for (i = 0; i < 8; i++) {
 190             DeviceState *eeprom;
 191             eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
 192             qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
 193             qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
 194             qdev_init_nofail(eeprom);
 195         }
 196     }
 197
 198     if (i440fx_state) {
 199         i440fx_init_memory_mappings(i440fx_state);
 200     }
 201
 202     if (pci_enabled) {
 203         pc_pci_device_init(pci_bus);
 204     }
 205 }
 206
 207 static void pc_init_pci(ram_addr_t ram_size,
 208                         const char *boot_device,
 209                         const char *kernel_filename,
 210                         const char *kernel_cmdline,
 211                         const char *initrd_filename,
 212                         const char *cpu_model)
 213 {
 214     pc_init1(ram_size, boot_device,
 215              kernel_filename, kernel_cmdline,
 216              initrd_filename, cpu_model, 1);
 217 }
 218
 219 static void pc_init_isa(ram_addr_t ram_size,
 220                         const char *boot_device,
 221                         const char *kernel_filename,
 222                         const char *kernel_cmdline,
 223                         const char *initrd_filename,
 224                         const char *cpu_model)
 225 {
 226     if (cpu_model == NULL)
 227         cpu_model = "486";
 228     pc_init1(ram_size, boot_device,
 229              kernel_filename, kernel_cmdline,
 230              initrd_filename, cpu_model, 0);
 231 }
 232
 233 static QEMUMachine pc_machine = {
 234     .name = "pc-0.14",
 235     .alias = "pc",
 236     .desc = "Standard PC",
 237     .init = pc_init_pci,
 238     .max_cpus = 255,
 239     .is_default = 1,
 240 };
 241
 242 static QEMUMachine pc_machine_v0_13 = {
 243     .name = "pc-0.13",
 244     .desc = "Standard PC",
 245     .init = pc_init_pci,
 246     .max_cpus = 255,
 247     .compat_props = (GlobalProperty[]) {
 248         {
 249             .driver   = "virtio-9p-pci",
 250             .property = "vectors",
 251             .value    = stringify(0),
 252         },{
 253             .driver   = "VGA",
 254             .property = "rombar",
 255             .value    = stringify(0),
 256         },{
 257             .driver   = "vmware-svga",
 258             .property = "rombar",
 259             .value    = stringify(0),
 260         },{
 261             .driver   = "PCI",
 262             .property = "command_serr_enable",
 263             .value    = "off",
 264         },
 265         { /* end of list */ }
 266     },
 267 };
 268
 269 static QEMUMachine pc_machine_v0_12 = {
 270     .name = "pc-0.12",
 271     .desc = "Standard PC",
 272     .init = pc_init_pci,
 273     .max_cpus = 255,
 274     .compat_props = (GlobalProperty[]) {
 275         {
 276             .driver   = "virtio-serial-pci",
 277             .property = "max_ports",
 278             .value    = stringify(1),
 279         },{
 280             .driver   = "virtio-serial-pci",
 281             .property = "vectors",
 282             .value    = stringify(0),
 283         },{
 284             .driver   = "VGA",
 285             .property = "rombar",
 286             .value    = stringify(0),
 287         },{
 288             .driver   = "vmware-svga",
 289             .property = "rombar",
 290             .value    = stringify(0),
 291         },{
 292             .driver   = "PCI",
 293             .property = "command_serr_enable",
 294             .value    = "off",
 295         },
 296         { /* end of list */ }
 297     }
 298 };
 299
 300 static QEMUMachine pc_machine_v0_11 = {
 301     .name = "pc-0.11",
 302     .desc = "Standard PC, qemu 0.11",
 303     .init = pc_init_pci,
 304     .max_cpus = 255,
 305     .compat_props = (GlobalProperty[]) {
 306         {
 307             .driver   = "virtio-blk-pci",
 308             .property = "vectors",
 309             .value    = stringify(0),
 310         },{
 311             .driver   = "virtio-serial-pci",
 312             .property = "max_ports",
 313             .value    = stringify(1),
 314         },{
 315             .driver   = "virtio-serial-pci",
 316             .property = "vectors",
 317             .value    = stringify(0),
 318         },{
 319             .driver   = "ide-drive",
 320             .property = "ver",
 321             .value    = "0.11",
 322         },{
 323             .driver   = "scsi-disk",
 324             .property = "ver",
 325             .value    = "0.11",
 326         },{
 327             .driver   = "PCI",
 328             .property = "rombar",
 329             .value    = stringify(0),
 330         },{
 331             .driver   = "PCI",
 332             .property = "command_serr_enable",
 333             .value    = "off",
 334         },
 335         { /* end of list */ }
 336     }
 337 };
 338
 339 static QEMUMachine pc_machine_v0_10 = {
 340     .name = "pc-0.10",
 341     .desc = "Standard PC, qemu 0.10",
 342     .init = pc_init_pci,
 343     .max_cpus = 255,
 344     .compat_props = (GlobalProperty[]) {
 345         {
 346             .driver   = "virtio-blk-pci",
 347             .property = "class",
 348             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
 349         },{
 350             .driver   = "virtio-serial-pci",
 351             .property = "class",
 352             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
 353         },{
 354             .driver   = "virtio-serial-pci",
 355             .property = "max_ports",
 356             .value    = stringify(1),
 357         },{
 358             .driver   = "virtio-serial-pci",
 359             .property = "vectors",
 360             .value    = stringify(0),
 361         },{
 362             .driver   = "virtio-net-pci",
 363             .property = "vectors",
 364             .value    = stringify(0),
 365         },{
 366             .driver   = "virtio-blk-pci",
 367             .property = "vectors",
 368             .value    = stringify(0),
 369         },{
 370             .driver   = "ide-drive",
 371             .property = "ver",
 372             .value    = "0.10",
 373         },{
 374             .driver   = "scsi-disk",
 375             .property = "ver",
 376             .value    = "0.10",
 377         },{
 378             .driver   = "PCI",
 379             .property = "rombar",
 380             .value    = stringify(0),
 381         },{
 382             .driver   = "PCI",
 383             .property = "command_serr_enable",
 384             .value    = "off",
 385         },
 386         { /* end of list */ }
 387     },
 388 };
 389
 390 static QEMUMachine isapc_machine = {
 391     .name = "isapc",
 392     .desc = "ISA-only PC",
 393     .init = pc_init_isa,
 394     .max_cpus = 1,
 395 };
 396
 397 static void pc_machine_init(void)
 398 {
 399     qemu_register_machine(&pc_machine);
 400     qemu_register_machine(&pc_machine_v0_13);
 401     qemu_register_machine(&pc_machine_v0_12);
 402     qemu_register_machine(&pc_machine_v0_11);
 403     qemu_register_machine(&pc_machine_v0_10);
 404     qemu_register_machine(&isapc_machine);
 405 }
 406
 407 machine_init(pc_machine_init);