kvm_stat: move groups and events into well defined objects
[qemu/qemu-dev-zwu.git] / qemu-kvm-x86.c
blob20093fc946c67d2a2f75369a44573ead737360f2
1 /*
2 * qemu/kvm integration, x86 specific code
4 * Copyright (C) 2006-2008 Qumranet Technologies
6 * Licensed under the terms of the GNU GPL version 2 or higher.
7 */
9 #include "config.h"
10 #include "config-host.h"
12 #include <string.h>
13 #include "hw/hw.h"
14 #include "gdbstub.h"
15 #include <sys/io.h>
17 #include "qemu-kvm.h"
18 #include "libkvm.h"
19 #include <pthread.h>
20 #include <sys/utsname.h>
21 #include <linux/kvm_para.h>
22 #include <sys/ioctl.h>
24 #include "kvm.h"
25 #include "hw/apic.h"
27 #define MSR_IA32_TSC 0x10
29 static struct kvm_msr_list *kvm_msr_list;
30 extern unsigned int kvm_shadow_memory;
32 int kvm_set_tss_addr(kvm_context_t kvm, unsigned long addr)
34 int r;
36 r = kvm_vm_ioctl(kvm_state, KVM_SET_TSS_ADDR, addr);
37 if (r < 0) {
38 fprintf(stderr, "kvm_set_tss_addr: %m\n");
39 return r;
41 return 0;
44 static int kvm_init_tss(kvm_context_t kvm)
46 int r;
48 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_TSS_ADDR);
49 if (r > 0) {
51 * this address is 3 pages before the bios, and the bios should present
52 * as unavaible memory
54 r = kvm_set_tss_addr(kvm, 0xfeffd000);
55 if (r < 0) {
56 fprintf(stderr, "kvm_init_tss: unable to set tss addr\n");
57 return r;
59 } else {
60 fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
62 return 0;
65 static int kvm_set_identity_map_addr(kvm_context_t kvm, uint64_t addr)
67 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
68 int r;
70 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
71 if (r > 0) {
72 r = kvm_vm_ioctl(kvm_state, KVM_SET_IDENTITY_MAP_ADDR, &addr);
73 if (r == -1) {
74 fprintf(stderr, "kvm_set_identity_map_addr: %m\n");
75 return -errno;
77 return 0;
79 #endif
80 return -ENOSYS;
83 static int kvm_init_identity_map_page(kvm_context_t kvm)
85 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
86 int r;
88 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
89 if (r > 0) {
91 * this address is 4 pages before the bios, and the bios should present
92 * as unavaible memory
94 r = kvm_set_identity_map_addr(kvm, 0xfeffc000);
95 if (r < 0) {
96 fprintf(stderr, "kvm_init_identity_map_page: "
97 "unable to set identity mapping addr\n");
98 return r;
101 #endif
102 return 0;
105 static int kvm_create_pit(kvm_context_t kvm)
107 #ifdef KVM_CAP_PIT
108 int r;
110 kvm_state->pit_in_kernel = 0;
111 if (!kvm->no_pit_creation) {
112 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_PIT);
113 if (r > 0) {
114 r = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT);
115 if (r >= 0) {
116 kvm_state->pit_in_kernel = 1;
117 } else {
118 fprintf(stderr, "Create kernel PIC irqchip failed\n");
119 return r;
123 #endif
124 return 0;
127 int kvm_arch_create(kvm_context_t kvm, unsigned long phys_mem_bytes,
128 void **vm_mem)
130 int r = 0;
132 r = kvm_init_tss(kvm);
133 if (r < 0) {
134 return r;
137 r = kvm_init_identity_map_page(kvm);
138 if (r < 0) {
139 return r;
143 * Tell fw_cfg to notify the BIOS to reserve the range.
145 if (e820_add_entry(0xfeffc000, 0x4000, E820_RESERVED) < 0) {
146 perror("e820_add_entry() table is full");
147 exit(1);
150 r = kvm_create_pit(kvm);
151 if (r < 0) {
152 return r;
155 r = kvm_init_coalesced_mmio(kvm);
156 if (r < 0) {
157 return r;
160 return 0;
163 #ifdef KVM_EXIT_TPR_ACCESS
165 static int kvm_handle_tpr_access(CPUState *env)
167 struct kvm_run *run = env->kvm_run;
168 kvm_tpr_access_report(env,
169 run->tpr_access.rip,
170 run->tpr_access.is_write);
171 return 0;
175 int kvm_enable_vapic(CPUState *env, uint64_t vapic)
177 struct kvm_vapic_addr va = {
178 .vapic_addr = vapic,
181 return kvm_vcpu_ioctl(env, KVM_SET_VAPIC_ADDR, &va);
184 #endif
186 int kvm_arch_run(CPUState *env)
188 int r = 0;
189 struct kvm_run *run = env->kvm_run;
191 switch (run->exit_reason) {
192 #ifdef KVM_EXIT_SET_TPR
193 case KVM_EXIT_SET_TPR:
194 break;
195 #endif
196 #ifdef KVM_EXIT_TPR_ACCESS
197 case KVM_EXIT_TPR_ACCESS:
198 r = kvm_handle_tpr_access(env);
199 break;
200 #endif
201 default:
202 r = 1;
203 break;
206 return r;
209 #ifdef KVM_CAP_IRQCHIP
211 int kvm_get_lapic(CPUState *env, struct kvm_lapic_state *s)
213 int r = 0;
215 if (!kvm_irqchip_in_kernel()) {
216 return r;
219 r = kvm_vcpu_ioctl(env, KVM_GET_LAPIC, s);
220 if (r < 0) {
221 fprintf(stderr, "KVM_GET_LAPIC failed\n");
223 return r;
226 int kvm_set_lapic(CPUState *env, struct kvm_lapic_state *s)
228 int r = 0;
230 if (!kvm_irqchip_in_kernel()) {
231 return 0;
234 r = kvm_vcpu_ioctl(env, KVM_SET_LAPIC, s);
236 if (r < 0) {
237 fprintf(stderr, "KVM_SET_LAPIC failed\n");
239 return r;
242 #endif
244 #ifdef KVM_CAP_PIT
246 int kvm_get_pit(kvm_context_t kvm, struct kvm_pit_state *s)
248 if (!kvm_pit_in_kernel()) {
249 return 0;
251 return kvm_vm_ioctl(kvm_state, KVM_GET_PIT, s);
254 int kvm_set_pit(kvm_context_t kvm, struct kvm_pit_state *s)
256 if (!kvm_pit_in_kernel()) {
257 return 0;
259 return kvm_vm_ioctl(kvm_state, KVM_SET_PIT, s);
262 #ifdef KVM_CAP_PIT_STATE2
263 int kvm_get_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
265 if (!kvm_pit_in_kernel()) {
266 return 0;
268 return kvm_vm_ioctl(kvm_state, KVM_GET_PIT2, ps2);
271 int kvm_set_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
273 if (!kvm_pit_in_kernel()) {
274 return 0;
276 return kvm_vm_ioctl(kvm_state, KVM_SET_PIT2, ps2);
279 #endif
280 #endif
282 int kvm_has_pit_state2(kvm_context_t kvm)
284 int r = 0;
286 #ifdef KVM_CAP_PIT_STATE2
287 r = kvm_check_extension(kvm_state, KVM_CAP_PIT_STATE2);
288 #endif
289 return r;
292 void kvm_show_code(CPUState *env)
294 #define SHOW_CODE_LEN 50
295 struct kvm_regs regs;
296 struct kvm_sregs sregs;
297 int r, n;
298 int back_offset;
299 unsigned char code;
300 char code_str[SHOW_CODE_LEN * 3 + 1];
301 unsigned long rip;
303 r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
304 if (r < 0 ) {
305 perror("KVM_GET_SREGS");
306 return;
308 r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
309 if (r < 0) {
310 perror("KVM_GET_REGS");
311 return;
313 rip = sregs.cs.base + regs.rip;
314 back_offset = regs.rip;
315 if (back_offset > 20) {
316 back_offset = 20;
318 *code_str = 0;
319 for (n = -back_offset; n < SHOW_CODE_LEN-back_offset; ++n) {
320 if (n == 0) {
321 strcat(code_str, " -->");
323 cpu_physical_memory_rw(rip + n, &code, 1, 1);
324 sprintf(code_str + strlen(code_str), " %02x", code);
326 fprintf(stderr, "code:%s\n", code_str);
331 * Returns available msr list. User must free.
333 static struct kvm_msr_list *kvm_get_msr_list(void)
335 struct kvm_msr_list sizer, *msrs;
336 int r;
338 sizer.nmsrs = 0;
339 r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, &sizer);
340 if (r < 0 && r != -E2BIG) {
341 return NULL;
343 /* Old kernel modules had a bug and could write beyond the provided
344 memory. Allocate at least a safe amount of 1K. */
345 msrs = qemu_malloc(MAX(1024, sizeof(*msrs) +
346 sizer.nmsrs * sizeof(*msrs->indices)));
348 msrs->nmsrs = sizer.nmsrs;
349 r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, msrs);
350 if (r < 0) {
351 free(msrs);
352 errno = r;
353 return NULL;
355 return msrs;
358 static void print_seg(FILE *file, const char *name, struct kvm_segment *seg)
360 fprintf(stderr,
361 "%s %04x (%08llx/%08x p %d dpl %d db %d s %d type %x l %d"
362 " g %d avl %d)\n",
363 name, seg->selector, seg->base, seg->limit, seg->present,
364 seg->dpl, seg->db, seg->s, seg->type, seg->l, seg->g,
365 seg->avl);
368 static void print_dt(FILE *file, const char *name, struct kvm_dtable *dt)
370 fprintf(stderr, "%s %llx/%x\n", name, dt->base, dt->limit);
373 void kvm_show_regs(CPUState *env)
375 struct kvm_regs regs;
376 struct kvm_sregs sregs;
377 int r;
379 r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
380 if (r < 0) {
381 perror("KVM_GET_REGS");
382 return;
384 fprintf(stderr,
385 "rax %016llx rbx %016llx rcx %016llx rdx %016llx\n"
386 "rsi %016llx rdi %016llx rsp %016llx rbp %016llx\n"
387 "r8 %016llx r9 %016llx r10 %016llx r11 %016llx\n"
388 "r12 %016llx r13 %016llx r14 %016llx r15 %016llx\n"
389 "rip %016llx rflags %08llx\n",
390 regs.rax, regs.rbx, regs.rcx, regs.rdx,
391 regs.rsi, regs.rdi, regs.rsp, regs.rbp,
392 regs.r8, regs.r9, regs.r10, regs.r11,
393 regs.r12, regs.r13, regs.r14, regs.r15,
394 regs.rip, regs.rflags);
395 r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
396 if (r < 0) {
397 perror("KVM_GET_SREGS");
398 return;
400 print_seg(stderr, "cs", &sregs.cs);
401 print_seg(stderr, "ds", &sregs.ds);
402 print_seg(stderr, "es", &sregs.es);
403 print_seg(stderr, "ss", &sregs.ss);
404 print_seg(stderr, "fs", &sregs.fs);
405 print_seg(stderr, "gs", &sregs.gs);
406 print_seg(stderr, "tr", &sregs.tr);
407 print_seg(stderr, "ldt", &sregs.ldt);
408 print_dt(stderr, "gdt", &sregs.gdt);
409 print_dt(stderr, "idt", &sregs.idt);
410 fprintf(stderr, "cr0 %llx cr2 %llx cr3 %llx cr4 %llx cr8 %llx"
411 " efer %llx\n",
412 sregs.cr0, sregs.cr2, sregs.cr3, sregs.cr4, sregs.cr8,
413 sregs.efer);
416 static void kvm_set_cr8(CPUState *env, uint64_t cr8)
418 env->kvm_run->cr8 = cr8;
421 int kvm_set_shadow_pages(kvm_context_t kvm, unsigned int nrshadow_pages)
423 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
424 int r;
426 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
427 KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
428 if (r > 0) {
429 r = kvm_vm_ioctl(kvm_state, KVM_SET_NR_MMU_PAGES, nrshadow_pages);
430 if (r < 0) {
431 fprintf(stderr, "kvm_set_shadow_pages: %m\n");
432 return r;
434 return 0;
436 #endif
437 return -1;
440 int kvm_get_shadow_pages(kvm_context_t kvm, unsigned int *nrshadow_pages)
442 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
443 int r;
445 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
446 KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
447 if (r > 0) {
448 *nrshadow_pages = kvm_vm_ioctl(kvm_state, KVM_GET_NR_MMU_PAGES);
449 return 0;
451 #endif
452 return -1;
455 #ifdef KVM_CAP_VAPIC
456 static int kvm_enable_tpr_access_reporting(CPUState *env)
458 int r;
459 struct kvm_tpr_access_ctl tac = { .enabled = 1 };
461 r = kvm_ioctl(env->kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_VAPIC);
462 if (r <= 0) {
463 return -ENOSYS;
465 return kvm_vcpu_ioctl(env, KVM_TPR_ACCESS_REPORTING, &tac);
467 #endif
469 #ifdef KVM_CAP_ADJUST_CLOCK
470 static struct kvm_clock_data kvmclock_data;
472 static void kvmclock_pre_save(void *opaque)
474 struct kvm_clock_data *cl = opaque;
476 kvm_vm_ioctl(kvm_state, KVM_GET_CLOCK, cl);
479 static int kvmclock_post_load(void *opaque, int version_id)
481 struct kvm_clock_data *cl = opaque;
483 return kvm_vm_ioctl(kvm_state, KVM_SET_CLOCK, cl);
486 static const VMStateDescription vmstate_kvmclock= {
487 .name = "kvmclock",
488 .version_id = 1,
489 .minimum_version_id = 1,
490 .minimum_version_id_old = 1,
491 .pre_save = kvmclock_pre_save,
492 .post_load = kvmclock_post_load,
493 .fields = (VMStateField []) {
494 VMSTATE_U64(clock, struct kvm_clock_data),
495 VMSTATE_END_OF_LIST()
498 #endif
500 int kvm_arch_qemu_create_context(void)
502 int r;
503 struct utsname utsname;
505 uname(&utsname);
506 lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0;
508 if (kvm_shadow_memory) {
509 kvm_set_shadow_pages(kvm_context, kvm_shadow_memory);
512 /* initialize has_msr_star/has_msr_hsave_pa */
513 r = kvm_get_supported_msrs(kvm_state);
514 if (r < 0) {
515 return r;
518 kvm_msr_list = kvm_get_msr_list();
519 if (!kvm_msr_list) {
520 return -1;
523 #ifdef KVM_CAP_ADJUST_CLOCK
524 if (kvm_check_extension(kvm_state, KVM_CAP_ADJUST_CLOCK)) {
525 vmstate_register(NULL, 0, &vmstate_kvmclock, &kvmclock_data);
527 #endif
529 r = kvm_set_boot_cpu_id(0);
530 if (r < 0 && r != -ENOSYS) {
531 return r;
534 return 0;
537 static void kvm_arch_save_mpstate(CPUState *env)
539 #ifdef KVM_CAP_MP_STATE
540 int r;
541 struct kvm_mp_state mp_state;
543 r = kvm_get_mpstate(env, &mp_state);
544 if (r < 0) {
545 env->mp_state = -1;
546 } else {
547 env->mp_state = mp_state.mp_state;
548 if (kvm_irqchip_in_kernel()) {
549 env->halted = (env->mp_state == KVM_MP_STATE_HALTED);
552 #else
553 env->mp_state = -1;
554 #endif
557 static void kvm_arch_load_mpstate(CPUState *env)
559 #ifdef KVM_CAP_MP_STATE
560 struct kvm_mp_state mp_state;
563 * -1 indicates that the host did not support GET_MP_STATE ioctl,
564 * so don't touch it.
566 if (env->mp_state != -1) {
567 mp_state.mp_state = env->mp_state;
568 kvm_set_mpstate(env, &mp_state);
570 #endif
573 #define XSAVE_CWD_RIP 2
574 #define XSAVE_CWD_RDP 4
575 #define XSAVE_MXCSR 6
576 #define XSAVE_ST_SPACE 8
577 #define XSAVE_XMM_SPACE 40
578 #define XSAVE_XSTATE_BV 128
579 #define XSAVE_YMMH_SPACE 144
581 void kvm_arch_load_regs(CPUState *env, int level)
583 int rc;
585 assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
587 kvm_getput_regs(env, 1);
589 kvm_put_xsave(env);
590 kvm_put_xcrs(env);
592 kvm_put_sregs(env);
594 rc = kvm_put_msrs(env, level);
595 if (rc < 0) {
596 perror("kvm__msrs FAILED");
599 if (level >= KVM_PUT_RESET_STATE) {
600 kvm_arch_load_mpstate(env);
601 kvm_load_lapic(env);
603 if (level == KVM_PUT_FULL_STATE) {
604 if (env->kvm_vcpu_update_vapic) {
605 kvm_tpr_enable_vapic(env);
609 kvm_put_vcpu_events(env, level);
610 kvm_put_debugregs(env);
612 /* must be last */
613 kvm_guest_debug_workarounds(env);
616 void kvm_arch_save_regs(CPUState *env)
618 int rc;
620 assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
622 kvm_getput_regs(env, 0);
624 kvm_get_xsave(env);
625 kvm_get_xcrs(env);
627 kvm_get_sregs(env);
629 rc = kvm_get_msrs(env);
630 if (rc < 0) {
631 perror("kvm_get_msrs FAILED");
634 kvm_arch_save_mpstate(env);
635 kvm_save_lapic(env);
636 kvm_get_vcpu_events(env);
637 kvm_get_debugregs(env);
640 static int _kvm_arch_init_vcpu(CPUState *env)
642 kvm_arch_reset_vcpu(env);
644 #ifdef KVM_EXIT_TPR_ACCESS
645 kvm_enable_tpr_access_reporting(env);
646 #endif
647 return 0;
650 int kvm_arch_halt(CPUState *env)
653 if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
654 (env->eflags & IF_MASK)) &&
655 !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
656 env->halted = 1;
658 return 1;
661 void kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
663 if (!kvm_irqchip_in_kernel()) {
664 kvm_set_cr8(env, cpu_get_apic_tpr(env->apic_state));
668 int kvm_arch_has_work(CPUState *env)
670 if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
671 (env->eflags & IF_MASK)) ||
672 (env->interrupt_request & CPU_INTERRUPT_NMI)) {
673 return 1;
675 return 0;
678 int kvm_arch_try_push_interrupts(void *opaque)
680 CPUState *env = cpu_single_env;
681 int r, irq;
683 if (kvm_is_ready_for_interrupt_injection(env) &&
684 (env->interrupt_request & CPU_INTERRUPT_HARD) &&
685 (env->eflags & IF_MASK)) {
686 env->interrupt_request &= ~CPU_INTERRUPT_HARD;
687 irq = cpu_get_pic_interrupt(env);
688 if (irq >= 0) {
689 r = kvm_inject_irq(env, irq);
690 if (r < 0) {
691 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
696 return (env->interrupt_request & CPU_INTERRUPT_HARD) != 0;
699 #ifdef KVM_CAP_USER_NMI
700 void kvm_arch_push_nmi(void *opaque)
702 CPUState *env = cpu_single_env;
703 int r;
705 if (likely(!(env->interrupt_request & CPU_INTERRUPT_NMI))) {
706 return;
709 env->interrupt_request &= ~CPU_INTERRUPT_NMI;
710 r = kvm_inject_nmi(env);
711 if (r < 0) {
712 printf("cpu %d fail inject NMI\n", env->cpu_index);
715 #endif /* KVM_CAP_USER_NMI */
717 static int kvm_reset_msrs(CPUState *env)
719 struct {
720 struct kvm_msrs info;
721 struct kvm_msr_entry entries[100];
722 } msr_data;
723 int n;
724 struct kvm_msr_entry *msrs = msr_data.entries;
725 uint32_t index;
726 uint64_t data;
728 if (!kvm_msr_list) {
729 return -1;
732 for (n = 0; n < kvm_msr_list->nmsrs; n++) {
733 index = kvm_msr_list->indices[n];
734 switch (index) {
735 case MSR_PAT:
736 data = 0x0007040600070406ULL;
737 break;
738 default:
739 data = 0;
741 kvm_msr_entry_set(&msrs[n], kvm_msr_list->indices[n], data);
744 msr_data.info.nmsrs = n;
746 return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
750 void kvm_arch_cpu_reset(CPUState *env)
752 kvm_reset_msrs(env);
753 kvm_arch_reset_vcpu(env);
756 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
757 void kvm_arch_do_ioperm(void *_data)
759 struct ioperm_data *data = _data;
760 ioperm(data->start_port, data->num, data->turn_on);
762 #endif
765 * Setup x86 specific IRQ routing
767 int kvm_arch_init_irq_routing(void)
769 int i, r;
771 if (kvm_irqchip && kvm_has_gsi_routing()) {
772 kvm_clear_gsi_routes();
773 for (i = 0; i < 8; ++i) {
774 if (i == 2) {
775 continue;
777 r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_MASTER, i);
778 if (r < 0) {
779 return r;
782 for (i = 8; i < 16; ++i) {
783 r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
784 if (r < 0) {
785 return r;
788 for (i = 0; i < 24; ++i) {
789 if (i == 0 && irq0override) {
790 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, 2);
791 } else if (i != 2 || !irq0override) {
792 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, i);
794 if (r < 0) {
795 return r;
798 kvm_commit_irq_routes();
800 return 0;
803 void kvm_arch_process_irqchip_events(CPUState *env)
805 if (env->interrupt_request & CPU_INTERRUPT_INIT) {
806 kvm_cpu_synchronize_state(env);
807 do_cpu_init(env);
809 if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
810 kvm_cpu_synchronize_state(env);
811 do_cpu_sipi(env);