4 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
24 struct omap_lcd_panel_s
{
29 ram_addr_t emiff_base
;
42 struct omap_dma_lcd_channel_s
*dma
;
43 uint16_t palette
[256];
50 static void omap_lcd_interrupts(struct omap_lcd_panel_s
*s
)
52 if (s
->frame_done
&& (s
->interrupts
& 1)) {
53 qemu_irq_raise(s
->irq
);
57 if (s
->palette_done
&& (s
->interrupts
& 2)) {
58 qemu_irq_raise(s
->irq
);
63 qemu_irq_raise(s
->irq
);
67 qemu_irq_lower(s
->irq
);
70 #include "pixel_ops.h"
72 typedef void draw_line_func(
73 uint8_t *d
, const uint8_t *s
, int width
, const uint16_t *pal
);
76 #include "omap_lcd_template.h"
78 #include "omap_lcd_template.h"
80 #include "omap_lcd_template.h"
82 #include "omap_lcd_template.h"
84 static draw_line_func
*draw_line_table2
[33] = {
90 }, *draw_line_table4
[33] = {
96 }, *draw_line_table8
[33] = {
100 [16] = draw_line8_16
,
101 [32] = draw_line8_32
,
102 }, *draw_line_table12
[33] = {
105 [15] = draw_line12_15
,
106 [16] = draw_line12_16
,
107 [32] = draw_line12_32
,
108 }, *draw_line_table16
[33] = {
111 [15] = draw_line16_15
,
112 [16] = draw_line16_16
,
113 [32] = draw_line16_32
,
116 static void omap_update_display(void *opaque
)
118 struct omap_lcd_panel_s
*omap_lcd
= (struct omap_lcd_panel_s
*) opaque
;
119 draw_line_func
*draw_line
;
120 int size
, dirty
[2], minline
, maxline
, height
;
121 int line
, width
, linesize
, step
, bpp
, frame_offset
;
122 ram_addr_t frame_base
, scanline
, newline
, x
;
125 if (!omap_lcd
|| omap_lcd
->plm
== 1 ||
126 !omap_lcd
->enable
|| !ds_get_bits_per_pixel(omap_lcd
->state
))
130 if (omap_lcd
->plm
!= 2) {
131 memcpy(omap_lcd
->palette
, phys_ram_base
+
132 omap_lcd
->dma
->phys_framebuffer
[
133 omap_lcd
->dma
->current_frame
], 0x200);
134 switch (omap_lcd
->palette
[0] >> 12 & 7) {
136 frame_offset
+= 0x200;
139 frame_offset
+= 0x20;
144 switch ((omap_lcd
->palette
[0] >> 12) & 7) {
146 draw_line
= draw_line_table2
[ds_get_bits_per_pixel(omap_lcd
->state
)];
151 draw_line
= draw_line_table4
[ds_get_bits_per_pixel(omap_lcd
->state
)];
156 draw_line
= draw_line_table8
[ds_get_bits_per_pixel(omap_lcd
->state
)];
162 draw_line
= draw_line_table12
[ds_get_bits_per_pixel(omap_lcd
->state
)];
164 draw_line
= draw_line_table16
[ds_get_bits_per_pixel(omap_lcd
->state
)];
169 /* Unsupported at the moment. */
174 width
= omap_lcd
->width
;
175 if (width
!= ds_get_width(omap_lcd
->state
) ||
176 omap_lcd
->height
!= ds_get_height(omap_lcd
->state
)) {
177 qemu_console_resize(omap_lcd
->console
,
178 omap_lcd
->width
, omap_lcd
->height
);
179 omap_lcd
->invalidate
= 1;
182 if (omap_lcd
->dma
->current_frame
== 0)
183 size
= omap_lcd
->dma
->src_f1_bottom
- omap_lcd
->dma
->src_f1_top
;
185 size
= omap_lcd
->dma
->src_f2_bottom
- omap_lcd
->dma
->src_f2_top
;
187 if (frame_offset
+ ((width
* omap_lcd
->height
* bpp
) >> 3) > size
+ 2) {
188 omap_lcd
->sync_error
= 1;
189 omap_lcd_interrupts(omap_lcd
);
190 omap_lcd
->enable
= 0;
195 frame_base
= omap_lcd
->dma
->phys_framebuffer
[
196 omap_lcd
->dma
->current_frame
] + frame_offset
;
197 omap_lcd
->dma
->condition
|= 1 << omap_lcd
->dma
->current_frame
;
198 if (omap_lcd
->dma
->interrupts
& 1)
199 qemu_irq_raise(omap_lcd
->dma
->irq
);
200 if (omap_lcd
->dma
->dual
)
201 omap_lcd
->dma
->current_frame
^= 1;
203 if (!ds_get_bits_per_pixel(omap_lcd
->state
))
207 height
= omap_lcd
->height
;
208 if (omap_lcd
->subpanel
& (1 << 31)) {
209 if (omap_lcd
->subpanel
& (1 << 29))
210 line
= (omap_lcd
->subpanel
>> 16) & 0x3ff;
212 height
= (omap_lcd
->subpanel
>> 16) & 0x3ff;
213 /* TODO: fill the rest of the panel with DPD */
215 step
= width
* bpp
>> 3;
216 scanline
= frame_base
+ step
* line
;
217 s
= (uint8_t *) (phys_ram_base
+ scanline
);
218 d
= ds_get_data(omap_lcd
->state
);
219 linesize
= ds_get_linesize(omap_lcd
->state
);
221 dirty
[0] = dirty
[1] =
222 cpu_physical_memory_get_dirty(scanline
, VGA_DIRTY_FLAG
);
225 for (; line
< height
; line
++) {
226 newline
= scanline
+ step
;
227 for (x
= scanline
+ TARGET_PAGE_SIZE
; x
< newline
;
228 x
+= TARGET_PAGE_SIZE
) {
229 dirty
[1] = cpu_physical_memory_get_dirty(x
, VGA_DIRTY_FLAG
);
230 dirty
[0] |= dirty
[1];
232 if (dirty
[0] || omap_lcd
->invalidate
) {
233 draw_line(d
, s
, width
, omap_lcd
->palette
);
244 if (maxline
>= minline
) {
245 dpy_update(omap_lcd
->state
, 0, minline
, width
, maxline
);
246 cpu_physical_memory_reset_dirty(frame_base
+ step
* minline
,
247 frame_base
+ step
* maxline
, VGA_DIRTY_FLAG
);
251 static int ppm_save(const char *filename
, uint8_t *data
,
252 int w
, int h
, int linesize
)
259 f
= fopen(filename
, "wb");
262 fprintf(f
, "P6\n%d %d\n%d\n", w
, h
, 255);
265 for (y
= 0; y
< h
; y
++) {
267 for (x
= 0; x
< w
; x
++) {
271 fputc((v
>> 8) & 0xf8, f
);
272 fputc((v
>> 3) & 0xfc, f
);
273 fputc((v
<< 3) & 0xf8, f
);
278 fputc((v
>> 16) & 0xff, f
);
279 fputc((v
>> 8) & 0xff, f
);
280 fputc((v
) & 0xff, f
);
291 static void omap_screen_dump(void *opaque
, const char *filename
) {
292 struct omap_lcd_panel_s
*omap_lcd
= opaque
;
293 omap_update_display(opaque
);
294 if (omap_lcd
&& ds_get_data(omap_lcd
->state
))
295 ppm_save(filename
, ds_get_data(omap_lcd
->state
),
296 omap_lcd
->width
, omap_lcd
->height
,
297 ds_get_linesize(omap_lcd
->state
));
300 static void omap_invalidate_display(void *opaque
) {
301 struct omap_lcd_panel_s
*omap_lcd
= opaque
;
302 omap_lcd
->invalidate
= 1;
305 static void omap_lcd_update(struct omap_lcd_panel_s
*s
) {
307 s
->dma
->current_frame
= -1;
311 omap_lcd_interrupts(s
);
315 if (s
->dma
->current_frame
== -1) {
318 s
->dma
->current_frame
= 0;
321 if (!s
->dma
->mpu
->port
[s
->dma
->src
].addr_valid(s
->dma
->mpu
,
322 s
->dma
->src_f1_top
) ||
324 s
->dma
->src
].addr_valid(s
->dma
->mpu
,
325 s
->dma
->src_f1_bottom
) ||
328 s
->dma
->src
].addr_valid(s
->dma
->mpu
,
329 s
->dma
->src_f2_top
) ||
331 s
->dma
->src
].addr_valid(s
->dma
->mpu
,
332 s
->dma
->src_f2_bottom
)))) {
333 s
->dma
->condition
|= 1 << 2;
334 if (s
->dma
->interrupts
& (1 << 1))
335 qemu_irq_raise(s
->dma
->irq
);
340 if (s
->dma
->src
== imif
) {
341 /* Framebuffers are in SRAM */
342 s
->dma
->phys_framebuffer
[0] = s
->imif_base
+
343 s
->dma
->src_f1_top
- OMAP_IMIF_BASE
;
345 s
->dma
->phys_framebuffer
[1] = s
->imif_base
+
346 s
->dma
->src_f2_top
- OMAP_IMIF_BASE
;
348 /* Framebuffers are in RAM */
349 s
->dma
->phys_framebuffer
[0] = s
->emiff_base
+
350 s
->dma
->src_f1_top
- OMAP_EMIFF_BASE
;
352 s
->dma
->phys_framebuffer
[1] = s
->emiff_base
+
353 s
->dma
->src_f2_top
- OMAP_EMIFF_BASE
;
356 if (s
->plm
!= 2 && !s
->palette_done
) {
357 memcpy(s
->palette
, phys_ram_base
+
358 s
->dma
->phys_framebuffer
[s
->dma
->current_frame
], 0x200);
360 omap_lcd_interrupts(s
);
364 static uint32_t omap_lcdc_read(void *opaque
, target_phys_addr_t addr
)
366 struct omap_lcd_panel_s
*s
= (struct omap_lcd_panel_s
*) opaque
;
369 case 0x00: /* LCD_CONTROL */
370 return (s
->tft
<< 23) | (s
->plm
<< 20) |
371 (s
->tft
<< 7) | (s
->interrupts
<< 3) |
372 (s
->mono
<< 1) | s
->enable
| s
->ctrl
| 0xfe000c34;
374 case 0x04: /* LCD_TIMING0 */
375 return (s
->timing
[0] << 10) | (s
->width
- 1) | 0x0000000f;
377 case 0x08: /* LCD_TIMING1 */
378 return (s
->timing
[1] << 10) | (s
->height
- 1);
380 case 0x0c: /* LCD_TIMING2 */
381 return s
->timing
[2] | 0xfc000000;
383 case 0x10: /* LCD_STATUS */
384 return (s
->palette_done
<< 6) | (s
->sync_error
<< 2) | s
->frame_done
;
386 case 0x14: /* LCD_SUBPANEL */
396 static void omap_lcdc_write(void *opaque
, target_phys_addr_t addr
,
399 struct omap_lcd_panel_s
*s
= (struct omap_lcd_panel_s
*) opaque
;
402 case 0x00: /* LCD_CONTROL */
403 s
->plm
= (value
>> 20) & 3;
404 s
->tft
= (value
>> 7) & 1;
405 s
->interrupts
= (value
>> 3) & 3;
406 s
->mono
= (value
>> 1) & 1;
407 s
->ctrl
= value
& 0x01cff300;
408 if (s
->enable
!= (value
& 1)) {
409 s
->enable
= value
& 1;
414 case 0x04: /* LCD_TIMING0 */
415 s
->timing
[0] = value
>> 10;
416 s
->width
= (value
& 0x3ff) + 1;
419 case 0x08: /* LCD_TIMING1 */
420 s
->timing
[1] = value
>> 10;
421 s
->height
= (value
& 0x3ff) + 1;
424 case 0x0c: /* LCD_TIMING2 */
425 s
->timing
[2] = value
;
428 case 0x10: /* LCD_STATUS */
431 case 0x14: /* LCD_SUBPANEL */
432 s
->subpanel
= value
& 0xa1ffffff;
440 static CPUReadMemoryFunc
*omap_lcdc_readfn
[] = {
446 static CPUWriteMemoryFunc
*omap_lcdc_writefn
[] = {
452 void omap_lcdc_reset(struct omap_lcd_panel_s
*s
)
454 s
->dma
->current_frame
= -1;
474 struct omap_lcd_panel_s
*omap_lcdc_init(target_phys_addr_t base
, qemu_irq irq
,
475 struct omap_dma_lcd_channel_s
*dma
, DisplayState
*ds
,
476 ram_addr_t imif_base
, ram_addr_t emiff_base
, omap_clk clk
)
479 struct omap_lcd_panel_s
*s
= (struct omap_lcd_panel_s
*)
480 qemu_mallocz(sizeof(struct omap_lcd_panel_s
));
485 s
->imif_base
= imif_base
;
486 s
->emiff_base
= emiff_base
;
489 iomemtype
= cpu_register_io_memory(0, omap_lcdc_readfn
,
490 omap_lcdc_writefn
, s
);
491 cpu_register_physical_memory(base
, 0x100, iomemtype
);
493 s
->console
= graphic_console_init(ds
, omap_update_display
,
494 omap_invalidate_display
,
495 omap_screen_dump
, NULL
, s
);