target-i386/exec.h

   1 /*
   2  *  i386 execution defines
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #include "dyngen-exec.h"
  22
  23 /* XXX: factorize this mess */
  24 #ifdef TARGET_X86_64
  25 #define TARGET_LONG_BITS 64
  26 #else
  27 #define TARGET_LONG_BITS 32
  28 #endif
  29
  30 #include "cpu-defs.h"
  31
  32 /* at least 4 register variables are defined */
  33 register struct CPUX86State *env asm(AREG0);
  34
  35 #ifndef CPU_NO_GLOBAL_REGS
  36
  37 #if TARGET_LONG_BITS > HOST_LONG_BITS
  38
  39 /* no registers can be used */
  40 #define T0 (env->t0)
  41 #define T1 (env->t1)
  42 #define T2 (env->t2)
  43
  44 #else
  45
  46 /* XXX: use unsigned long instead of target_ulong - better code will
  47    be generated for 64 bit CPUs */
  48 register target_ulong T0 asm(AREG1);
  49 register target_ulong T1 asm(AREG2);
  50 register target_ulong T2 asm(AREG3);
  51
  52 #endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
  53
  54 #endif /* ! CPU_NO_GLOBAL_REGS */
  55
  56 #define A0 T2
  57
  58 extern FILE *logfile;
  59 extern int loglevel;
  60
  61 #ifndef reg_EAX
  62 #define EAX (env->regs[R_EAX])
  63 #endif
  64 #ifndef reg_ECX
  65 #define ECX (env->regs[R_ECX])
  66 #endif
  67 #ifndef reg_EDX
  68 #define EDX (env->regs[R_EDX])
  69 #endif
  70 #ifndef reg_EBX
  71 #define EBX (env->regs[R_EBX])
  72 #endif
  73 #ifndef reg_ESP
  74 #define ESP (env->regs[R_ESP])
  75 #endif
  76 #ifndef reg_EBP
  77 #define EBP (env->regs[R_EBP])
  78 #endif
  79 #ifndef reg_ESI
  80 #define ESI (env->regs[R_ESI])
  81 #endif
  82 #ifndef reg_EDI
  83 #define EDI (env->regs[R_EDI])
  84 #endif
  85 #define EIP  (env->eip)
  86 #define DF  (env->df)
  87
  88 #define CC_SRC (env->cc_src)
  89 #define CC_DST (env->cc_dst)
  90 #define CC_OP  (env->cc_op)
  91
  92 /* float macros */
  93 #define FT0    (env->ft0)
  94 #define ST0    (env->fpregs[env->fpstt].d)
  95 #define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
  96 #define ST1    ST(1)
  97
  98 #include "cpu.h"
  99 #include "exec-all.h"
 100
 101 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
 102 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
 103 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
 104 void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
 105 int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
 106                              int is_write, int mmu_idx, int is_softmmu);
 107 void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
 108               void *retaddr);
 109 void __hidden cpu_lock(void);
 110 void __hidden cpu_unlock(void);
 111 void do_interrupt(int intno, int is_int, int error_code,
 112                   target_ulong next_eip, int is_hw);
 113 void do_interrupt_user(int intno, int is_int, int error_code,
 114                        target_ulong next_eip);
 115 void raise_interrupt(int intno, int is_int, int error_code,
 116                      int next_eip_addend);
 117 void raise_exception_err(int exception_index, int error_code);
 118 void raise_exception(int exception_index);
 119 void do_smm_enter(void);
 120 void __hidden cpu_loop_exit(void);
 121
 122 void OPPROTO op_movl_eflags_T0(void);
 123 void OPPROTO op_movl_T0_eflags(void);
 124
 125 /* n must be a constant to be efficient */
 126 static inline target_long lshift(target_long x, int n)
 127 {
 128     if (n >= 0)
 129         return x << n;
 130     else
 131         return x >> (-n);
 132 }
 133
 134 #include "helper.h"
 135
 136 static inline void svm_check_intercept(uint32_t type)
 137 {
 138     helper_svm_check_intercept_param(type, 0);
 139 }
 140
 141 #if !defined(CONFIG_USER_ONLY)
 142
 143 #include "softmmu_exec.h"
 144
 145 #endif /* !defined(CONFIG_USER_ONLY) */
 146
 147 #ifdef USE_X86LDOUBLE
 148 /* use long double functions */
 149 #define floatx_to_int32 floatx80_to_int32
 150 #define floatx_to_int64 floatx80_to_int64
 151 #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
 152 #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
 153 #define int32_to_floatx int32_to_floatx80
 154 #define int64_to_floatx int64_to_floatx80
 155 #define float32_to_floatx float32_to_floatx80
 156 #define float64_to_floatx float64_to_floatx80
 157 #define floatx_to_float32 floatx80_to_float32
 158 #define floatx_to_float64 floatx80_to_float64
 159 #define floatx_abs floatx80_abs
 160 #define floatx_chs floatx80_chs
 161 #define floatx_round_to_int floatx80_round_to_int
 162 #define floatx_compare floatx80_compare
 163 #define floatx_compare_quiet floatx80_compare_quiet
 164 #define sin sinl
 165 #define cos cosl
 166 #define sqrt sqrtl
 167 #define pow powl
 168 #define log logl
 169 #define tan tanl
 170 #define atan2 atan2l
 171 #define floor floorl
 172 #define ceil ceill
 173 #define ldexp ldexpl
 174 #else
 175 #define floatx_to_int32 float64_to_int32
 176 #define floatx_to_int64 float64_to_int64
 177 #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
 178 #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
 179 #define int32_to_floatx int32_to_float64
 180 #define int64_to_floatx int64_to_float64
 181 #define float32_to_floatx float32_to_float64
 182 #define float64_to_floatx(x, e) (x)
 183 #define floatx_to_float32 float64_to_float32
 184 #define floatx_to_float64(x, e) (x)
 185 #define floatx_abs float64_abs
 186 #define floatx_chs float64_chs
 187 #define floatx_round_to_int float64_round_to_int
 188 #define floatx_compare float64_compare
 189 #define floatx_compare_quiet float64_compare_quiet
 190 #endif
 191
 192 extern CPU86_LDouble sin(CPU86_LDouble x);
 193 extern CPU86_LDouble cos(CPU86_LDouble x);
 194 extern CPU86_LDouble sqrt(CPU86_LDouble x);
 195 extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
 196 extern CPU86_LDouble log(CPU86_LDouble x);
 197 extern CPU86_LDouble tan(CPU86_LDouble x);
 198 extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
 199 extern CPU86_LDouble floor(CPU86_LDouble x);
 200 extern CPU86_LDouble ceil(CPU86_LDouble x);
 201
 202 #define RC_MASK         0xc00
 203 #define RC_NEAR         0x000
 204 #define RC_DOWN         0x400
 205 #define RC_UP           0x800
 206 #define RC_CHOP         0xc00
 207
 208 #define MAXTAN 9223372036854775808.0
 209
 210 #ifdef USE_X86LDOUBLE
 211
 212 /* only for x86 */
 213 typedef union {
 214     long double d;
 215     struct {
 216         unsigned long long lower;
 217         unsigned short upper;
 218     } l;
 219 } CPU86_LDoubleU;
 220
 221 /* the following deal with x86 long double-precision numbers */
 222 #define MAXEXPD 0x7fff
 223 #define EXPBIAS 16383
 224 #define EXPD(fp)        (fp.l.upper & 0x7fff)
 225 #define SIGND(fp)       ((fp.l.upper) & 0x8000)
 226 #define MANTD(fp)       (fp.l.lower)
 227 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
 228
 229 #else
 230
 231 /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
 232 typedef union {
 233     double d;
 234 #if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
 235     struct {
 236         uint32_t lower;
 237         int32_t upper;
 238     } l;
 239 #else
 240     struct {
 241         int32_t upper;
 242         uint32_t lower;
 243     } l;
 244 #endif
 245 #ifndef __arm__
 246     int64_t ll;
 247 #endif
 248 } CPU86_LDoubleU;
 249
 250 /* the following deal with IEEE double-precision numbers */
 251 #define MAXEXPD 0x7ff
 252 #define EXPBIAS 1023
 253 #define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
 254 #define SIGND(fp)       ((fp.l.upper) & 0x80000000)
 255 #ifdef __arm__
 256 #define MANTD(fp)       (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
 257 #else
 258 #define MANTD(fp)       (fp.ll & ((1LL << 52) - 1))
 259 #endif
 260 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
 261 #endif
 262
 263 static inline void fpush(void)
 264 {
 265     env->fpstt = (env->fpstt - 1) & 7;
 266     env->fptags[env->fpstt] = 0; /* validate stack entry */
 267 }
 268
 269 static inline void fpop(void)
 270 {
 271     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
 272     env->fpstt = (env->fpstt + 1) & 7;
 273 }
 274
 275 #ifndef USE_X86LDOUBLE
 276 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 277 {
 278     CPU86_LDoubleU temp;
 279     int upper, e;
 280     uint64_t ll;
 281
 282     /* mantissa */
 283     upper = lduw(ptr + 8);
 284     /* XXX: handle overflow ? */
 285     e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
 286     e |= (upper >> 4) & 0x800; /* sign */
 287     ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
 288 #ifdef __arm__
 289     temp.l.upper = (e << 20) | (ll >> 32);
 290     temp.l.lower = ll;
 291 #else
 292     temp.ll = ll | ((uint64_t)e << 52);
 293 #endif
 294     return temp.d;
 295 }
 296
 297 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 298 {
 299     CPU86_LDoubleU temp;
 300     int e;
 301
 302     temp.d = f;
 303     /* mantissa */
 304     stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
 305     /* exponent + sign */
 306     e = EXPD(temp) - EXPBIAS + 16383;
 307     e |= SIGND(temp) >> 16;
 308     stw(ptr + 8, e);
 309 }
 310 #else
 311
 312 /* we use memory access macros */
 313
 314 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 315 {
 316     CPU86_LDoubleU temp;
 317
 318     temp.l.lower = ldq(ptr);
 319     temp.l.upper = lduw(ptr + 8);
 320     return temp.d;
 321 }
 322
 323 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 324 {
 325     CPU86_LDoubleU temp;
 326
 327     temp.d = f;
 328     stq(ptr, temp.l.lower);
 329     stw(ptr + 8, temp.l.upper);
 330 }
 331
 332 #endif /* USE_X86LDOUBLE */
 333
 334 #define FPUS_IE (1 << 0)
 335 #define FPUS_DE (1 << 1)
 336 #define FPUS_ZE (1 << 2)
 337 #define FPUS_OE (1 << 3)
 338 #define FPUS_UE (1 << 4)
 339 #define FPUS_PE (1 << 5)
 340 #define FPUS_SF (1 << 6)
 341 #define FPUS_SE (1 << 7)
 342 #define FPUS_B  (1 << 15)
 343
 344 #define FPUC_EM 0x3f
 345
 346 extern const CPU86_LDouble f15rk[7];
 347
 348 void fpu_raise_exception(void);
 349 void restore_native_fp_state(CPUState *env);
 350 void save_native_fp_state(CPUState *env);
 351
 352 extern const uint8_t parity_table[256];
 353 extern const uint8_t rclw_table[32];
 354 extern const uint8_t rclb_table[32];
 355
 356 static inline uint32_t compute_eflags(void)
 357 {
 358     return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
 359 }
 360
 361 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
 362 static inline void load_eflags(int eflags, int update_mask)
 363 {
 364     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 365     DF = 1 - (2 * ((eflags >> 10) & 1));
 366     env->eflags = (env->eflags & ~update_mask) |
 367         (eflags & update_mask);
 368 }
 369
 370 static inline void env_to_regs(void)
 371 {
 372 #ifdef reg_EAX
 373     EAX = env->regs[R_EAX];
 374 #endif
 375 #ifdef reg_ECX
 376     ECX = env->regs[R_ECX];
 377 #endif
 378 #ifdef reg_EDX
 379     EDX = env->regs[R_EDX];
 380 #endif
 381 #ifdef reg_EBX
 382     EBX = env->regs[R_EBX];
 383 #endif
 384 #ifdef reg_ESP
 385     ESP = env->regs[R_ESP];
 386 #endif
 387 #ifdef reg_EBP
 388     EBP = env->regs[R_EBP];
 389 #endif
 390 #ifdef reg_ESI
 391     ESI = env->regs[R_ESI];
 392 #endif
 393 #ifdef reg_EDI
 394     EDI = env->regs[R_EDI];
 395 #endif
 396 }
 397
 398 static inline void regs_to_env(void)
 399 {
 400 #ifdef reg_EAX
 401     env->regs[R_EAX] = EAX;
 402 #endif
 403 #ifdef reg_ECX
 404     env->regs[R_ECX] = ECX;
 405 #endif
 406 #ifdef reg_EDX
 407     env->regs[R_EDX] = EDX;
 408 #endif
 409 #ifdef reg_EBX
 410     env->regs[R_EBX] = EBX;
 411 #endif
 412 #ifdef reg_ESP
 413     env->regs[R_ESP] = ESP;
 414 #endif
 415 #ifdef reg_EBP
 416     env->regs[R_EBP] = EBP;
 417 #endif
 418 #ifdef reg_ESI
 419     env->regs[R_ESI] = ESI;
 420 #endif
 421 #ifdef reg_EDI
 422     env->regs[R_EDI] = EDI;
 423 #endif
 424 }
 425
 426 static inline int cpu_halted(CPUState *env) {
 427     /* handle exit of HALTED state */
 428     if (!(env->hflags & HF_HALTED_MASK))
 429         return 0;
 430     /* disable halt condition */
 431     if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 432          (env->eflags & IF_MASK)) ||
 433         (env->interrupt_request & CPU_INTERRUPT_NMI)) {
 434         env->hflags &= ~HF_HALTED_MASK;
 435         return 0;
 436     }
 437     return EXCP_HALTED;
 438 }
 439