2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #ifdef CONFIG_DYNGEN_OP
27 /* legacy dyngen operations */
31 int gen_new_label(void);
33 static inline void tcg_gen_op1(int opc
, TCGv arg1
)
36 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
39 static inline void tcg_gen_op1i(int opc
, TCGArg arg1
)
42 *gen_opparam_ptr
++ = arg1
;
45 static inline void tcg_gen_op2(int opc
, TCGv arg1
, TCGv arg2
)
48 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
49 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
52 static inline void tcg_gen_op2i(int opc
, TCGv arg1
, TCGArg arg2
)
55 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
56 *gen_opparam_ptr
++ = arg2
;
59 static inline void tcg_gen_op2ii(int opc
, TCGArg arg1
, TCGArg arg2
)
62 *gen_opparam_ptr
++ = arg1
;
63 *gen_opparam_ptr
++ = arg2
;
66 static inline void tcg_gen_op3(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
)
69 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
70 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
71 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
74 static inline void tcg_gen_op3i(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
)
77 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
78 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
79 *gen_opparam_ptr
++ = arg3
;
82 static inline void tcg_gen_op4(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
86 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
87 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
88 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
89 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
92 static inline void tcg_gen_op4i(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
96 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
97 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
98 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
99 *gen_opparam_ptr
++ = arg4
;
102 static inline void tcg_gen_op4ii(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
,
105 *gen_opc_ptr
++ = opc
;
106 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
107 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
108 *gen_opparam_ptr
++ = arg3
;
109 *gen_opparam_ptr
++ = arg4
;
112 static inline void tcg_gen_op5(int opc
, TCGv arg1
, TCGv arg2
,
113 TCGv arg3
, TCGv arg4
,
116 *gen_opc_ptr
++ = opc
;
117 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
118 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
119 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
120 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
121 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
124 static inline void tcg_gen_op5i(int opc
, TCGv arg1
, TCGv arg2
,
125 TCGv arg3
, TCGv arg4
,
128 *gen_opc_ptr
++ = opc
;
129 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
130 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
131 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
132 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
133 *gen_opparam_ptr
++ = arg5
;
136 static inline void tcg_gen_op6(int opc
, TCGv arg1
, TCGv arg2
,
137 TCGv arg3
, TCGv arg4
,
138 TCGv arg5
, TCGv arg6
)
140 *gen_opc_ptr
++ = opc
;
141 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
142 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
143 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
144 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
145 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
146 *gen_opparam_ptr
++ = GET_TCGV(arg6
);
149 static inline void tcg_gen_op6ii(int opc
, TCGv arg1
, TCGv arg2
,
150 TCGv arg3
, TCGv arg4
,
151 TCGArg arg5
, TCGArg arg6
)
153 *gen_opc_ptr
++ = opc
;
154 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
155 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
156 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
157 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
158 *gen_opparam_ptr
++ = arg5
;
159 *gen_opparam_ptr
++ = arg6
;
162 static inline void gen_set_label(int n
)
164 tcg_gen_op1i(INDEX_op_set_label
, n
);
167 static inline void tcg_gen_br(int label
)
169 tcg_gen_op1i(INDEX_op_br
, label
);
172 static inline void tcg_gen_mov_i32(TCGv ret
, TCGv arg
)
174 if (GET_TCGV(ret
) != GET_TCGV(arg
))
175 tcg_gen_op2(INDEX_op_mov_i32
, ret
, arg
);
178 static inline void tcg_gen_movi_i32(TCGv ret
, int32_t arg
)
180 tcg_gen_op2i(INDEX_op_movi_i32
, ret
, arg
);
184 #define TCG_HELPER_CALL_FLAGS 0
186 static inline void tcg_gen_helper_0_0(void *func
)
189 t0
= tcg_const_ptr((tcg_target_long
)func
);
190 tcg_gen_call(&tcg_ctx
,
191 t0
, TCG_HELPER_CALL_FLAGS
,
196 static inline void tcg_gen_helper_0_1(void *func
, TCGv arg
)
199 t0
= tcg_const_ptr((tcg_target_long
)func
);
200 tcg_gen_call(&tcg_ctx
,
201 t0
, TCG_HELPER_CALL_FLAGS
,
206 static inline void tcg_gen_helper_0_2(void *func
, TCGv arg1
, TCGv arg2
)
212 t0
= tcg_const_ptr((tcg_target_long
)func
);
213 tcg_gen_call(&tcg_ctx
,
214 t0
, TCG_HELPER_CALL_FLAGS
,
219 static inline void tcg_gen_helper_0_3(void *func
,
220 TCGv arg1
, TCGv arg2
, TCGv arg3
)
227 t0
= tcg_const_ptr((tcg_target_long
)func
);
228 tcg_gen_call(&tcg_ctx
,
229 t0
, TCG_HELPER_CALL_FLAGS
,
234 static inline void tcg_gen_helper_0_4(void *func
, TCGv arg1
, TCGv arg2
,
235 TCGv arg3
, TCGv arg4
)
243 t0
= tcg_const_ptr((tcg_target_long
)func
);
244 tcg_gen_call(&tcg_ctx
,
245 t0
, TCG_HELPER_CALL_FLAGS
,
250 static inline void tcg_gen_helper_1_0(void *func
, TCGv ret
)
253 t0
= tcg_const_ptr((tcg_target_long
)func
);
254 tcg_gen_call(&tcg_ctx
,
255 t0
, TCG_HELPER_CALL_FLAGS
,
260 static inline void tcg_gen_helper_1_1(void *func
, TCGv ret
, TCGv arg1
)
263 t0
= tcg_const_ptr((tcg_target_long
)func
);
264 tcg_gen_call(&tcg_ctx
,
265 t0
, TCG_HELPER_CALL_FLAGS
,
270 static inline void tcg_gen_helper_1_2(void *func
, TCGv ret
,
271 TCGv arg1
, TCGv arg2
)
277 t0
= tcg_const_ptr((tcg_target_long
)func
);
278 tcg_gen_call(&tcg_ctx
,
279 t0
, TCG_HELPER_CALL_FLAGS
,
284 static inline void tcg_gen_helper_1_3(void *func
, TCGv ret
,
285 TCGv arg1
, TCGv arg2
, TCGv arg3
)
292 t0
= tcg_const_ptr((tcg_target_long
)func
);
293 tcg_gen_call(&tcg_ctx
,
294 t0
, TCG_HELPER_CALL_FLAGS
,
299 static inline void tcg_gen_helper_1_4(void *func
, TCGv ret
,
300 TCGv arg1
, TCGv arg2
, TCGv arg3
,
309 t0
= tcg_const_ptr((tcg_target_long
)func
);
310 tcg_gen_call(&tcg_ctx
,
311 t0
, TCG_HELPER_CALL_FLAGS
,
318 static inline void tcg_gen_ld8u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
320 tcg_gen_op3i(INDEX_op_ld8u_i32
, ret
, arg2
, offset
);
323 static inline void tcg_gen_ld8s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
325 tcg_gen_op3i(INDEX_op_ld8s_i32
, ret
, arg2
, offset
);
328 static inline void tcg_gen_ld16u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
330 tcg_gen_op3i(INDEX_op_ld16u_i32
, ret
, arg2
, offset
);
333 static inline void tcg_gen_ld16s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
335 tcg_gen_op3i(INDEX_op_ld16s_i32
, ret
, arg2
, offset
);
338 static inline void tcg_gen_ld_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
340 tcg_gen_op3i(INDEX_op_ld_i32
, ret
, arg2
, offset
);
343 static inline void tcg_gen_st8_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
345 tcg_gen_op3i(INDEX_op_st8_i32
, arg1
, arg2
, offset
);
348 static inline void tcg_gen_st16_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
350 tcg_gen_op3i(INDEX_op_st16_i32
, arg1
, arg2
, offset
);
353 static inline void tcg_gen_st_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
355 tcg_gen_op3i(INDEX_op_st_i32
, arg1
, arg2
, offset
);
358 static inline void tcg_gen_add_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
360 tcg_gen_op3(INDEX_op_add_i32
, ret
, arg1
, arg2
);
363 static inline void tcg_gen_addi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
365 /* some cases can be optimized here */
367 tcg_gen_mov_i32(ret
, arg1
);
369 TCGv t0
= tcg_const_i32(arg2
);
370 tcg_gen_add_i32(ret
, arg1
, t0
);
375 static inline void tcg_gen_sub_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
377 tcg_gen_op3(INDEX_op_sub_i32
, ret
, arg1
, arg2
);
380 static inline void tcg_gen_subi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
382 /* some cases can be optimized here */
384 tcg_gen_mov_i32(ret
, arg1
);
386 TCGv t0
= tcg_const_i32(arg2
);
387 tcg_gen_sub_i32(ret
, arg1
, t0
);
392 static inline void tcg_gen_and_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
394 tcg_gen_op3(INDEX_op_and_i32
, ret
, arg1
, arg2
);
397 static inline void tcg_gen_andi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
399 /* some cases can be optimized here */
401 tcg_gen_movi_i32(ret
, 0);
402 } else if (arg2
== 0xffffffff) {
403 tcg_gen_mov_i32(ret
, arg1
);
405 TCGv t0
= tcg_const_i32(arg2
);
406 tcg_gen_and_i32(ret
, arg1
, t0
);
411 static inline void tcg_gen_or_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
413 tcg_gen_op3(INDEX_op_or_i32
, ret
, arg1
, arg2
);
416 static inline void tcg_gen_ori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
418 /* some cases can be optimized here */
419 if (arg2
== 0xffffffff) {
420 tcg_gen_movi_i32(ret
, 0xffffffff);
421 } else if (arg2
== 0) {
422 tcg_gen_mov_i32(ret
, arg1
);
424 TCGv t0
= tcg_const_i32(arg2
);
425 tcg_gen_or_i32(ret
, arg1
, t0
);
430 static inline void tcg_gen_xor_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
432 tcg_gen_op3(INDEX_op_xor_i32
, ret
, arg1
, arg2
);
435 static inline void tcg_gen_xori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
437 /* some cases can be optimized here */
439 tcg_gen_mov_i32(ret
, arg1
);
441 TCGv t0
= tcg_const_i32(arg2
);
442 tcg_gen_xor_i32(ret
, arg1
, t0
);
447 static inline void tcg_gen_shl_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
449 tcg_gen_op3(INDEX_op_shl_i32
, ret
, arg1
, arg2
);
452 static inline void tcg_gen_shli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
455 tcg_gen_mov_i32(ret
, arg1
);
457 TCGv t0
= tcg_const_i32(arg2
);
458 tcg_gen_shl_i32(ret
, arg1
, t0
);
463 static inline void tcg_gen_shr_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
465 tcg_gen_op3(INDEX_op_shr_i32
, ret
, arg1
, arg2
);
468 static inline void tcg_gen_shri_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
471 tcg_gen_mov_i32(ret
, arg1
);
473 TCGv t0
= tcg_const_i32(arg2
);
474 tcg_gen_shr_i32(ret
, arg1
, t0
);
479 static inline void tcg_gen_sar_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
481 tcg_gen_op3(INDEX_op_sar_i32
, ret
, arg1
, arg2
);
484 static inline void tcg_gen_sari_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
487 tcg_gen_mov_i32(ret
, arg1
);
489 TCGv t0
= tcg_const_i32(arg2
);
490 tcg_gen_sar_i32(ret
, arg1
, t0
);
495 static inline void tcg_gen_brcond_i32(int cond
, TCGv arg1
, TCGv arg2
,
498 tcg_gen_op4ii(INDEX_op_brcond_i32
, arg1
, arg2
, cond
, label_index
);
501 static inline void tcg_gen_brcondi_i32(int cond
, TCGv arg1
, int32_t arg2
,
504 TCGv t0
= tcg_const_i32(arg2
);
505 tcg_gen_brcond_i32(cond
, arg1
, t0
, label_index
);
509 static inline void tcg_gen_mul_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
511 tcg_gen_op3(INDEX_op_mul_i32
, ret
, arg1
, arg2
);
514 static inline void tcg_gen_muli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
516 TCGv t0
= tcg_const_i32(arg2
);
517 tcg_gen_mul_i32(ret
, arg1
, t0
);
521 #ifdef TCG_TARGET_HAS_div_i32
522 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
524 tcg_gen_op3(INDEX_op_div_i32
, ret
, arg1
, arg2
);
527 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
529 tcg_gen_op3(INDEX_op_rem_i32
, ret
, arg1
, arg2
);
532 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
534 tcg_gen_op3(INDEX_op_divu_i32
, ret
, arg1
, arg2
);
537 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
539 tcg_gen_op3(INDEX_op_remu_i32
, ret
, arg1
, arg2
);
542 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
545 t0
= tcg_temp_new(TCG_TYPE_I32
);
546 tcg_gen_sari_i32(t0
, arg1
, 31);
547 tcg_gen_op5(INDEX_op_div2_i32
, ret
, t0
, arg1
, t0
, arg2
);
551 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
554 t0
= tcg_temp_new(TCG_TYPE_I32
);
555 tcg_gen_sari_i32(t0
, arg1
, 31);
556 tcg_gen_op5(INDEX_op_div2_i32
, t0
, ret
, arg1
, t0
, arg2
);
560 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
563 t0
= tcg_temp_new(TCG_TYPE_I32
);
564 tcg_gen_movi_i32(t0
, 0);
565 tcg_gen_op5(INDEX_op_divu2_i32
, ret
, t0
, arg1
, t0
, arg2
);
569 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
572 t0
= tcg_temp_new(TCG_TYPE_I32
);
573 tcg_gen_movi_i32(t0
, 0);
574 tcg_gen_op5(INDEX_op_divu2_i32
, t0
, ret
, arg1
, t0
, arg2
);
579 #if TCG_TARGET_REG_BITS == 32
581 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
583 if (GET_TCGV(ret
) != GET_TCGV(arg
)) {
584 tcg_gen_mov_i32(ret
, arg
);
585 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg
));
589 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
591 tcg_gen_movi_i32(ret
, arg
);
592 tcg_gen_movi_i32(TCGV_HIGH(ret
), arg
>> 32);
595 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
597 tcg_gen_ld8u_i32(ret
, arg2
, offset
);
598 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
601 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
603 tcg_gen_ld8s_i32(ret
, arg2
, offset
);
604 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
607 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
609 tcg_gen_ld16u_i32(ret
, arg2
, offset
);
610 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
613 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
615 tcg_gen_ld16s_i32(ret
, arg2
, offset
);
616 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
619 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
621 tcg_gen_ld_i32(ret
, arg2
, offset
);
622 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
625 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
627 tcg_gen_ld_i32(ret
, arg2
, offset
);
628 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
631 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
633 /* since arg2 and ret have different types, they cannot be the
635 #ifdef TCG_TARGET_WORDS_BIGENDIAN
636 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
);
637 tcg_gen_ld_i32(ret
, arg2
, offset
+ 4);
639 tcg_gen_ld_i32(ret
, arg2
, offset
);
640 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
+ 4);
644 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
646 tcg_gen_st8_i32(arg1
, arg2
, offset
);
649 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
651 tcg_gen_st16_i32(arg1
, arg2
, offset
);
654 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
656 tcg_gen_st_i32(arg1
, arg2
, offset
);
659 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
661 #ifdef TCG_TARGET_WORDS_BIGENDIAN
662 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
);
663 tcg_gen_st_i32(arg1
, arg2
, offset
+ 4);
665 tcg_gen_st_i32(arg1
, arg2
, offset
);
666 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
+ 4);
670 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
672 tcg_gen_op6(INDEX_op_add2_i32
, ret
, TCGV_HIGH(ret
),
673 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
676 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
678 TCGv t0
= tcg_const_i64(arg2
);
679 tcg_gen_add_i64(ret
, arg1
, t0
);
683 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
685 tcg_gen_op6(INDEX_op_sub2_i32
, ret
, TCGV_HIGH(ret
),
686 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
689 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
691 TCGv t0
= tcg_const_i64(arg2
);
692 tcg_gen_sub_i64(ret
, arg1
, t0
);
696 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
698 tcg_gen_and_i32(ret
, arg1
, arg2
);
699 tcg_gen_and_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
702 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
704 tcg_gen_andi_i32(ret
, arg1
, arg2
);
705 tcg_gen_andi_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
708 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
710 tcg_gen_or_i32(ret
, arg1
, arg2
);
711 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
714 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
716 tcg_gen_ori_i32(ret
, arg1
, arg2
);
717 tcg_gen_ori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
720 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
722 tcg_gen_xor_i32(ret
, arg1
, arg2
);
723 tcg_gen_xor_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
726 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
728 tcg_gen_xori_i32(ret
, arg1
, arg2
);
729 tcg_gen_xori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
732 /* XXX: use generic code when basic block handling is OK or CPU
733 specific code (x86) */
734 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
736 tcg_gen_helper_1_2(tcg_helper_shl_i64
, ret
, arg1
, arg2
);
739 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
741 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 0, 0);
744 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
746 tcg_gen_helper_1_2(tcg_helper_shr_i64
, ret
, arg1
, arg2
);
749 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
751 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 0);
754 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
756 tcg_gen_helper_1_2(tcg_helper_sar_i64
, ret
, arg1
, arg2
);
759 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
761 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 1);
764 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
767 tcg_gen_op6ii(INDEX_op_brcond2_i32
,
768 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
),
772 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
776 t0
= tcg_temp_new(TCG_TYPE_I64
);
777 t1
= tcg_temp_new(TCG_TYPE_I32
);
779 tcg_gen_op4(INDEX_op_mulu2_i32
, t0
, TCGV_HIGH(t0
), arg1
, arg2
);
781 tcg_gen_mul_i32(t1
, arg1
, TCGV_HIGH(arg2
));
782 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
783 tcg_gen_mul_i32(t1
, TCGV_HIGH(arg1
), arg2
);
784 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
786 tcg_gen_mov_i64(ret
, t0
);
791 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
793 TCGv t0
= tcg_const_i64(arg2
);
794 tcg_gen_mul_i64(ret
, arg1
, t0
);
798 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
800 tcg_gen_helper_1_2(tcg_helper_div_i64
, ret
, arg1
, arg2
);
803 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
805 tcg_gen_helper_1_2(tcg_helper_rem_i64
, ret
, arg1
, arg2
);
808 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
810 tcg_gen_helper_1_2(tcg_helper_divu_i64
, ret
, arg1
, arg2
);
813 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
815 tcg_gen_helper_1_2(tcg_helper_remu_i64
, ret
, arg1
, arg2
);
820 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
822 if (GET_TCGV(ret
) != GET_TCGV(arg
))
823 tcg_gen_op2(INDEX_op_mov_i64
, ret
, arg
);
826 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
828 tcg_gen_op2i(INDEX_op_movi_i64
, ret
, arg
);
831 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
,
832 tcg_target_long offset
)
834 tcg_gen_op3i(INDEX_op_ld8u_i64
, ret
, arg2
, offset
);
837 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
,
838 tcg_target_long offset
)
840 tcg_gen_op3i(INDEX_op_ld8s_i64
, ret
, arg2
, offset
);
843 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
,
844 tcg_target_long offset
)
846 tcg_gen_op3i(INDEX_op_ld16u_i64
, ret
, arg2
, offset
);
849 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
,
850 tcg_target_long offset
)
852 tcg_gen_op3i(INDEX_op_ld16s_i64
, ret
, arg2
, offset
);
855 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
,
856 tcg_target_long offset
)
858 tcg_gen_op3i(INDEX_op_ld32u_i64
, ret
, arg2
, offset
);
861 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
,
862 tcg_target_long offset
)
864 tcg_gen_op3i(INDEX_op_ld32s_i64
, ret
, arg2
, offset
);
867 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
869 tcg_gen_op3i(INDEX_op_ld_i64
, ret
, arg2
, offset
);
872 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
,
873 tcg_target_long offset
)
875 tcg_gen_op3i(INDEX_op_st8_i64
, arg1
, arg2
, offset
);
878 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
,
879 tcg_target_long offset
)
881 tcg_gen_op3i(INDEX_op_st16_i64
, arg1
, arg2
, offset
);
884 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
,
885 tcg_target_long offset
)
887 tcg_gen_op3i(INDEX_op_st32_i64
, arg1
, arg2
, offset
);
890 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
892 tcg_gen_op3i(INDEX_op_st_i64
, arg1
, arg2
, offset
);
895 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
897 tcg_gen_op3(INDEX_op_add_i64
, ret
, arg1
, arg2
);
900 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
902 TCGv t0
= tcg_const_i64(arg2
);
903 tcg_gen_add_i64(ret
, arg1
, t0
);
907 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
909 tcg_gen_op3(INDEX_op_sub_i64
, ret
, arg1
, arg2
);
912 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
914 TCGv t0
= tcg_const_i64(arg2
);
915 tcg_gen_sub_i64(ret
, arg1
, t0
);
919 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
921 tcg_gen_op3(INDEX_op_and_i64
, ret
, arg1
, arg2
);
924 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
926 TCGv t0
= tcg_const_i64(arg2
);
927 tcg_gen_and_i64(ret
, arg1
, t0
);
931 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
933 tcg_gen_op3(INDEX_op_or_i64
, ret
, arg1
, arg2
);
936 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
938 TCGv t0
= tcg_const_i64(arg2
);
939 tcg_gen_or_i64(ret
, arg1
, t0
);
943 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
945 tcg_gen_op3(INDEX_op_xor_i64
, ret
, arg1
, arg2
);
948 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
950 TCGv t0
= tcg_const_i64(arg2
);
951 tcg_gen_xor_i64(ret
, arg1
, t0
);
955 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
957 tcg_gen_op3(INDEX_op_shl_i64
, ret
, arg1
, arg2
);
960 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
963 tcg_gen_mov_i64(ret
, arg1
);
965 TCGv t0
= tcg_const_i64(arg2
);
966 tcg_gen_shl_i64(ret
, arg1
, t0
);
971 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
973 tcg_gen_op3(INDEX_op_shr_i64
, ret
, arg1
, arg2
);
976 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
979 tcg_gen_mov_i64(ret
, arg1
);
981 TCGv t0
= tcg_const_i64(arg2
);
982 tcg_gen_shr_i64(ret
, arg1
, t0
);
987 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
989 tcg_gen_op3(INDEX_op_sar_i64
, ret
, arg1
, arg2
);
992 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
995 tcg_gen_mov_i64(ret
, arg1
);
997 TCGv t0
= tcg_const_i64(arg2
);
998 tcg_gen_sar_i64(ret
, arg1
, t0
);
1003 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
1006 tcg_gen_op4ii(INDEX_op_brcond_i64
, arg1
, arg2
, cond
, label_index
);
1009 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1011 tcg_gen_op3(INDEX_op_mul_i64
, ret
, arg1
, arg2
);
1014 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
1016 TCGv t0
= tcg_const_i64(arg2
);
1017 tcg_gen_mul_i64(ret
, arg1
, t0
);
1021 #ifdef TCG_TARGET_HAS_div_i64
1022 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1024 tcg_gen_op3(INDEX_op_div_i64
, ret
, arg1
, arg2
);
1027 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1029 tcg_gen_op3(INDEX_op_rem_i64
, ret
, arg1
, arg2
);
1032 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1034 tcg_gen_op3(INDEX_op_divu_i64
, ret
, arg1
, arg2
);
1037 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1039 tcg_gen_op3(INDEX_op_remu_i64
, ret
, arg1
, arg2
);
1042 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1045 t0
= tcg_temp_new(TCG_TYPE_I64
);
1046 tcg_gen_sari_i64(t0
, arg1
, 63);
1047 tcg_gen_op5(INDEX_op_div2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1051 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1054 t0
= tcg_temp_new(TCG_TYPE_I64
);
1055 tcg_gen_sari_i64(t0
, arg1
, 63);
1056 tcg_gen_op5(INDEX_op_div2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1060 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1063 t0
= tcg_temp_new(TCG_TYPE_I64
);
1064 tcg_gen_movi_i64(t0
, 0);
1065 tcg_gen_op5(INDEX_op_divu2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1069 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1072 t0
= tcg_temp_new(TCG_TYPE_I64
);
1073 tcg_gen_movi_i64(t0
, 0);
1074 tcg_gen_op5(INDEX_op_divu2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1081 static inline void tcg_gen_brcondi_i64(int cond
, TCGv arg1
, int64_t arg2
,
1084 TCGv t0
= tcg_const_i64(arg2
);
1085 tcg_gen_brcond_i64(cond
, arg1
, t0
, label_index
);
1089 /***************************************/
1090 /* optional operations */
1092 static inline void tcg_gen_ext8s_i32(TCGv ret
, TCGv arg
)
1094 #ifdef TCG_TARGET_HAS_ext8s_i32
1095 tcg_gen_op2(INDEX_op_ext8s_i32
, ret
, arg
);
1097 tcg_gen_shli_i32(ret
, arg
, 24);
1098 tcg_gen_sari_i32(ret
, ret
, 24);
1102 static inline void tcg_gen_ext16s_i32(TCGv ret
, TCGv arg
)
1104 #ifdef TCG_TARGET_HAS_ext16s_i32
1105 tcg_gen_op2(INDEX_op_ext16s_i32
, ret
, arg
);
1107 tcg_gen_shli_i32(ret
, arg
, 16);
1108 tcg_gen_sari_i32(ret
, ret
, 16);
1112 /* These are currently just for convenience.
1113 We assume a target will recognise these automatically . */
1114 static inline void tcg_gen_ext8u_i32(TCGv ret
, TCGv arg
)
1116 tcg_gen_andi_i32(ret
, arg
, 0xffu
);
1119 static inline void tcg_gen_ext16u_i32(TCGv ret
, TCGv arg
)
1121 tcg_gen_andi_i32(ret
, arg
, 0xffffu
);
1124 /* Note: we assume the two high bytes are set to zero */
1125 static inline void tcg_gen_bswap16_i32(TCGv ret
, TCGv arg
)
1127 #ifdef TCG_TARGET_HAS_bswap16_i32
1128 tcg_gen_op2(INDEX_op_bswap16_i32
, ret
, arg
);
1131 t0
= tcg_temp_new(TCG_TYPE_I32
);
1132 t1
= tcg_temp_new(TCG_TYPE_I32
);
1134 tcg_gen_shri_i32(t0
, arg
, 8);
1135 tcg_gen_andi_i32(t1
, arg
, 0x000000ff);
1136 tcg_gen_shli_i32(t1
, t1
, 8);
1137 tcg_gen_or_i32(ret
, t0
, t1
);
1143 static inline void tcg_gen_bswap_i32(TCGv ret
, TCGv arg
)
1145 #ifdef TCG_TARGET_HAS_bswap_i32
1146 tcg_gen_op2(INDEX_op_bswap_i32
, ret
, arg
);
1149 t0
= tcg_temp_new(TCG_TYPE_I32
);
1150 t1
= tcg_temp_new(TCG_TYPE_I32
);
1152 tcg_gen_shli_i32(t0
, arg
, 24);
1154 tcg_gen_andi_i32(t1
, arg
, 0x0000ff00);
1155 tcg_gen_shli_i32(t1
, t1
, 8);
1156 tcg_gen_or_i32(t0
, t0
, t1
);
1158 tcg_gen_shri_i32(t1
, arg
, 8);
1159 tcg_gen_andi_i32(t1
, t1
, 0x0000ff00);
1160 tcg_gen_or_i32(t0
, t0
, t1
);
1162 tcg_gen_shri_i32(t1
, arg
, 24);
1163 tcg_gen_or_i32(ret
, t0
, t1
);
1169 #if TCG_TARGET_REG_BITS == 32
1170 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1172 tcg_gen_ext8s_i32(ret
, arg
);
1173 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1176 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1178 tcg_gen_ext16s_i32(ret
, arg
);
1179 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1182 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1184 tcg_gen_mov_i32(ret
, arg
);
1185 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1188 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1190 tcg_gen_ext8u_i32(ret
, arg
);
1191 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1194 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1196 tcg_gen_ext16u_i32(ret
, arg
);
1197 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1200 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1202 tcg_gen_mov_i32(ret
, arg
);
1203 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1206 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1208 tcg_gen_mov_i32(ret
, arg
);
1211 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1213 tcg_gen_mov_i32(ret
, arg
);
1214 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1217 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1219 tcg_gen_mov_i32(ret
, arg
);
1220 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1223 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1226 t0
= tcg_temp_new(TCG_TYPE_I32
);
1227 t1
= tcg_temp_new(TCG_TYPE_I32
);
1229 tcg_gen_bswap_i32(t0
, arg
);
1230 tcg_gen_bswap_i32(t1
, TCGV_HIGH(arg
));
1231 tcg_gen_mov_i32(ret
, t1
);
1232 tcg_gen_mov_i32(TCGV_HIGH(ret
), t0
);
1238 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1240 #ifdef TCG_TARGET_HAS_ext8s_i64
1241 tcg_gen_op2(INDEX_op_ext8s_i64
, ret
, arg
);
1243 tcg_gen_shli_i64(ret
, arg
, 56);
1244 tcg_gen_sari_i64(ret
, ret
, 56);
1248 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1250 #ifdef TCG_TARGET_HAS_ext16s_i64
1251 tcg_gen_op2(INDEX_op_ext16s_i64
, ret
, arg
);
1253 tcg_gen_shli_i64(ret
, arg
, 48);
1254 tcg_gen_sari_i64(ret
, ret
, 48);
1258 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1260 #ifdef TCG_TARGET_HAS_ext32s_i64
1261 tcg_gen_op2(INDEX_op_ext32s_i64
, ret
, arg
);
1263 tcg_gen_shli_i64(ret
, arg
, 32);
1264 tcg_gen_sari_i64(ret
, ret
, 32);
1268 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1270 tcg_gen_andi_i64(ret
, arg
, 0xffu
);
1273 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1275 tcg_gen_andi_i64(ret
, arg
, 0xffffu
);
1278 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1280 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1283 /* Note: we assume the target supports move between 32 and 64 bit
1284 registers. This will probably break MIPS64 targets. */
1285 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1287 tcg_gen_mov_i32(ret
, arg
);
1290 /* Note: we assume the target supports move between 32 and 64 bit
1292 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1294 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1297 /* Note: we assume the target supports move between 32 and 64 bit
1299 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1301 tcg_gen_ext32s_i64(ret
, arg
);
1304 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1306 #ifdef TCG_TARGET_HAS_bswap_i64
1307 tcg_gen_op2(INDEX_op_bswap_i64
, ret
, arg
);
1310 t0
= tcg_temp_new(TCG_TYPE_I32
);
1311 t1
= tcg_temp_new(TCG_TYPE_I32
);
1313 tcg_gen_shli_i64(t0
, arg
, 56);
1315 tcg_gen_andi_i64(t1
, arg
, 0x0000ff00);
1316 tcg_gen_shli_i64(t1
, t1
, 40);
1317 tcg_gen_or_i64(t0
, t0
, t1
);
1319 tcg_gen_andi_i64(t1
, arg
, 0x00ff0000);
1320 tcg_gen_shli_i64(t1
, t1
, 24);
1321 tcg_gen_or_i64(t0
, t0
, t1
);
1323 tcg_gen_andi_i64(t1
, arg
, 0xff000000);
1324 tcg_gen_shli_i64(t1
, t1
, 8);
1325 tcg_gen_or_i64(t0
, t0
, t1
);
1327 tcg_gen_shri_i64(t1
, arg
, 8);
1328 tcg_gen_andi_i64(t1
, t1
, 0xff000000);
1329 tcg_gen_or_i64(t0
, t0
, t1
);
1331 tcg_gen_shri_i64(t1
, arg
, 24);
1332 tcg_gen_andi_i64(t1
, t1
, 0x00ff0000);
1333 tcg_gen_or_i64(t0
, t0
, t1
);
1335 tcg_gen_shri_i64(t1
, arg
, 40);
1336 tcg_gen_andi_i64(t1
, t1
, 0x0000ff00);
1337 tcg_gen_or_i64(t0
, t0
, t1
);
1339 tcg_gen_shri_i64(t1
, arg
, 56);
1340 tcg_gen_or_i64(ret
, t0
, t1
);
1348 static inline void tcg_gen_neg_i32(TCGv ret
, TCGv arg
)
1350 #ifdef TCG_TARGET_HAS_neg_i32
1351 tcg_gen_op2(INDEX_op_neg_i32
, ret
, arg
);
1353 TCGv t0
= tcg_const_i32(0);
1354 tcg_gen_sub_i32(ret
, t0
, arg
);
1359 static inline void tcg_gen_neg_i64(TCGv ret
, TCGv arg
)
1361 #ifdef TCG_TARGET_HAS_neg_i64
1362 tcg_gen_op2(INDEX_op_neg_i64
, ret
, arg
);
1364 TCGv t0
= tcg_const_i64(0);
1365 tcg_gen_sub_i64(ret
, t0
, arg
);
1370 static inline void tcg_gen_not_i32(TCGv ret
, TCGv arg
)
1372 tcg_gen_xori_i32(ret
, arg
, -1);
1375 static inline void tcg_gen_not_i64(TCGv ret
, TCGv arg
)
1377 tcg_gen_xori_i64(ret
, arg
, -1);
1380 static inline void tcg_gen_discard_i32(TCGv arg
)
1382 tcg_gen_op1(INDEX_op_discard
, arg
);
1385 #if TCG_TARGET_REG_BITS == 32
1386 static inline void tcg_gen_discard_i64(TCGv arg
)
1388 tcg_gen_discard_i32(arg
);
1389 tcg_gen_discard_i32(TCGV_HIGH(arg
));
1392 static inline void tcg_gen_discard_i64(TCGv arg
)
1394 tcg_gen_op1(INDEX_op_discard
, arg
);
1398 static inline void tcg_gen_concat_i32_i64(TCGv dest
, TCGv low
, TCGv high
)
1400 #if TCG_TARGET_REG_BITS == 32
1401 tcg_gen_mov_i32(dest
, low
);
1402 tcg_gen_mov_i32(TCGV_HIGH(dest
), high
);
1404 TCGv tmp
= tcg_temp_new (TCG_TYPE_I64
);
1405 /* This extension is only needed for type correctness.
1406 We may be able to do better given target specific information. */
1407 tcg_gen_extu_i32_i64(tmp
, high
);
1408 tcg_gen_shli_i64(tmp
, tmp
, 32);
1409 tcg_gen_extu_i32_i64(dest
, low
);
1410 tcg_gen_or_i64(dest
, dest
, tmp
);
1415 static inline void tcg_gen_concat32_i64(TCGv dest
, TCGv low
, TCGv high
)
1417 #if TCG_TARGET_REG_BITS == 32
1418 tcg_gen_concat_i32_i64(dest
, low
, high
);
1420 TCGv tmp
= tcg_temp_new(TCG_TYPE_I64
);
1421 tcg_gen_ext32u_i64(dest
, low
);
1422 tcg_gen_shli_i64(tmp
, high
, 32);
1423 tcg_gen_or_i64(dest
, dest
, tmp
);
1428 static inline void tcg_gen_andc_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1431 t0
= tcg_temp_new(TCG_TYPE_I32
);
1432 tcg_gen_not_i32(t0
, arg2
);
1433 tcg_gen_and_i32(ret
, arg1
, t0
);
1437 static inline void tcg_gen_andc_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1440 t0
= tcg_temp_new(TCG_TYPE_I64
);
1441 tcg_gen_not_i64(t0
, arg2
);
1442 tcg_gen_and_i64(ret
, arg1
, t0
);
1446 static inline void tcg_gen_eqv_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1449 t0
= tcg_temp_new(TCG_TYPE_I32
);
1450 tcg_gen_xor_i32(t0
, arg1
, arg2
);
1451 tcg_gen_not_i32(ret
, t0
);
1455 static inline void tcg_gen_eqv_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1458 t0
= tcg_temp_new(TCG_TYPE_I64
);
1459 tcg_gen_xor_i64(t0
, arg1
, arg2
);
1460 tcg_gen_not_i64(ret
, t0
);
1464 static inline void tcg_gen_nand_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1467 t0
= tcg_temp_new(TCG_TYPE_I32
);
1468 tcg_gen_and_i32(t0
, arg1
, arg2
);
1469 tcg_gen_not_i32(ret
, t0
);
1473 static inline void tcg_gen_nand_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1476 t0
= tcg_temp_new(TCG_TYPE_I64
);
1477 tcg_gen_and_i64(t0
, arg1
, arg2
);
1478 tcg_gen_not_i64(ret
, t0
);
1482 static inline void tcg_gen_nor_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1485 t0
= tcg_temp_new(TCG_TYPE_I32
);
1486 tcg_gen_or_i32(t0
, arg1
, arg2
);
1487 tcg_gen_not_i32(ret
, t0
);
1491 static inline void tcg_gen_nor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1494 t0
= tcg_temp_new(TCG_TYPE_I64
);
1495 tcg_gen_or_i64(t0
, arg1
, arg2
);
1496 tcg_gen_not_i64(ret
, t0
);
1500 static inline void tcg_gen_orc_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1503 t0
= tcg_temp_new(TCG_TYPE_I32
);
1504 tcg_gen_not_i32(t0
, arg2
);
1505 tcg_gen_or_i32(ret
, arg1
, t0
);
1509 static inline void tcg_gen_orc_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1512 t0
= tcg_temp_new(TCG_TYPE_I64
);
1513 tcg_gen_not_i64(t0
, arg2
);
1514 tcg_gen_or_i64(ret
, arg1
, t0
);
1518 /***************************************/
1519 /* QEMU specific operations. Their type depend on the QEMU CPU
1521 #ifndef TARGET_LONG_BITS
1522 #error must include QEMU headers
1525 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1526 static inline void tcg_gen_debug_insn_start(uint64_t pc
)
1528 /* XXX: must really use a 32 bit size for TCGArg in all cases */
1529 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1530 tcg_gen_op2ii(INDEX_op_debug_insn_start
,
1531 (uint32_t)(pc
), (uint32_t)(pc
>> 32));
1533 tcg_gen_op1i(INDEX_op_debug_insn_start
, pc
);
1537 static inline void tcg_gen_exit_tb(tcg_target_long val
)
1539 tcg_gen_op1i(INDEX_op_exit_tb
, val
);
1542 static inline void tcg_gen_goto_tb(int idx
)
1544 tcg_gen_op1i(INDEX_op_goto_tb
, idx
);
1547 #if TCG_TARGET_REG_BITS == 32
1548 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1550 #if TARGET_LONG_BITS == 32
1551 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1553 tcg_gen_op4i(INDEX_op_qemu_ld8u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1554 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1558 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1560 #if TARGET_LONG_BITS == 32
1561 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1563 tcg_gen_op4i(INDEX_op_qemu_ld8s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1564 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1568 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1570 #if TARGET_LONG_BITS == 32
1571 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1573 tcg_gen_op4i(INDEX_op_qemu_ld16u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1574 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1578 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1580 #if TARGET_LONG_BITS == 32
1581 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1583 tcg_gen_op4i(INDEX_op_qemu_ld16s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1584 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1588 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1590 #if TARGET_LONG_BITS == 32
1591 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1593 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1594 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1598 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1600 #if TARGET_LONG_BITS == 32
1601 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1603 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1604 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1608 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1610 #if TARGET_LONG_BITS == 32
1611 tcg_gen_op4i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
), addr
, mem_index
);
1613 tcg_gen_op5i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
),
1614 addr
, TCGV_HIGH(addr
), mem_index
);
1618 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1620 #if TARGET_LONG_BITS == 32
1621 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1623 tcg_gen_op4i(INDEX_op_qemu_st8
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1627 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1629 #if TARGET_LONG_BITS == 32
1630 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1632 tcg_gen_op4i(INDEX_op_qemu_st16
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1636 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1638 #if TARGET_LONG_BITS == 32
1639 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1641 tcg_gen_op4i(INDEX_op_qemu_st32
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1645 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1647 #if TARGET_LONG_BITS == 32
1648 tcg_gen_op4i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
), addr
, mem_index
);
1650 tcg_gen_op5i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
),
1651 addr
, TCGV_HIGH(addr
), mem_index
);
1655 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1656 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1658 #else /* TCG_TARGET_REG_BITS == 32 */
1660 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1662 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1665 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1667 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1670 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1672 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1675 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1677 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1680 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1682 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1685 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1687 tcg_gen_op3i(INDEX_op_qemu_ld32s
, ret
, addr
, mem_index
);
1690 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1692 tcg_gen_op3i(INDEX_op_qemu_ld64
, ret
, addr
, mem_index
);
1695 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1697 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1700 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1702 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1705 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1707 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1710 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1712 tcg_gen_op3i(INDEX_op_qemu_st64
, arg
, addr
, mem_index
);
1715 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1716 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1718 #endif /* TCG_TARGET_REG_BITS != 32 */
1720 #if TARGET_LONG_BITS == 64
1721 #define TCG_TYPE_TL TCG_TYPE_I64
1722 #define tcg_gen_movi_tl tcg_gen_movi_i64
1723 #define tcg_gen_mov_tl tcg_gen_mov_i64
1724 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1725 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1726 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1727 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1728 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1729 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1730 #define tcg_gen_ld_tl tcg_gen_ld_i64
1731 #define tcg_gen_st8_tl tcg_gen_st8_i64
1732 #define tcg_gen_st16_tl tcg_gen_st16_i64
1733 #define tcg_gen_st32_tl tcg_gen_st32_i64
1734 #define tcg_gen_st_tl tcg_gen_st_i64
1735 #define tcg_gen_add_tl tcg_gen_add_i64
1736 #define tcg_gen_addi_tl tcg_gen_addi_i64
1737 #define tcg_gen_sub_tl tcg_gen_sub_i64
1738 #define tcg_gen_neg_tl tcg_gen_neg_i64
1739 #define tcg_gen_subi_tl tcg_gen_subi_i64
1740 #define tcg_gen_and_tl tcg_gen_and_i64
1741 #define tcg_gen_andi_tl tcg_gen_andi_i64
1742 #define tcg_gen_or_tl tcg_gen_or_i64
1743 #define tcg_gen_ori_tl tcg_gen_ori_i64
1744 #define tcg_gen_xor_tl tcg_gen_xor_i64
1745 #define tcg_gen_xori_tl tcg_gen_xori_i64
1746 #define tcg_gen_not_tl tcg_gen_not_i64
1747 #define tcg_gen_shl_tl tcg_gen_shl_i64
1748 #define tcg_gen_shli_tl tcg_gen_shli_i64
1749 #define tcg_gen_shr_tl tcg_gen_shr_i64
1750 #define tcg_gen_shri_tl tcg_gen_shri_i64
1751 #define tcg_gen_sar_tl tcg_gen_sar_i64
1752 #define tcg_gen_sari_tl tcg_gen_sari_i64
1753 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1754 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1755 #define tcg_gen_mul_tl tcg_gen_mul_i64
1756 #define tcg_gen_muli_tl tcg_gen_muli_i64
1757 #define tcg_gen_discard_tl tcg_gen_discard_i64
1758 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1759 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1760 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1761 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1762 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1763 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1764 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1765 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1766 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1767 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1768 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1769 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1770 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1771 #define tcg_gen_andc_tl tcg_gen_andc_i64
1772 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
1773 #define tcg_gen_nand_tl tcg_gen_nand_i64
1774 #define tcg_gen_nor_tl tcg_gen_nor_i64
1775 #define tcg_gen_orc_tl tcg_gen_orc_i64
1776 #define tcg_const_tl tcg_const_i64
1778 #define TCG_TYPE_TL TCG_TYPE_I32
1779 #define tcg_gen_movi_tl tcg_gen_movi_i32
1780 #define tcg_gen_mov_tl tcg_gen_mov_i32
1781 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1782 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1783 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1784 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1785 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1786 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1787 #define tcg_gen_ld_tl tcg_gen_ld_i32
1788 #define tcg_gen_st8_tl tcg_gen_st8_i32
1789 #define tcg_gen_st16_tl tcg_gen_st16_i32
1790 #define tcg_gen_st32_tl tcg_gen_st_i32
1791 #define tcg_gen_st_tl tcg_gen_st_i32
1792 #define tcg_gen_add_tl tcg_gen_add_i32
1793 #define tcg_gen_addi_tl tcg_gen_addi_i32
1794 #define tcg_gen_sub_tl tcg_gen_sub_i32
1795 #define tcg_gen_neg_tl tcg_gen_neg_i32
1796 #define tcg_gen_subi_tl tcg_gen_subi_i32
1797 #define tcg_gen_and_tl tcg_gen_and_i32
1798 #define tcg_gen_andi_tl tcg_gen_andi_i32
1799 #define tcg_gen_or_tl tcg_gen_or_i32
1800 #define tcg_gen_ori_tl tcg_gen_ori_i32
1801 #define tcg_gen_xor_tl tcg_gen_xor_i32
1802 #define tcg_gen_xori_tl tcg_gen_xori_i32
1803 #define tcg_gen_not_tl tcg_gen_not_i32
1804 #define tcg_gen_shl_tl tcg_gen_shl_i32
1805 #define tcg_gen_shli_tl tcg_gen_shli_i32
1806 #define tcg_gen_shr_tl tcg_gen_shr_i32
1807 #define tcg_gen_shri_tl tcg_gen_shri_i32
1808 #define tcg_gen_sar_tl tcg_gen_sar_i32
1809 #define tcg_gen_sari_tl tcg_gen_sari_i32
1810 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1811 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1812 #define tcg_gen_mul_tl tcg_gen_mul_i32
1813 #define tcg_gen_muli_tl tcg_gen_muli_i32
1814 #define tcg_gen_discard_tl tcg_gen_discard_i32
1815 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1816 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
1817 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1818 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1819 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1820 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1821 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1822 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1823 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1824 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1825 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1826 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1827 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1828 #define tcg_gen_andc_tl tcg_gen_andc_i32
1829 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1830 #define tcg_gen_nand_tl tcg_gen_nand_i32
1831 #define tcg_gen_nor_tl tcg_gen_nor_i32
1832 #define tcg_gen_orc_tl tcg_gen_orc_i32
1833 #define tcg_const_tl tcg_const_i32
1836 #if TCG_TARGET_REG_BITS == 32
1837 #define tcg_gen_add_ptr tcg_gen_add_i32
1838 #define tcg_gen_addi_ptr tcg_gen_addi_i32
1839 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
1840 #else /* TCG_TARGET_REG_BITS == 32 */
1841 #define tcg_gen_add_ptr tcg_gen_add_i64
1842 #define tcg_gen_addi_ptr tcg_gen_addi_i64
1843 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
1844 #endif /* TCG_TARGET_REG_BITS != 32 */