4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
30 #include "qemu-common.h"
31 #include "cache-utils.h"
35 #define DEBUG_LOGFILE "/tmp/qemu.log"
37 static const char *interp_prefix
= CONFIG_QEMU_PREFIX
;
38 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
40 #if defined(__i386__) && !defined(CONFIG_STATIC)
41 /* Force usage of an ELF interpreter even if it is an ELF shared
43 const char interp
[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
46 /* for recent libc, we add these dummy symbols which are not declared
47 when generating a linked object (bug in ld ?) */
48 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
49 asm(".globl __preinit_array_start\n"
50 ".globl __preinit_array_end\n"
51 ".globl __init_array_start\n"
52 ".globl __init_array_end\n"
53 ".globl __fini_array_start\n"
54 ".globl __fini_array_end\n"
55 ".section \".rodata\"\n"
56 "__preinit_array_start:\n"
57 "__preinit_array_end:\n"
58 "__init_array_start:\n"
60 "__fini_array_start:\n"
66 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
67 we allocate a bigger stack. Need a better solution, for example
68 by remapping the process stack directly at the right place */
69 unsigned long x86_stack_size
= 512 * 1024;
71 void gemu_log(const char *fmt
, ...)
76 vfprintf(stderr
, fmt
, ap
);
80 void cpu_outb(CPUState
*env
, int addr
, int val
)
82 fprintf(stderr
, "outb: port=0x%04x, data=%02x\n", addr
, val
);
85 void cpu_outw(CPUState
*env
, int addr
, int val
)
87 fprintf(stderr
, "outw: port=0x%04x, data=%04x\n", addr
, val
);
90 void cpu_outl(CPUState
*env
, int addr
, int val
)
92 fprintf(stderr
, "outl: port=0x%04x, data=%08x\n", addr
, val
);
95 int cpu_inb(CPUState
*env
, int addr
)
97 fprintf(stderr
, "inb: port=0x%04x\n", addr
);
101 int cpu_inw(CPUState
*env
, int addr
)
103 fprintf(stderr
, "inw: port=0x%04x\n", addr
);
107 int cpu_inl(CPUState
*env
, int addr
)
109 fprintf(stderr
, "inl: port=0x%04x\n", addr
);
113 #if defined(TARGET_I386)
114 int cpu_get_pic_interrupt(CPUState
*env
)
120 /* timers for rdtsc */
124 static uint64_t emu_time
;
126 int64_t cpu_get_real_ticks(void)
133 #if defined(USE_NPTL)
134 /***********************************************************/
135 /* Helper routines for implementing atomic operations. */
137 /* To implement exclusive operations we force all cpus to syncronise.
138 We don't require a full sync, only that no cpus are executing guest code.
139 The alternative is to map target atomic ops onto host equivalents,
140 which requires quite a lot of per host/target work. */
141 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
142 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
143 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
144 static int pending_cpus
;
146 /* Make sure everything is in a consistent state for calling fork(). */
147 void fork_start(void)
150 pthread_mutex_lock(&tb_lock
);
151 pthread_mutex_lock(&exclusive_lock
);
154 void fork_end(int child
)
157 /* Child processes created by fork() only have a single thread.
158 Discard information about the parent threads. */
159 first_cpu
= thread_env
;
160 thread_env
->next_cpu
= NULL
;
162 pthread_mutex_init(&exclusive_lock
, NULL
);
163 pthread_cond_init(&exclusive_cond
, NULL
);
164 pthread_cond_init(&exclusive_resume
, NULL
);
165 pthread_mutex_init(&tb_lock
, NULL
);
166 gdbserver_fork(thread_env
);
168 pthread_mutex_unlock(&exclusive_lock
);
169 pthread_mutex_unlock(&tb_lock
);
171 mmap_fork_end(child
);
174 /* Wait for pending exclusive operations to complete. The exclusive lock
176 static inline void exclusive_idle(void)
178 while (pending_cpus
) {
179 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
183 /* Start an exclusive operation.
184 Must only be called from outside cpu_arm_exec. */
185 static inline void start_exclusive(void)
188 pthread_mutex_lock(&exclusive_lock
);
192 /* Make all other cpus stop executing. */
193 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
194 if (other
->running
) {
196 cpu_interrupt(other
, CPU_INTERRUPT_EXIT
);
199 if (pending_cpus
> 1) {
200 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
204 /* Finish an exclusive operation. */
205 static inline void end_exclusive(void)
208 pthread_cond_broadcast(&exclusive_resume
);
209 pthread_mutex_unlock(&exclusive_lock
);
212 /* Wait for exclusive ops to finish, and begin cpu execution. */
213 static inline void cpu_exec_start(CPUState
*env
)
215 pthread_mutex_lock(&exclusive_lock
);
218 pthread_mutex_unlock(&exclusive_lock
);
221 /* Mark cpu as not executing, and release pending exclusive ops. */
222 static inline void cpu_exec_end(CPUState
*env
)
224 pthread_mutex_lock(&exclusive_lock
);
226 if (pending_cpus
> 1) {
228 if (pending_cpus
== 1) {
229 pthread_cond_signal(&exclusive_cond
);
233 pthread_mutex_unlock(&exclusive_lock
);
235 #else /* if !USE_NPTL */
236 /* These are no-ops because we are not threadsafe. */
237 static inline void cpu_exec_start(CPUState
*env
)
241 static inline void cpu_exec_end(CPUState
*env
)
245 static inline void start_exclusive(void)
249 static inline void end_exclusive(void)
253 void fork_start(void)
257 void fork_end(int child
)
260 gdbserver_fork(thread_env
);
267 /***********************************************************/
268 /* CPUX86 core interface */
270 void cpu_smm_update(CPUState
*env
)
274 uint64_t cpu_get_tsc(CPUX86State
*env
)
276 return cpu_get_real_ticks();
279 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
284 e1
= (addr
<< 16) | (limit
& 0xffff);
285 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
292 static uint64_t *idt_table
;
294 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
295 uint64_t addr
, unsigned int sel
)
298 e1
= (addr
& 0xffff) | (sel
<< 16);
299 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
303 p
[2] = tswap32(addr
>> 32);
306 /* only dpl matters as we do only user space emulation */
307 static void set_idt(int n
, unsigned int dpl
)
309 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
312 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
313 uint32_t addr
, unsigned int sel
)
316 e1
= (addr
& 0xffff) | (sel
<< 16);
317 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
323 /* only dpl matters as we do only user space emulation */
324 static void set_idt(int n
, unsigned int dpl
)
326 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
330 void cpu_loop(CPUX86State
*env
)
334 target_siginfo_t info
;
337 trapnr
= cpu_x86_exec(env
);
340 /* linux syscall from int $0x80 */
341 env
->regs
[R_EAX
] = do_syscall(env
,
352 /* linux syscall from syscall intruction */
353 env
->regs
[R_EAX
] = do_syscall(env
,
361 env
->eip
= env
->exception_next_eip
;
366 info
.si_signo
= SIGBUS
;
368 info
.si_code
= TARGET_SI_KERNEL
;
369 info
._sifields
._sigfault
._addr
= 0;
370 queue_signal(env
, info
.si_signo
, &info
);
373 /* XXX: potential problem if ABI32 */
374 #ifndef TARGET_X86_64
375 if (env
->eflags
& VM_MASK
) {
376 handle_vm86_fault(env
);
380 info
.si_signo
= SIGSEGV
;
382 info
.si_code
= TARGET_SI_KERNEL
;
383 info
._sifields
._sigfault
._addr
= 0;
384 queue_signal(env
, info
.si_signo
, &info
);
388 info
.si_signo
= SIGSEGV
;
390 if (!(env
->error_code
& 1))
391 info
.si_code
= TARGET_SEGV_MAPERR
;
393 info
.si_code
= TARGET_SEGV_ACCERR
;
394 info
._sifields
._sigfault
._addr
= env
->cr
[2];
395 queue_signal(env
, info
.si_signo
, &info
);
398 #ifndef TARGET_X86_64
399 if (env
->eflags
& VM_MASK
) {
400 handle_vm86_trap(env
, trapnr
);
404 /* division by zero */
405 info
.si_signo
= SIGFPE
;
407 info
.si_code
= TARGET_FPE_INTDIV
;
408 info
._sifields
._sigfault
._addr
= env
->eip
;
409 queue_signal(env
, info
.si_signo
, &info
);
414 #ifndef TARGET_X86_64
415 if (env
->eflags
& VM_MASK
) {
416 handle_vm86_trap(env
, trapnr
);
420 info
.si_signo
= SIGTRAP
;
422 if (trapnr
== EXCP01_DB
) {
423 info
.si_code
= TARGET_TRAP_BRKPT
;
424 info
._sifields
._sigfault
._addr
= env
->eip
;
426 info
.si_code
= TARGET_SI_KERNEL
;
427 info
._sifields
._sigfault
._addr
= 0;
429 queue_signal(env
, info
.si_signo
, &info
);
434 #ifndef TARGET_X86_64
435 if (env
->eflags
& VM_MASK
) {
436 handle_vm86_trap(env
, trapnr
);
440 info
.si_signo
= SIGSEGV
;
442 info
.si_code
= TARGET_SI_KERNEL
;
443 info
._sifields
._sigfault
._addr
= 0;
444 queue_signal(env
, info
.si_signo
, &info
);
448 info
.si_signo
= SIGILL
;
450 info
.si_code
= TARGET_ILL_ILLOPN
;
451 info
._sifields
._sigfault
._addr
= env
->eip
;
452 queue_signal(env
, info
.si_signo
, &info
);
455 /* just indicate that signals should be handled asap */
461 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
466 info
.si_code
= TARGET_TRAP_BRKPT
;
467 queue_signal(env
, info
.si_signo
, &info
);
472 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
473 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
477 process_pending_signals(env
);
484 static void arm_cache_flush(abi_ulong start
, abi_ulong last
)
486 abi_ulong addr
, last1
;
492 last1
= ((addr
+ TARGET_PAGE_SIZE
) & TARGET_PAGE_MASK
) - 1;
495 tb_invalidate_page_range(addr
, last1
+ 1);
502 /* Handle a jump to the kernel code page. */
504 do_kernel_trap(CPUARMState
*env
)
510 switch (env
->regs
[15]) {
511 case 0xffff0fa0: /* __kernel_memory_barrier */
512 /* ??? No-op. Will need to do better for SMP. */
514 case 0xffff0fc0: /* __kernel_cmpxchg */
515 /* XXX: This only works between threads, not between processes.
516 It's probably possible to implement this with native host
517 operations. However things like ldrex/strex are much harder so
518 there's not much point trying. */
520 cpsr
= cpsr_read(env
);
522 /* FIXME: This should SEGV if the access fails. */
523 if (get_user_u32(val
, addr
))
525 if (val
== env
->regs
[0]) {
527 /* FIXME: Check for segfaults. */
528 put_user_u32(val
, addr
);
535 cpsr_write(env
, cpsr
, CPSR_C
);
538 case 0xffff0fe0: /* __kernel_get_tls */
539 env
->regs
[0] = env
->cp15
.c13_tls2
;
544 /* Jump back to the caller. */
545 addr
= env
->regs
[14];
550 env
->regs
[15] = addr
;
555 void cpu_loop(CPUARMState
*env
)
558 unsigned int n
, insn
;
559 target_siginfo_t info
;
564 trapnr
= cpu_arm_exec(env
);
569 TaskState
*ts
= env
->opaque
;
573 /* we handle the FPU emulation here, as Linux */
574 /* we get the opcode */
575 /* FIXME - what to do if get_user() fails? */
576 get_user_u32(opcode
, env
->regs
[15]);
578 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
579 if (rc
== 0) { /* illegal instruction */
580 info
.si_signo
= SIGILL
;
582 info
.si_code
= TARGET_ILL_ILLOPN
;
583 info
._sifields
._sigfault
._addr
= env
->regs
[15];
584 queue_signal(env
, info
.si_signo
, &info
);
585 } else if (rc
< 0) { /* FP exception */
588 /* translate softfloat flags to FPSR flags */
589 if (-rc
& float_flag_invalid
)
591 if (-rc
& float_flag_divbyzero
)
593 if (-rc
& float_flag_overflow
)
595 if (-rc
& float_flag_underflow
)
597 if (-rc
& float_flag_inexact
)
600 FPSR fpsr
= ts
->fpa
.fpsr
;
601 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
603 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
604 info
.si_signo
= SIGFPE
;
607 /* ordered by priority, least first */
608 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
609 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
610 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
611 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
612 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
614 info
._sifields
._sigfault
._addr
= env
->regs
[15];
615 queue_signal(env
, info
.si_signo
, &info
);
620 /* accumulate unenabled exceptions */
621 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
623 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
625 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
627 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
629 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
632 } else { /* everything OK */
643 if (trapnr
== EXCP_BKPT
) {
645 /* FIXME - what to do if get_user() fails? */
646 get_user_u16(insn
, env
->regs
[15]);
650 /* FIXME - what to do if get_user() fails? */
651 get_user_u32(insn
, env
->regs
[15]);
652 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
657 /* FIXME - what to do if get_user() fails? */
658 get_user_u16(insn
, env
->regs
[15] - 2);
661 /* FIXME - what to do if get_user() fails? */
662 get_user_u32(insn
, env
->regs
[15] - 4);
667 if (n
== ARM_NR_cacheflush
) {
668 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
669 } else if (n
== ARM_NR_semihosting
670 || n
== ARM_NR_thumb_semihosting
) {
671 env
->regs
[0] = do_arm_semihosting (env
);
672 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
673 || (env
->thumb
&& n
== ARM_THUMB_SYSCALL
)) {
675 if (env
->thumb
|| n
== 0) {
678 n
-= ARM_SYSCALL_BASE
;
681 if ( n
> ARM_NR_BASE
) {
683 case ARM_NR_cacheflush
:
684 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
687 cpu_set_tls(env
, env
->regs
[0]);
691 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
693 env
->regs
[0] = -TARGET_ENOSYS
;
697 env
->regs
[0] = do_syscall(env
,
712 /* just indicate that signals should be handled asap */
714 case EXCP_PREFETCH_ABORT
:
715 addr
= env
->cp15
.c6_insn
;
717 case EXCP_DATA_ABORT
:
718 addr
= env
->cp15
.c6_data
;
722 info
.si_signo
= SIGSEGV
;
724 /* XXX: check env->error_code */
725 info
.si_code
= TARGET_SEGV_MAPERR
;
726 info
._sifields
._sigfault
._addr
= addr
;
727 queue_signal(env
, info
.si_signo
, &info
);
734 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
739 info
.si_code
= TARGET_TRAP_BRKPT
;
740 queue_signal(env
, info
.si_signo
, &info
);
744 case EXCP_KERNEL_TRAP
:
745 if (do_kernel_trap(env
))
750 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
752 cpu_dump_state(env
, stderr
, fprintf
, 0);
755 process_pending_signals(env
);
762 #define SPARC64_STACK_BIAS 2047
766 /* WARNING: dealing with register windows _is_ complicated. More info
767 can be found at http://www.sics.se/~psm/sparcstack.html */
768 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
770 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
771 /* wrap handling : if cwp is on the last window, then we use the
772 registers 'after' the end */
773 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
774 index
+= 16 * env
->nwindows
;
778 /* save the register window 'cwp1' */
779 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
784 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
785 #ifdef TARGET_SPARC64
787 sp_ptr
+= SPARC64_STACK_BIAS
;
789 #if defined(DEBUG_WIN)
790 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
793 for(i
= 0; i
< 16; i
++) {
794 /* FIXME - what to do if put_user() fails? */
795 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
796 sp_ptr
+= sizeof(abi_ulong
);
800 static void save_window(CPUSPARCState
*env
)
802 #ifndef TARGET_SPARC64
803 unsigned int new_wim
;
804 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
805 ((1LL << env
->nwindows
) - 1);
806 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
809 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
815 static void restore_window(CPUSPARCState
*env
)
817 #ifndef TARGET_SPARC64
818 unsigned int new_wim
;
820 unsigned int i
, cwp1
;
823 #ifndef TARGET_SPARC64
824 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
825 ((1LL << env
->nwindows
) - 1);
828 /* restore the invalid window */
829 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
830 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
831 #ifdef TARGET_SPARC64
833 sp_ptr
+= SPARC64_STACK_BIAS
;
835 #if defined(DEBUG_WIN)
836 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
839 for(i
= 0; i
< 16; i
++) {
840 /* FIXME - what to do if get_user() fails? */
841 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
842 sp_ptr
+= sizeof(abi_ulong
);
844 #ifdef TARGET_SPARC64
846 if (env
->cleanwin
< env
->nwindows
- 1)
854 static void flush_windows(CPUSPARCState
*env
)
860 /* if restore would invoke restore_window(), then we can stop */
861 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
862 #ifndef TARGET_SPARC64
863 if (env
->wim
& (1 << cwp1
))
866 if (env
->canrestore
== 0)
871 save_window_offset(env
, cwp1
);
874 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
875 #ifndef TARGET_SPARC64
876 /* set wim so that restore will reload the registers */
877 env
->wim
= 1 << cwp1
;
879 #if defined(DEBUG_WIN)
880 printf("flush_windows: nb=%d\n", offset
- 1);
884 void cpu_loop (CPUSPARCState
*env
)
887 target_siginfo_t info
;
890 trapnr
= cpu_sparc_exec (env
);
893 #ifndef TARGET_SPARC64
900 ret
= do_syscall (env
, env
->gregs
[1],
901 env
->regwptr
[0], env
->regwptr
[1],
902 env
->regwptr
[2], env
->regwptr
[3],
903 env
->regwptr
[4], env
->regwptr
[5]);
904 if ((unsigned int)ret
>= (unsigned int)(-515)) {
905 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
906 env
->xcc
|= PSR_CARRY
;
908 env
->psr
|= PSR_CARRY
;
912 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
913 env
->xcc
&= ~PSR_CARRY
;
915 env
->psr
&= ~PSR_CARRY
;
918 env
->regwptr
[0] = ret
;
919 /* next instruction */
921 env
->npc
= env
->npc
+ 4;
923 case 0x83: /* flush windows */
928 /* next instruction */
930 env
->npc
= env
->npc
+ 4;
932 #ifndef TARGET_SPARC64
933 case TT_WIN_OVF
: /* window overflow */
936 case TT_WIN_UNF
: /* window underflow */
942 info
.si_signo
= SIGSEGV
;
944 /* XXX: check env->error_code */
945 info
.si_code
= TARGET_SEGV_MAPERR
;
946 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
947 queue_signal(env
, info
.si_signo
, &info
);
951 case TT_SPILL
: /* window overflow */
954 case TT_FILL
: /* window underflow */
960 info
.si_signo
= SIGSEGV
;
962 /* XXX: check env->error_code */
963 info
.si_code
= TARGET_SEGV_MAPERR
;
964 if (trapnr
== TT_DFAULT
)
965 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
967 info
._sifields
._sigfault
._addr
= env
->tsptr
->tpc
;
968 queue_signal(env
, info
.si_signo
, &info
);
974 sparc64_get_context(env
);
978 sparc64_set_context(env
);
983 /* just indicate that signals should be handled asap */
989 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
994 info
.si_code
= TARGET_TRAP_BRKPT
;
995 queue_signal(env
, info
.si_signo
, &info
);
1000 printf ("Unhandled trap: 0x%x\n", trapnr
);
1001 cpu_dump_state(env
, stderr
, fprintf
, 0);
1004 process_pending_signals (env
);
1011 static inline uint64_t cpu_ppc_get_tb (CPUState
*env
)
1017 uint32_t cpu_ppc_load_tbl (CPUState
*env
)
1019 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1022 uint32_t cpu_ppc_load_tbu (CPUState
*env
)
1024 return cpu_ppc_get_tb(env
) >> 32;
1027 uint32_t cpu_ppc_load_atbl (CPUState
*env
)
1029 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1032 uint32_t cpu_ppc_load_atbu (CPUState
*env
)
1034 return cpu_ppc_get_tb(env
) >> 32;
1037 uint32_t cpu_ppc601_load_rtcu (CPUState
*env
)
1038 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1040 uint32_t cpu_ppc601_load_rtcl (CPUState
*env
)
1042 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1045 /* XXX: to be fixed */
1046 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong
*valp
)
1051 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong val
)
1056 #define EXCP_DUMP(env, fmt, args...) \
1058 fprintf(stderr, fmt , ##args); \
1059 cpu_dump_state(env, stderr, fprintf, 0); \
1060 if (loglevel != 0) { \
1061 fprintf(logfile, fmt , ##args); \
1062 cpu_dump_state(env, logfile, fprintf, 0); \
1066 void cpu_loop(CPUPPCState
*env
)
1068 target_siginfo_t info
;
1073 trapnr
= cpu_ppc_exec(env
);
1075 case POWERPC_EXCP_NONE
:
1078 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1079 cpu_abort(env
, "Critical interrupt while in user mode. "
1082 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1083 cpu_abort(env
, "Machine check exception while in user mode. "
1086 case POWERPC_EXCP_DSI
: /* Data storage exception */
1087 EXCP_DUMP(env
, "Invalid data memory access: 0x" ADDRX
"\n",
1089 /* XXX: check this. Seems bugged */
1090 switch (env
->error_code
& 0xFF000000) {
1092 info
.si_signo
= TARGET_SIGSEGV
;
1094 info
.si_code
= TARGET_SEGV_MAPERR
;
1097 info
.si_signo
= TARGET_SIGILL
;
1099 info
.si_code
= TARGET_ILL_ILLADR
;
1102 info
.si_signo
= TARGET_SIGSEGV
;
1104 info
.si_code
= TARGET_SEGV_ACCERR
;
1107 /* Let's send a regular segfault... */
1108 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1110 info
.si_signo
= TARGET_SIGSEGV
;
1112 info
.si_code
= TARGET_SEGV_MAPERR
;
1115 info
._sifields
._sigfault
._addr
= env
->nip
;
1116 queue_signal(env
, info
.si_signo
, &info
);
1118 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1119 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" ADDRX
"\n",
1120 env
->spr
[SPR_SRR0
]);
1121 /* XXX: check this */
1122 switch (env
->error_code
& 0xFF000000) {
1124 info
.si_signo
= TARGET_SIGSEGV
;
1126 info
.si_code
= TARGET_SEGV_MAPERR
;
1130 info
.si_signo
= TARGET_SIGSEGV
;
1132 info
.si_code
= TARGET_SEGV_ACCERR
;
1135 /* Let's send a regular segfault... */
1136 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1138 info
.si_signo
= TARGET_SIGSEGV
;
1140 info
.si_code
= TARGET_SEGV_MAPERR
;
1143 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1144 queue_signal(env
, info
.si_signo
, &info
);
1146 case POWERPC_EXCP_EXTERNAL
: /* External input */
1147 cpu_abort(env
, "External interrupt while in user mode. "
1150 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1151 EXCP_DUMP(env
, "Unaligned memory access\n");
1152 /* XXX: check this */
1153 info
.si_signo
= TARGET_SIGBUS
;
1155 info
.si_code
= TARGET_BUS_ADRALN
;
1156 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1157 queue_signal(env
, info
.si_signo
, &info
);
1159 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1160 /* XXX: check this */
1161 switch (env
->error_code
& ~0xF) {
1162 case POWERPC_EXCP_FP
:
1163 EXCP_DUMP(env
, "Floating point program exception\n");
1164 info
.si_signo
= TARGET_SIGFPE
;
1166 switch (env
->error_code
& 0xF) {
1167 case POWERPC_EXCP_FP_OX
:
1168 info
.si_code
= TARGET_FPE_FLTOVF
;
1170 case POWERPC_EXCP_FP_UX
:
1171 info
.si_code
= TARGET_FPE_FLTUND
;
1173 case POWERPC_EXCP_FP_ZX
:
1174 case POWERPC_EXCP_FP_VXZDZ
:
1175 info
.si_code
= TARGET_FPE_FLTDIV
;
1177 case POWERPC_EXCP_FP_XX
:
1178 info
.si_code
= TARGET_FPE_FLTRES
;
1180 case POWERPC_EXCP_FP_VXSOFT
:
1181 info
.si_code
= TARGET_FPE_FLTINV
;
1183 case POWERPC_EXCP_FP_VXSNAN
:
1184 case POWERPC_EXCP_FP_VXISI
:
1185 case POWERPC_EXCP_FP_VXIDI
:
1186 case POWERPC_EXCP_FP_VXIMZ
:
1187 case POWERPC_EXCP_FP_VXVC
:
1188 case POWERPC_EXCP_FP_VXSQRT
:
1189 case POWERPC_EXCP_FP_VXCVI
:
1190 info
.si_code
= TARGET_FPE_FLTSUB
;
1193 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1198 case POWERPC_EXCP_INVAL
:
1199 EXCP_DUMP(env
, "Invalid instruction\n");
1200 info
.si_signo
= TARGET_SIGILL
;
1202 switch (env
->error_code
& 0xF) {
1203 case POWERPC_EXCP_INVAL_INVAL
:
1204 info
.si_code
= TARGET_ILL_ILLOPC
;
1206 case POWERPC_EXCP_INVAL_LSWX
:
1207 info
.si_code
= TARGET_ILL_ILLOPN
;
1209 case POWERPC_EXCP_INVAL_SPR
:
1210 info
.si_code
= TARGET_ILL_PRVREG
;
1212 case POWERPC_EXCP_INVAL_FP
:
1213 info
.si_code
= TARGET_ILL_COPROC
;
1216 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1217 env
->error_code
& 0xF);
1218 info
.si_code
= TARGET_ILL_ILLADR
;
1222 case POWERPC_EXCP_PRIV
:
1223 EXCP_DUMP(env
, "Privilege violation\n");
1224 info
.si_signo
= TARGET_SIGILL
;
1226 switch (env
->error_code
& 0xF) {
1227 case POWERPC_EXCP_PRIV_OPC
:
1228 info
.si_code
= TARGET_ILL_PRVOPC
;
1230 case POWERPC_EXCP_PRIV_REG
:
1231 info
.si_code
= TARGET_ILL_PRVREG
;
1234 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1235 env
->error_code
& 0xF);
1236 info
.si_code
= TARGET_ILL_PRVOPC
;
1240 case POWERPC_EXCP_TRAP
:
1241 cpu_abort(env
, "Tried to call a TRAP\n");
1244 /* Should not happen ! */
1245 cpu_abort(env
, "Unknown program exception (%02x)\n",
1249 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1250 queue_signal(env
, info
.si_signo
, &info
);
1252 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1253 EXCP_DUMP(env
, "No floating point allowed\n");
1254 info
.si_signo
= TARGET_SIGILL
;
1256 info
.si_code
= TARGET_ILL_COPROC
;
1257 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1258 queue_signal(env
, info
.si_signo
, &info
);
1260 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1261 cpu_abort(env
, "Syscall exception while in user mode. "
1264 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1265 EXCP_DUMP(env
, "No APU instruction allowed\n");
1266 info
.si_signo
= TARGET_SIGILL
;
1268 info
.si_code
= TARGET_ILL_COPROC
;
1269 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1270 queue_signal(env
, info
.si_signo
, &info
);
1272 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1273 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1276 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1277 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1280 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1281 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1284 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1285 cpu_abort(env
, "Data TLB exception while in user mode. "
1288 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1289 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1292 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1293 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1294 info
.si_signo
= TARGET_SIGILL
;
1296 info
.si_code
= TARGET_ILL_COPROC
;
1297 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1298 queue_signal(env
, info
.si_signo
, &info
);
1300 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1301 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1303 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1304 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1306 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1307 cpu_abort(env
, "Performance monitor exception not handled\n");
1309 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1310 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1313 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1314 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1317 case POWERPC_EXCP_RESET
: /* System reset exception */
1318 cpu_abort(env
, "Reset interrupt while in user mode. "
1321 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1322 cpu_abort(env
, "Data segment exception while in user mode. "
1325 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1326 cpu_abort(env
, "Instruction segment exception "
1327 "while in user mode. Aborting\n");
1329 /* PowerPC 64 with hypervisor mode support */
1330 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1331 cpu_abort(env
, "Hypervisor decrementer interrupt "
1332 "while in user mode. Aborting\n");
1334 case POWERPC_EXCP_TRACE
: /* Trace exception */
1336 * we use this exception to emulate step-by-step execution mode.
1339 /* PowerPC 64 with hypervisor mode support */
1340 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1341 cpu_abort(env
, "Hypervisor data storage exception "
1342 "while in user mode. Aborting\n");
1344 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1345 cpu_abort(env
, "Hypervisor instruction storage exception "
1346 "while in user mode. Aborting\n");
1348 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1349 cpu_abort(env
, "Hypervisor data segment exception "
1350 "while in user mode. Aborting\n");
1352 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1353 cpu_abort(env
, "Hypervisor instruction segment exception "
1354 "while in user mode. Aborting\n");
1356 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1357 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1358 info
.si_signo
= TARGET_SIGILL
;
1360 info
.si_code
= TARGET_ILL_COPROC
;
1361 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1362 queue_signal(env
, info
.si_signo
, &info
);
1364 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1365 cpu_abort(env
, "Programable interval timer interrupt "
1366 "while in user mode. Aborting\n");
1368 case POWERPC_EXCP_IO
: /* IO error exception */
1369 cpu_abort(env
, "IO error exception while in user mode. "
1372 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1373 cpu_abort(env
, "Run mode exception while in user mode. "
1376 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1377 cpu_abort(env
, "Emulation trap exception not handled\n");
1379 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1380 cpu_abort(env
, "Instruction fetch TLB exception "
1381 "while in user-mode. Aborting");
1383 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1384 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1387 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1388 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1391 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1392 cpu_abort(env
, "Floating-point assist exception not handled\n");
1394 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1395 cpu_abort(env
, "Instruction address breakpoint exception "
1398 case POWERPC_EXCP_SMI
: /* System management interrupt */
1399 cpu_abort(env
, "System management interrupt while in user mode. "
1402 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1403 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1406 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1407 cpu_abort(env
, "Performance monitor exception not handled\n");
1409 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1410 cpu_abort(env
, "Vector assist exception not handled\n");
1412 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1413 cpu_abort(env
, "Soft patch exception not handled\n");
1415 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1416 cpu_abort(env
, "Maintenance exception while in user mode. "
1419 case POWERPC_EXCP_STOP
: /* stop translation */
1420 /* We did invalidate the instruction cache. Go on */
1422 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1423 /* We just stopped because of a branch. Go on */
1425 case POWERPC_EXCP_SYSCALL_USER
:
1426 /* system call in user-mode emulation */
1428 * PPC ABI uses overflow flag in cr0 to signal an error
1432 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env
->gpr
[0],
1433 env
->gpr
[3], env
->gpr
[4], env
->gpr
[5], env
->gpr
[6]);
1435 env
->crf
[0] &= ~0x1;
1436 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1437 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1439 if (ret
> (uint32_t)(-515)) {
1445 printf("syscall returned 0x%08x (%d)\n", ret
, ret
);
1452 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1454 info
.si_signo
= sig
;
1456 info
.si_code
= TARGET_TRAP_BRKPT
;
1457 queue_signal(env
, info
.si_signo
, &info
);
1461 case EXCP_INTERRUPT
:
1462 /* just indicate that signals should be handled asap */
1465 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1468 process_pending_signals(env
);
1475 #define MIPS_SYS(name, args) args,
1477 static const uint8_t mips_syscall_args
[] = {
1478 MIPS_SYS(sys_syscall
, 0) /* 4000 */
1479 MIPS_SYS(sys_exit
, 1)
1480 MIPS_SYS(sys_fork
, 0)
1481 MIPS_SYS(sys_read
, 3)
1482 MIPS_SYS(sys_write
, 3)
1483 MIPS_SYS(sys_open
, 3) /* 4005 */
1484 MIPS_SYS(sys_close
, 1)
1485 MIPS_SYS(sys_waitpid
, 3)
1486 MIPS_SYS(sys_creat
, 2)
1487 MIPS_SYS(sys_link
, 2)
1488 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1489 MIPS_SYS(sys_execve
, 0)
1490 MIPS_SYS(sys_chdir
, 1)
1491 MIPS_SYS(sys_time
, 1)
1492 MIPS_SYS(sys_mknod
, 3)
1493 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1494 MIPS_SYS(sys_lchown
, 3)
1495 MIPS_SYS(sys_ni_syscall
, 0)
1496 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1497 MIPS_SYS(sys_lseek
, 3)
1498 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1499 MIPS_SYS(sys_mount
, 5)
1500 MIPS_SYS(sys_oldumount
, 1)
1501 MIPS_SYS(sys_setuid
, 1)
1502 MIPS_SYS(sys_getuid
, 0)
1503 MIPS_SYS(sys_stime
, 1) /* 4025 */
1504 MIPS_SYS(sys_ptrace
, 4)
1505 MIPS_SYS(sys_alarm
, 1)
1506 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1507 MIPS_SYS(sys_pause
, 0)
1508 MIPS_SYS(sys_utime
, 2) /* 4030 */
1509 MIPS_SYS(sys_ni_syscall
, 0)
1510 MIPS_SYS(sys_ni_syscall
, 0)
1511 MIPS_SYS(sys_access
, 2)
1512 MIPS_SYS(sys_nice
, 1)
1513 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1514 MIPS_SYS(sys_sync
, 0)
1515 MIPS_SYS(sys_kill
, 2)
1516 MIPS_SYS(sys_rename
, 2)
1517 MIPS_SYS(sys_mkdir
, 2)
1518 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1519 MIPS_SYS(sys_dup
, 1)
1520 MIPS_SYS(sys_pipe
, 0)
1521 MIPS_SYS(sys_times
, 1)
1522 MIPS_SYS(sys_ni_syscall
, 0)
1523 MIPS_SYS(sys_brk
, 1) /* 4045 */
1524 MIPS_SYS(sys_setgid
, 1)
1525 MIPS_SYS(sys_getgid
, 0)
1526 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1527 MIPS_SYS(sys_geteuid
, 0)
1528 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1529 MIPS_SYS(sys_acct
, 0)
1530 MIPS_SYS(sys_umount
, 2)
1531 MIPS_SYS(sys_ni_syscall
, 0)
1532 MIPS_SYS(sys_ioctl
, 3)
1533 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1534 MIPS_SYS(sys_ni_syscall
, 2)
1535 MIPS_SYS(sys_setpgid
, 2)
1536 MIPS_SYS(sys_ni_syscall
, 0)
1537 MIPS_SYS(sys_olduname
, 1)
1538 MIPS_SYS(sys_umask
, 1) /* 4060 */
1539 MIPS_SYS(sys_chroot
, 1)
1540 MIPS_SYS(sys_ustat
, 2)
1541 MIPS_SYS(sys_dup2
, 2)
1542 MIPS_SYS(sys_getppid
, 0)
1543 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1544 MIPS_SYS(sys_setsid
, 0)
1545 MIPS_SYS(sys_sigaction
, 3)
1546 MIPS_SYS(sys_sgetmask
, 0)
1547 MIPS_SYS(sys_ssetmask
, 1)
1548 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1549 MIPS_SYS(sys_setregid
, 2)
1550 MIPS_SYS(sys_sigsuspend
, 0)
1551 MIPS_SYS(sys_sigpending
, 1)
1552 MIPS_SYS(sys_sethostname
, 2)
1553 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1554 MIPS_SYS(sys_getrlimit
, 2)
1555 MIPS_SYS(sys_getrusage
, 2)
1556 MIPS_SYS(sys_gettimeofday
, 2)
1557 MIPS_SYS(sys_settimeofday
, 2)
1558 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1559 MIPS_SYS(sys_setgroups
, 2)
1560 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1561 MIPS_SYS(sys_symlink
, 2)
1562 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1563 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1564 MIPS_SYS(sys_uselib
, 1)
1565 MIPS_SYS(sys_swapon
, 2)
1566 MIPS_SYS(sys_reboot
, 3)
1567 MIPS_SYS(old_readdir
, 3)
1568 MIPS_SYS(old_mmap
, 6) /* 4090 */
1569 MIPS_SYS(sys_munmap
, 2)
1570 MIPS_SYS(sys_truncate
, 2)
1571 MIPS_SYS(sys_ftruncate
, 2)
1572 MIPS_SYS(sys_fchmod
, 2)
1573 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1574 MIPS_SYS(sys_getpriority
, 2)
1575 MIPS_SYS(sys_setpriority
, 3)
1576 MIPS_SYS(sys_ni_syscall
, 0)
1577 MIPS_SYS(sys_statfs
, 2)
1578 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1579 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1580 MIPS_SYS(sys_socketcall
, 2)
1581 MIPS_SYS(sys_syslog
, 3)
1582 MIPS_SYS(sys_setitimer
, 3)
1583 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1584 MIPS_SYS(sys_newstat
, 2)
1585 MIPS_SYS(sys_newlstat
, 2)
1586 MIPS_SYS(sys_newfstat
, 2)
1587 MIPS_SYS(sys_uname
, 1)
1588 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1589 MIPS_SYS(sys_vhangup
, 0)
1590 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1591 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1592 MIPS_SYS(sys_wait4
, 4)
1593 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1594 MIPS_SYS(sys_sysinfo
, 1)
1595 MIPS_SYS(sys_ipc
, 6)
1596 MIPS_SYS(sys_fsync
, 1)
1597 MIPS_SYS(sys_sigreturn
, 0)
1598 MIPS_SYS(sys_clone
, 0) /* 4120 */
1599 MIPS_SYS(sys_setdomainname
, 2)
1600 MIPS_SYS(sys_newuname
, 1)
1601 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1602 MIPS_SYS(sys_adjtimex
, 1)
1603 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1604 MIPS_SYS(sys_sigprocmask
, 3)
1605 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1606 MIPS_SYS(sys_init_module
, 5)
1607 MIPS_SYS(sys_delete_module
, 1)
1608 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1609 MIPS_SYS(sys_quotactl
, 0)
1610 MIPS_SYS(sys_getpgid
, 1)
1611 MIPS_SYS(sys_fchdir
, 1)
1612 MIPS_SYS(sys_bdflush
, 2)
1613 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1614 MIPS_SYS(sys_personality
, 1)
1615 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1616 MIPS_SYS(sys_setfsuid
, 1)
1617 MIPS_SYS(sys_setfsgid
, 1)
1618 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1619 MIPS_SYS(sys_getdents
, 3)
1620 MIPS_SYS(sys_select
, 5)
1621 MIPS_SYS(sys_flock
, 2)
1622 MIPS_SYS(sys_msync
, 3)
1623 MIPS_SYS(sys_readv
, 3) /* 4145 */
1624 MIPS_SYS(sys_writev
, 3)
1625 MIPS_SYS(sys_cacheflush
, 3)
1626 MIPS_SYS(sys_cachectl
, 3)
1627 MIPS_SYS(sys_sysmips
, 4)
1628 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1629 MIPS_SYS(sys_getsid
, 1)
1630 MIPS_SYS(sys_fdatasync
, 0)
1631 MIPS_SYS(sys_sysctl
, 1)
1632 MIPS_SYS(sys_mlock
, 2)
1633 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1634 MIPS_SYS(sys_mlockall
, 1)
1635 MIPS_SYS(sys_munlockall
, 0)
1636 MIPS_SYS(sys_sched_setparam
, 2)
1637 MIPS_SYS(sys_sched_getparam
, 2)
1638 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1639 MIPS_SYS(sys_sched_getscheduler
, 1)
1640 MIPS_SYS(sys_sched_yield
, 0)
1641 MIPS_SYS(sys_sched_get_priority_max
, 1)
1642 MIPS_SYS(sys_sched_get_priority_min
, 1)
1643 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1644 MIPS_SYS(sys_nanosleep
, 2)
1645 MIPS_SYS(sys_mremap
, 4)
1646 MIPS_SYS(sys_accept
, 3)
1647 MIPS_SYS(sys_bind
, 3)
1648 MIPS_SYS(sys_connect
, 3) /* 4170 */
1649 MIPS_SYS(sys_getpeername
, 3)
1650 MIPS_SYS(sys_getsockname
, 3)
1651 MIPS_SYS(sys_getsockopt
, 5)
1652 MIPS_SYS(sys_listen
, 2)
1653 MIPS_SYS(sys_recv
, 4) /* 4175 */
1654 MIPS_SYS(sys_recvfrom
, 6)
1655 MIPS_SYS(sys_recvmsg
, 3)
1656 MIPS_SYS(sys_send
, 4)
1657 MIPS_SYS(sys_sendmsg
, 3)
1658 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1659 MIPS_SYS(sys_setsockopt
, 5)
1660 MIPS_SYS(sys_shutdown
, 2)
1661 MIPS_SYS(sys_socket
, 3)
1662 MIPS_SYS(sys_socketpair
, 4)
1663 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1664 MIPS_SYS(sys_getresuid
, 3)
1665 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1666 MIPS_SYS(sys_poll
, 3)
1667 MIPS_SYS(sys_nfsservctl
, 3)
1668 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1669 MIPS_SYS(sys_getresgid
, 3)
1670 MIPS_SYS(sys_prctl
, 5)
1671 MIPS_SYS(sys_rt_sigreturn
, 0)
1672 MIPS_SYS(sys_rt_sigaction
, 4)
1673 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1674 MIPS_SYS(sys_rt_sigpending
, 2)
1675 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1676 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1677 MIPS_SYS(sys_rt_sigsuspend
, 0)
1678 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1679 MIPS_SYS(sys_pwrite64
, 6)
1680 MIPS_SYS(sys_chown
, 3)
1681 MIPS_SYS(sys_getcwd
, 2)
1682 MIPS_SYS(sys_capget
, 2)
1683 MIPS_SYS(sys_capset
, 2) /* 4205 */
1684 MIPS_SYS(sys_sigaltstack
, 0)
1685 MIPS_SYS(sys_sendfile
, 4)
1686 MIPS_SYS(sys_ni_syscall
, 0)
1687 MIPS_SYS(sys_ni_syscall
, 0)
1688 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1689 MIPS_SYS(sys_truncate64
, 4)
1690 MIPS_SYS(sys_ftruncate64
, 4)
1691 MIPS_SYS(sys_stat64
, 2)
1692 MIPS_SYS(sys_lstat64
, 2)
1693 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1694 MIPS_SYS(sys_pivot_root
, 2)
1695 MIPS_SYS(sys_mincore
, 3)
1696 MIPS_SYS(sys_madvise
, 3)
1697 MIPS_SYS(sys_getdents64
, 3)
1698 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1699 MIPS_SYS(sys_ni_syscall
, 0)
1700 MIPS_SYS(sys_gettid
, 0)
1701 MIPS_SYS(sys_readahead
, 5)
1702 MIPS_SYS(sys_setxattr
, 5)
1703 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1704 MIPS_SYS(sys_fsetxattr
, 5)
1705 MIPS_SYS(sys_getxattr
, 4)
1706 MIPS_SYS(sys_lgetxattr
, 4)
1707 MIPS_SYS(sys_fgetxattr
, 4)
1708 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1709 MIPS_SYS(sys_llistxattr
, 3)
1710 MIPS_SYS(sys_flistxattr
, 3)
1711 MIPS_SYS(sys_removexattr
, 2)
1712 MIPS_SYS(sys_lremovexattr
, 2)
1713 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1714 MIPS_SYS(sys_tkill
, 2)
1715 MIPS_SYS(sys_sendfile64
, 5)
1716 MIPS_SYS(sys_futex
, 2)
1717 MIPS_SYS(sys_sched_setaffinity
, 3)
1718 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1719 MIPS_SYS(sys_io_setup
, 2)
1720 MIPS_SYS(sys_io_destroy
, 1)
1721 MIPS_SYS(sys_io_getevents
, 5)
1722 MIPS_SYS(sys_io_submit
, 3)
1723 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
1724 MIPS_SYS(sys_exit_group
, 1)
1725 MIPS_SYS(sys_lookup_dcookie
, 3)
1726 MIPS_SYS(sys_epoll_create
, 1)
1727 MIPS_SYS(sys_epoll_ctl
, 4)
1728 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
1729 MIPS_SYS(sys_remap_file_pages
, 5)
1730 MIPS_SYS(sys_set_tid_address
, 1)
1731 MIPS_SYS(sys_restart_syscall
, 0)
1732 MIPS_SYS(sys_fadvise64_64
, 7)
1733 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
1734 MIPS_SYS(sys_fstatfs64
, 2)
1735 MIPS_SYS(sys_timer_create
, 3)
1736 MIPS_SYS(sys_timer_settime
, 4)
1737 MIPS_SYS(sys_timer_gettime
, 2)
1738 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
1739 MIPS_SYS(sys_timer_delete
, 1)
1740 MIPS_SYS(sys_clock_settime
, 2)
1741 MIPS_SYS(sys_clock_gettime
, 2)
1742 MIPS_SYS(sys_clock_getres
, 2)
1743 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
1744 MIPS_SYS(sys_tgkill
, 3)
1745 MIPS_SYS(sys_utimes
, 2)
1746 MIPS_SYS(sys_mbind
, 4)
1747 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
1748 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
1749 MIPS_SYS(sys_mq_open
, 4)
1750 MIPS_SYS(sys_mq_unlink
, 1)
1751 MIPS_SYS(sys_mq_timedsend
, 5)
1752 MIPS_SYS(sys_mq_timedreceive
, 5)
1753 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
1754 MIPS_SYS(sys_mq_getsetattr
, 3)
1755 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
1756 MIPS_SYS(sys_waitid
, 4)
1757 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
1758 MIPS_SYS(sys_add_key
, 5)
1759 MIPS_SYS(sys_request_key
, 4)
1760 MIPS_SYS(sys_keyctl
, 5)
1761 MIPS_SYS(sys_set_thread_area
, 1)
1762 MIPS_SYS(sys_inotify_init
, 0)
1763 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
1764 MIPS_SYS(sys_inotify_rm_watch
, 2)
1765 MIPS_SYS(sys_migrate_pages
, 4)
1766 MIPS_SYS(sys_openat
, 4)
1767 MIPS_SYS(sys_mkdirat
, 3)
1768 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
1769 MIPS_SYS(sys_fchownat
, 5)
1770 MIPS_SYS(sys_futimesat
, 3)
1771 MIPS_SYS(sys_fstatat64
, 4)
1772 MIPS_SYS(sys_unlinkat
, 3)
1773 MIPS_SYS(sys_renameat
, 4) /* 4295 */
1774 MIPS_SYS(sys_linkat
, 5)
1775 MIPS_SYS(sys_symlinkat
, 3)
1776 MIPS_SYS(sys_readlinkat
, 4)
1777 MIPS_SYS(sys_fchmodat
, 3)
1778 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
1779 MIPS_SYS(sys_pselect6
, 6)
1780 MIPS_SYS(sys_ppoll
, 5)
1781 MIPS_SYS(sys_unshare
, 1)
1782 MIPS_SYS(sys_splice
, 4)
1783 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
1784 MIPS_SYS(sys_tee
, 4)
1785 MIPS_SYS(sys_vmsplice
, 4)
1786 MIPS_SYS(sys_move_pages
, 6)
1787 MIPS_SYS(sys_set_robust_list
, 2)
1788 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
1789 MIPS_SYS(sys_kexec_load
, 4)
1790 MIPS_SYS(sys_getcpu
, 3)
1791 MIPS_SYS(sys_epoll_pwait
, 6)
1792 MIPS_SYS(sys_ioprio_set
, 3)
1793 MIPS_SYS(sys_ioprio_get
, 2)
1798 void cpu_loop(CPUMIPSState
*env
)
1800 target_siginfo_t info
;
1802 unsigned int syscall_num
;
1805 trapnr
= cpu_mips_exec(env
);
1808 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
1809 env
->active_tc
.PC
+= 4;
1810 if (syscall_num
>= sizeof(mips_syscall_args
)) {
1815 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
1817 nb_args
= mips_syscall_args
[syscall_num
];
1818 sp_reg
= env
->active_tc
.gpr
[29];
1820 /* these arguments are taken from the stack */
1821 /* FIXME - what to do if get_user() fails? */
1822 case 8: get_user_ual(arg8
, sp_reg
+ 28);
1823 case 7: get_user_ual(arg7
, sp_reg
+ 24);
1824 case 6: get_user_ual(arg6
, sp_reg
+ 20);
1825 case 5: get_user_ual(arg5
, sp_reg
+ 16);
1829 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
1830 env
->active_tc
.gpr
[4],
1831 env
->active_tc
.gpr
[5],
1832 env
->active_tc
.gpr
[6],
1833 env
->active_tc
.gpr
[7],
1834 arg5
, arg6
/*, arg7, arg8*/);
1836 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
1837 env
->active_tc
.gpr
[7] = 1; /* error flag */
1840 env
->active_tc
.gpr
[7] = 0; /* error flag */
1842 env
->active_tc
.gpr
[2] = ret
;
1848 info
.si_signo
= TARGET_SIGILL
;
1851 queue_signal(env
, info
.si_signo
, &info
);
1853 case EXCP_INTERRUPT
:
1854 /* just indicate that signals should be handled asap */
1860 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1863 info
.si_signo
= sig
;
1865 info
.si_code
= TARGET_TRAP_BRKPT
;
1866 queue_signal(env
, info
.si_signo
, &info
);
1872 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
1874 cpu_dump_state(env
, stderr
, fprintf
, 0);
1877 process_pending_signals(env
);
1883 void cpu_loop (CPUState
*env
)
1886 target_siginfo_t info
;
1889 trapnr
= cpu_sh4_exec (env
);
1894 ret
= do_syscall(env
,
1902 env
->gregs
[0] = ret
;
1904 case EXCP_INTERRUPT
:
1905 /* just indicate that signals should be handled asap */
1911 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1914 info
.si_signo
= sig
;
1916 info
.si_code
= TARGET_TRAP_BRKPT
;
1917 queue_signal(env
, info
.si_signo
, &info
);
1923 info
.si_signo
= SIGSEGV
;
1925 info
.si_code
= TARGET_SEGV_MAPERR
;
1926 info
._sifields
._sigfault
._addr
= env
->tea
;
1927 queue_signal(env
, info
.si_signo
, &info
);
1931 printf ("Unhandled trap: 0x%x\n", trapnr
);
1932 cpu_dump_state(env
, stderr
, fprintf
, 0);
1935 process_pending_signals (env
);
1941 void cpu_loop (CPUState
*env
)
1944 target_siginfo_t info
;
1947 trapnr
= cpu_cris_exec (env
);
1951 info
.si_signo
= SIGSEGV
;
1953 /* XXX: check env->error_code */
1954 info
.si_code
= TARGET_SEGV_MAPERR
;
1955 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
1956 queue_signal(env
, info
.si_signo
, &info
);
1959 case EXCP_INTERRUPT
:
1960 /* just indicate that signals should be handled asap */
1963 ret
= do_syscall(env
,
1971 env
->regs
[10] = ret
;
1977 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1980 info
.si_signo
= sig
;
1982 info
.si_code
= TARGET_TRAP_BRKPT
;
1983 queue_signal(env
, info
.si_signo
, &info
);
1988 printf ("Unhandled trap: 0x%x\n", trapnr
);
1989 cpu_dump_state(env
, stderr
, fprintf
, 0);
1992 process_pending_signals (env
);
1999 void cpu_loop(CPUM68KState
*env
)
2003 target_siginfo_t info
;
2004 TaskState
*ts
= env
->opaque
;
2007 trapnr
= cpu_m68k_exec(env
);
2011 if (ts
->sim_syscalls
) {
2013 nr
= lduw(env
->pc
+ 2);
2015 do_m68k_simcall(env
, nr
);
2021 case EXCP_HALT_INSN
:
2022 /* Semihosing syscall. */
2024 do_m68k_semihosting(env
, env
->dregs
[0]);
2028 case EXCP_UNSUPPORTED
:
2030 info
.si_signo
= SIGILL
;
2032 info
.si_code
= TARGET_ILL_ILLOPN
;
2033 info
._sifields
._sigfault
._addr
= env
->pc
;
2034 queue_signal(env
, info
.si_signo
, &info
);
2038 ts
->sim_syscalls
= 0;
2041 env
->dregs
[0] = do_syscall(env
,
2051 case EXCP_INTERRUPT
:
2052 /* just indicate that signals should be handled asap */
2056 info
.si_signo
= SIGSEGV
;
2058 /* XXX: check env->error_code */
2059 info
.si_code
= TARGET_SEGV_MAPERR
;
2060 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2061 queue_signal(env
, info
.si_signo
, &info
);
2068 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2071 info
.si_signo
= sig
;
2073 info
.si_code
= TARGET_TRAP_BRKPT
;
2074 queue_signal(env
, info
.si_signo
, &info
);
2079 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2081 cpu_dump_state(env
, stderr
, fprintf
, 0);
2084 process_pending_signals(env
);
2087 #endif /* TARGET_M68K */
2090 void cpu_loop (CPUState
*env
)
2093 target_siginfo_t info
;
2096 trapnr
= cpu_alpha_exec (env
);
2100 fprintf(stderr
, "Reset requested. Exit\n");
2104 fprintf(stderr
, "Machine check exception. Exit\n");
2108 fprintf(stderr
, "Arithmetic trap.\n");
2111 case EXCP_HW_INTERRUPT
:
2112 fprintf(stderr
, "External interrupt. Exit\n");
2116 fprintf(stderr
, "MMU data fault\n");
2119 case EXCP_DTB_MISS_PAL
:
2120 fprintf(stderr
, "MMU data TLB miss in PALcode\n");
2124 fprintf(stderr
, "MMU instruction TLB miss\n");
2128 fprintf(stderr
, "MMU instruction access violation\n");
2131 case EXCP_DTB_MISS_NATIVE
:
2132 fprintf(stderr
, "MMU data TLB miss\n");
2136 fprintf(stderr
, "Unaligned access\n");
2140 fprintf(stderr
, "Invalid instruction\n");
2144 fprintf(stderr
, "Floating-point not allowed\n");
2147 case EXCP_CALL_PAL
... (EXCP_CALL_PALP
- 1):
2148 call_pal(env
, (trapnr
>> 6) | 0x80);
2150 case EXCP_CALL_PALP
... (EXCP_CALL_PALE
- 1):
2151 fprintf(stderr
, "Privileged call to PALcode\n");
2158 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2161 info
.si_signo
= sig
;
2163 info
.si_code
= TARGET_TRAP_BRKPT
;
2164 queue_signal(env
, info
.si_signo
, &info
);
2169 printf ("Unhandled trap: 0x%x\n", trapnr
);
2170 cpu_dump_state(env
, stderr
, fprintf
, 0);
2173 process_pending_signals (env
);
2176 #endif /* TARGET_ALPHA */
2178 static void usage(void)
2180 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION
", Copyright (c) 2003-2008 Fabrice Bellard\n"
2181 "usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
2182 "Linux CPU emulator (compiled for %s emulation)\n"
2184 "Standard options:\n"
2185 "-h print this help\n"
2186 "-g port wait gdb connection to port\n"
2187 "-L path set the elf interpreter prefix (default=%s)\n"
2188 "-s size set the stack size in bytes (default=%ld)\n"
2189 "-cpu model select CPU (-cpu ? for list)\n"
2190 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2193 "-d options activate log (logfile=%s)\n"
2194 "-p pagesize set the host page size to 'pagesize'\n"
2195 "-strace log system calls\n"
2197 "Environment variables:\n"
2198 "QEMU_STRACE Print system calls and arguments similar to the\n"
2199 " 'strace' program. Enable by setting to any value.\n"
2208 THREAD CPUState
*thread_env
;
2210 /* Assumes contents are already zeroed. */
2211 void init_task_state(TaskState
*ts
)
2216 ts
->first_free
= ts
->sigqueue_table
;
2217 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
2218 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
2220 ts
->sigqueue_table
[i
].next
= NULL
;
2223 int main(int argc
, char **argv
, char **envp
)
2225 const char *filename
;
2226 const char *cpu_model
;
2227 struct target_pt_regs regs1
, *regs
= ®s1
;
2228 struct image_info info1
, *info
= &info1
;
2229 TaskState ts1
, *ts
= &ts1
;
2233 int gdbstub_port
= 0;
2234 int drop_ld_preload
= 0, environ_count
= 0;
2235 char **target_environ
, **wrk
, **dst
;
2240 qemu_cache_utils_init(envp
);
2243 cpu_set_log_filename(DEBUG_LOGFILE
);
2255 if (!strcmp(r
, "-")) {
2257 } else if (!strcmp(r
, "d")) {
2259 const CPULogItem
*item
;
2265 mask
= cpu_str_to_log_mask(r
);
2267 printf("Log items (comma separated):\n");
2268 for(item
= cpu_log_items
; item
->mask
!= 0; item
++) {
2269 printf("%-10s %s\n", item
->name
, item
->help
);
2274 } else if (!strcmp(r
, "s")) {
2276 x86_stack_size
= strtol(r
, (char **)&r
, 0);
2277 if (x86_stack_size
<= 0)
2280 x86_stack_size
*= 1024 * 1024;
2281 else if (*r
== 'k' || *r
== 'K')
2282 x86_stack_size
*= 1024;
2283 } else if (!strcmp(r
, "L")) {
2284 interp_prefix
= argv
[optind
++];
2285 } else if (!strcmp(r
, "p")) {
2286 qemu_host_page_size
= atoi(argv
[optind
++]);
2287 if (qemu_host_page_size
== 0 ||
2288 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
2289 fprintf(stderr
, "page size must be a power of two\n");
2292 } else if (!strcmp(r
, "g")) {
2293 gdbstub_port
= atoi(argv
[optind
++]);
2294 } else if (!strcmp(r
, "r")) {
2295 qemu_uname_release
= argv
[optind
++];
2296 } else if (!strcmp(r
, "cpu")) {
2297 cpu_model
= argv
[optind
++];
2298 if (strcmp(cpu_model
, "?") == 0) {
2299 /* XXX: implement xxx_cpu_list for targets that still miss it */
2300 #if defined(cpu_list)
2301 cpu_list(stdout
, &fprintf
);
2305 } else if (!strcmp(r
, "drop-ld-preload")) {
2306 drop_ld_preload
= 1;
2307 } else if (!strcmp(r
, "strace")) {
2316 filename
= argv
[optind
];
2319 memset(regs
, 0, sizeof(struct target_pt_regs
));
2321 /* Zero out image_info */
2322 memset(info
, 0, sizeof(struct image_info
));
2324 /* Scan interp_prefix dir for replacement files. */
2325 init_paths(interp_prefix
);
2327 if (cpu_model
== NULL
) {
2328 #if defined(TARGET_I386)
2329 #ifdef TARGET_X86_64
2330 cpu_model
= "qemu64";
2332 cpu_model
= "qemu32";
2334 #elif defined(TARGET_ARM)
2335 cpu_model
= "arm926";
2336 #elif defined(TARGET_M68K)
2338 #elif defined(TARGET_SPARC)
2339 #ifdef TARGET_SPARC64
2340 cpu_model
= "TI UltraSparc II";
2342 cpu_model
= "Fujitsu MB86904";
2344 #elif defined(TARGET_MIPS)
2345 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2350 #elif defined(TARGET_PPC)
2360 cpu_exec_init_all(0);
2361 /* NOTE: we need to init the CPU at this stage to get
2362 qemu_host_page_size */
2363 env
= cpu_init(cpu_model
);
2365 fprintf(stderr
, "Unable to find CPU definition\n");
2370 if (getenv("QEMU_STRACE")) {
2378 target_environ
= malloc((environ_count
+ 1) * sizeof(char *));
2379 if (!target_environ
)
2381 for (wrk
= environ
, dst
= target_environ
; *wrk
; wrk
++) {
2382 if (drop_ld_preload
&& !strncmp(*wrk
, "LD_PRELOAD=", 11))
2384 *(dst
++) = strdup(*wrk
);
2386 *dst
= NULL
; /* NULL terminate target_environ */
2388 if (loader_exec(filename
, argv
+optind
, target_environ
, regs
, info
) != 0) {
2389 printf("Error loading %s\n", filename
);
2393 for (wrk
= target_environ
; *wrk
; wrk
++) {
2397 free(target_environ
);
2402 fprintf(logfile
, "start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
2403 fprintf(logfile
, "end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
2404 fprintf(logfile
, "start_code 0x" TARGET_ABI_FMT_lx
"\n",
2406 fprintf(logfile
, "start_data 0x" TARGET_ABI_FMT_lx
"\n",
2408 fprintf(logfile
, "end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
2409 fprintf(logfile
, "start_stack 0x" TARGET_ABI_FMT_lx
"\n",
2411 fprintf(logfile
, "brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
2412 fprintf(logfile
, "entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
2415 target_set_brk(info
->brk
);
2419 /* build Task State */
2420 memset(ts
, 0, sizeof(TaskState
));
2421 init_task_state(ts
);
2424 env
->user_mode_only
= 1;
2426 #if defined(TARGET_I386)
2427 cpu_x86_set_cpl(env
, 3);
2429 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
2430 env
->hflags
|= HF_PE_MASK
;
2431 if (env
->cpuid_features
& CPUID_SSE
) {
2432 env
->cr
[4] |= CR4_OSFXSR_MASK
;
2433 env
->hflags
|= HF_OSFXSR_MASK
;
2435 #ifndef TARGET_ABI32
2436 /* enable 64 bit mode if possible */
2437 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
2438 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
2441 env
->cr
[4] |= CR4_PAE_MASK
;
2442 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
2443 env
->hflags
|= HF_LMA_MASK
;
2446 /* flags setup : we activate the IRQs by default as in user mode */
2447 env
->eflags
|= IF_MASK
;
2449 /* linux register setup */
2450 #ifndef TARGET_ABI32
2451 env
->regs
[R_EAX
] = regs
->rax
;
2452 env
->regs
[R_EBX
] = regs
->rbx
;
2453 env
->regs
[R_ECX
] = regs
->rcx
;
2454 env
->regs
[R_EDX
] = regs
->rdx
;
2455 env
->regs
[R_ESI
] = regs
->rsi
;
2456 env
->regs
[R_EDI
] = regs
->rdi
;
2457 env
->regs
[R_EBP
] = regs
->rbp
;
2458 env
->regs
[R_ESP
] = regs
->rsp
;
2459 env
->eip
= regs
->rip
;
2461 env
->regs
[R_EAX
] = regs
->eax
;
2462 env
->regs
[R_EBX
] = regs
->ebx
;
2463 env
->regs
[R_ECX
] = regs
->ecx
;
2464 env
->regs
[R_EDX
] = regs
->edx
;
2465 env
->regs
[R_ESI
] = regs
->esi
;
2466 env
->regs
[R_EDI
] = regs
->edi
;
2467 env
->regs
[R_EBP
] = regs
->ebp
;
2468 env
->regs
[R_ESP
] = regs
->esp
;
2469 env
->eip
= regs
->eip
;
2472 /* linux interrupt setup */
2473 #ifndef TARGET_ABI32
2474 env
->idt
.limit
= 511;
2476 env
->idt
.limit
= 255;
2478 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
2479 PROT_READ
|PROT_WRITE
,
2480 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2481 idt_table
= g2h(env
->idt
.base
);
2504 /* linux segment setup */
2506 uint64_t *gdt_table
;
2507 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
2508 PROT_READ
|PROT_WRITE
,
2509 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2510 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
2511 gdt_table
= g2h(env
->gdt
.base
);
2513 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2514 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2515 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2517 /* 64 bit code segment */
2518 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2519 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2521 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2523 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
2524 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2525 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
2527 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
2528 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
2530 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
2531 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
2532 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
2533 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
2534 /* This hack makes Wine work... */
2535 env
->segs
[R_FS
].selector
= 0;
2537 cpu_x86_load_seg(env
, R_DS
, 0);
2538 cpu_x86_load_seg(env
, R_ES
, 0);
2539 cpu_x86_load_seg(env
, R_FS
, 0);
2540 cpu_x86_load_seg(env
, R_GS
, 0);
2542 #elif defined(TARGET_ARM)
2545 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
2546 for(i
= 0; i
< 16; i
++) {
2547 env
->regs
[i
] = regs
->uregs
[i
];
2550 #elif defined(TARGET_SPARC)
2554 env
->npc
= regs
->npc
;
2556 for(i
= 0; i
< 8; i
++)
2557 env
->gregs
[i
] = regs
->u_regs
[i
];
2558 for(i
= 0; i
< 8; i
++)
2559 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
2561 #elif defined(TARGET_PPC)
2565 #if defined(TARGET_PPC64)
2566 #if defined(TARGET_ABI32)
2567 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
2569 env
->msr
|= (target_ulong
)1 << MSR_SF
;
2572 env
->nip
= regs
->nip
;
2573 for(i
= 0; i
< 32; i
++) {
2574 env
->gpr
[i
] = regs
->gpr
[i
];
2577 #elif defined(TARGET_M68K)
2580 env
->dregs
[0] = regs
->d0
;
2581 env
->dregs
[1] = regs
->d1
;
2582 env
->dregs
[2] = regs
->d2
;
2583 env
->dregs
[3] = regs
->d3
;
2584 env
->dregs
[4] = regs
->d4
;
2585 env
->dregs
[5] = regs
->d5
;
2586 env
->dregs
[6] = regs
->d6
;
2587 env
->dregs
[7] = regs
->d7
;
2588 env
->aregs
[0] = regs
->a0
;
2589 env
->aregs
[1] = regs
->a1
;
2590 env
->aregs
[2] = regs
->a2
;
2591 env
->aregs
[3] = regs
->a3
;
2592 env
->aregs
[4] = regs
->a4
;
2593 env
->aregs
[5] = regs
->a5
;
2594 env
->aregs
[6] = regs
->a6
;
2595 env
->aregs
[7] = regs
->usp
;
2597 ts
->sim_syscalls
= 1;
2599 #elif defined(TARGET_MIPS)
2603 for(i
= 0; i
< 32; i
++) {
2604 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
2606 env
->active_tc
.PC
= regs
->cp0_epc
;
2608 #elif defined(TARGET_SH4)
2612 for(i
= 0; i
< 16; i
++) {
2613 env
->gregs
[i
] = regs
->regs
[i
];
2617 #elif defined(TARGET_ALPHA)
2621 for(i
= 0; i
< 28; i
++) {
2622 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
2624 env
->ipr
[IPR_USP
] = regs
->usp
;
2625 env
->ir
[30] = regs
->usp
;
2627 env
->unique
= regs
->unique
;
2629 #elif defined(TARGET_CRIS)
2631 env
->regs
[0] = regs
->r0
;
2632 env
->regs
[1] = regs
->r1
;
2633 env
->regs
[2] = regs
->r2
;
2634 env
->regs
[3] = regs
->r3
;
2635 env
->regs
[4] = regs
->r4
;
2636 env
->regs
[5] = regs
->r5
;
2637 env
->regs
[6] = regs
->r6
;
2638 env
->regs
[7] = regs
->r7
;
2639 env
->regs
[8] = regs
->r8
;
2640 env
->regs
[9] = regs
->r9
;
2641 env
->regs
[10] = regs
->r10
;
2642 env
->regs
[11] = regs
->r11
;
2643 env
->regs
[12] = regs
->r12
;
2644 env
->regs
[13] = regs
->r13
;
2645 env
->regs
[14] = info
->start_stack
;
2646 env
->regs
[15] = regs
->acr
;
2647 env
->pc
= regs
->erp
;
2650 #error unsupported target CPU
2653 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2654 ts
->stack_base
= info
->start_stack
;
2655 ts
->heap_base
= info
->brk
;
2656 /* This will be filled in on the first SYS_HEAPINFO call. */
2661 gdbserver_start (gdbstub_port
);
2662 gdb_handlesig(env
, 0);