hw/ppc_oldworld.c

   1 /*
   2  * QEMU OldWorld PowerMac (currently ~G3 B&W) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "nvram.h"
  29 #include "pc.h"
  30 #include "sysemu.h"
  31 #include "net.h"
  32 #include "isa.h"
  33 #include "pci.h"
  34 #include "boards.h"
  35
  36 #define MAX_IDE_BUS 2
  37
  38 /* temporary frame buffer OSI calls for the video.x driver. The right
  39    solution is to modify the driver to use VGA PCI I/Os */
  40 /* XXX: to be removed. This is no way related to emulation */
  41 static int vga_osi_call (CPUState *env)
  42 {
  43     static int vga_vbl_enabled;
  44     int linesize;
  45
  46     //    printf("osi_call R5=" REGX "\n", ppc_dump_gpr(env, 5));
  47
  48     /* same handler as PearPC, coming from the original MOL video
  49        driver. */
  50     switch(env->gpr[5]) {
  51     case 4:
  52         break;
  53     case 28: /* set_vmode */
  54         if (env->gpr[6] != 1 || env->gpr[7] != 0)
  55             env->gpr[3] = 1;
  56         else
  57             env->gpr[3] = 0;
  58         break;
  59     case 29: /* get_vmode_info */
  60         if (env->gpr[6] != 0) {
  61             if (env->gpr[6] != 1 || env->gpr[7] != 0) {
  62                 env->gpr[3] = 1;
  63                 break;
  64             }
  65         }
  66         env->gpr[3] = 0;
  67         env->gpr[4] = (1 << 16) | 1; /* num_vmodes, cur_vmode */
  68         env->gpr[5] = (1 << 16) | 0; /* num_depths, cur_depth_mode */
  69         env->gpr[6] = (graphic_width << 16) | graphic_height; /* w, h */
  70         env->gpr[7] = 85 << 16; /* refresh rate */
  71         env->gpr[8] = (graphic_depth + 7) & ~7; /* depth (round to byte) */
  72         linesize = ((graphic_depth + 7) >> 3) * graphic_width;
  73         linesize = (linesize + 3) & ~3;
  74         env->gpr[9] = (linesize << 16) | 0; /* row_bytes, offset */
  75         break;
  76     case 31: /* set_video power */
  77         env->gpr[3] = 0;
  78         break;
  79     case 39: /* video_ctrl */
  80         if (env->gpr[6] == 0 || env->gpr[6] == 1)
  81             vga_vbl_enabled = env->gpr[6];
  82         env->gpr[3] = 0;
  83         break;
  84     case 47:
  85         break;
  86     case 59: /* set_color */
  87         /* R6 = index, R7 = RGB */
  88         env->gpr[3] = 0;
  89         break;
  90     case 64: /* get color */
  91         /* R6 = index */
  92         env->gpr[3] = 0;
  93         break;
  94     case 116: /* set hwcursor */
  95         /* R6 = x, R7 = y, R8 = visible, R9 = data */
  96         break;
  97     default:
  98         fprintf(stderr, "unsupported OSI call R5=" REGX "\n",
  99                 ppc_dump_gpr(env, 5));
 100         break;
 101     }
 102
 103     return 1; /* osi_call handled */
 104 }
 105
 106 static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
 107                                const char *boot_device, DisplayState *ds,
 108                                const char *kernel_filename,
 109                                const char *kernel_cmdline,
 110                                const char *initrd_filename,
 111                                const char *cpu_model)
 112 {
 113     CPUState *env = NULL, *envs[MAX_CPUS];
 114     char buf[1024];
 115     qemu_irq *pic, **heathrow_irqs;
 116     nvram_t nvram;
 117     m48t59_t *m48t59;
 118     int linux_boot, i;
 119     unsigned long bios_offset, vga_bios_offset;
 120     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
 121     PCIBus *pci_bus;
 122     MacIONVRAMState *nvr;
 123     int vga_bios_size, bios_size;
 124     qemu_irq *dummy_irq;
 125     int pic_mem_index, nvram_mem_index, dbdma_mem_index, cuda_mem_index;
 126     int ide_mem_index[2];
 127     int ppc_boot_device;
 128     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 129     int index;
 130
 131     linux_boot = (kernel_filename != NULL);
 132
 133     /* init CPUs */
 134     if (cpu_model == NULL)
 135         cpu_model = "default";
 136     for (i = 0; i < smp_cpus; i++) {
 137         env = cpu_init(cpu_model);
 138         if (!env) {
 139             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 140             exit(1);
 141         }
 142         /* Set time-base frequency to 100 Mhz */
 143         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 144         env->osi_call = vga_osi_call;
 145         qemu_register_reset(&cpu_ppc_reset, env);
 146         envs[i] = env;
 147     }
 148     if (env->nip < 0xFFF80000) {
 149         /* Special test for PowerPC 601:
 150          * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
 151          * But the NVRAM is located at 0xFFF04000...
 152          */
 153         cpu_abort(env, "G3BW Mac hardware can not handle 1 MB BIOS\n");
 154     }
 155
 156     /* allocate RAM */
 157     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 158
 159     /* allocate and load BIOS */
 160     bios_offset = ram_size + vga_ram_size;
 161     if (bios_name == NULL)
 162         bios_name = BIOS_FILENAME;
 163     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 164     bios_size = load_image(buf, phys_ram_base + bios_offset);
 165     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 166         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 167         exit(1);
 168     }
 169     bios_size = (bios_size + 0xfff) & ~0xfff;
 170     if (bios_size > 0x00080000) {
 171         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 172         cpu_abort(env, "G3BW Mac hardware can not handle 1 MB BIOS\n");
 173     }
 174     cpu_register_physical_memory((uint32_t)(-bios_size),
 175                                  bios_size, bios_offset | IO_MEM_ROM);
 176
 177     /* allocate and load VGA BIOS */
 178     vga_bios_offset = bios_offset + bios_size;
 179     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 180     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 181     if (vga_bios_size < 0) {
 182         /* if no bios is present, we can still work */
 183         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 184         vga_bios_size = 0;
 185     } else {
 186         /* set a specific header (XXX: find real Apple format for NDRV
 187            drivers) */
 188         phys_ram_base[vga_bios_offset] = 'N';
 189         phys_ram_base[vga_bios_offset + 1] = 'D';
 190         phys_ram_base[vga_bios_offset + 2] = 'R';
 191         phys_ram_base[vga_bios_offset + 3] = 'V';
 192         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 193                      vga_bios_size);
 194         vga_bios_size += 8;
 195     }
 196     vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
 197
 198     if (linux_boot) {
 199         kernel_base = KERNEL_LOAD_ADDR;
 200         /* now we can load the kernel */
 201         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 202         if (kernel_size < 0) {
 203             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 204                       kernel_filename);
 205             exit(1);
 206         }
 207         /* load initrd */
 208         if (initrd_filename) {
 209             initrd_base = INITRD_LOAD_ADDR;
 210             initrd_size = load_image(initrd_filename,
 211                                      phys_ram_base + initrd_base);
 212             if (initrd_size < 0) {
 213                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 214                           initrd_filename);
 215                 exit(1);
 216             }
 217         } else {
 218             initrd_base = 0;
 219             initrd_size = 0;
 220         }
 221         ppc_boot_device = 'm';
 222     } else {
 223         kernel_base = 0;
 224         kernel_size = 0;
 225         initrd_base = 0;
 226         initrd_size = 0;
 227         ppc_boot_device = '\0';
 228         for (i = 0; boot_device[i] != '\0'; i++) {
 229             /* TOFIX: for now, the second IDE channel is not properly
 230              *        used by OHW. The Mac floppy disk are not emulated.
 231              *        For now, OHW cannot boot from the network.
 232              */
 233 #if 0
 234             if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 235                 ppc_boot_device = boot_device[i];
 236                 break;
 237             }
 238 #else
 239             if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 240                 ppc_boot_device = boot_device[i];
 241                 break;
 242             }
 243 #endif
 244         }
 245         if (ppc_boot_device == '\0') {
 246             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 247             exit(1);
 248         }
 249     }
 250
 251     isa_mem_base = 0x80000000;
 252
 253     /* Register 2 MB of ISA IO space */
 254     isa_mmio_init(0xfe000000, 0x00200000);
 255
 256     /* XXX: we register only 1 output pin for heathrow PIC */
 257     heathrow_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 258     heathrow_irqs[0] =
 259         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * 1);
 260     /* Connect the heathrow PIC outputs to the 6xx bus */
 261     for (i = 0; i < smp_cpus; i++) {
 262         switch (PPC_INPUT(env)) {
 263         case PPC_FLAGS_INPUT_6xx:
 264             heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
 265             heathrow_irqs[i][0] =
 266                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 267             break;
 268         default:
 269             cpu_abort(env, "Bus model not supported on OldWorld Mac machine\n");
 270             exit(1);
 271         }
 272     }
 273
 274     /* init basic PC hardware */
 275     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 276         cpu_abort(env, "Only 6xx bus is supported on heathrow machine\n");
 277         exit(1);
 278     }
 279     pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
 280     pci_bus = pci_grackle_init(0xfec00000, pic);
 281     pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
 282                  ram_size, vga_ram_size,
 283                  vga_bios_offset, vga_bios_size);
 284
 285     /* XXX: suppress that */
 286     dummy_irq = i8259_init(NULL);
 287
 288     /* XXX: use Mac Serial port */
 289     serial_init(0x3f8, dummy_irq[4], 115200, serial_hds[0]);
 290
 291     for(i = 0; i < nb_nics; i++) {
 292         if (!nd_table[i].model)
 293             nd_table[i].model = "ne2k_pci";
 294         pci_nic_init(pci_bus, &nd_table[i], -1);
 295     }
 296
 297     /* First IDE channel is a CMD646 on the PCI bus */
 298
 299     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 300         fprintf(stderr, "qemu: too many IDE bus\n");
 301         exit(1);
 302     }
 303     index = drive_get_index(IF_IDE, 0, 0);
 304     if (index == -1)
 305         hd[0] = NULL;
 306     else
 307         hd[0] =  drives_table[index].bdrv;
 308     index = drive_get_index(IF_IDE, 0, 1);
 309     if (index == -1)
 310         hd[1] = NULL;
 311     else
 312         hd[1] =  drives_table[index].bdrv;
 313     hd[3] = hd[2] = NULL;
 314     pci_cmd646_ide_init(pci_bus, hd, 0);
 315
 316     /* Second IDE channel is a MAC IDE on the MacIO bus */
 317     index = drive_get_index(IF_IDE, 1, 0);
 318     if (index == -1)
 319         hd[0] = NULL;
 320     else
 321         hd[0] =  drives_table[index].bdrv;
 322     index = drive_get_index(IF_IDE, 1, 1);
 323     if (index == -1)
 324         hd[1] = NULL;
 325     else
 326         hd[1] =  drives_table[index].bdrv;
 327     ide_mem_index[0] = -1;
 328     ide_mem_index[1] = pmac_ide_init(hd, pic[0x0D]);
 329
 330     /* cuda also initialize ADB */
 331     cuda_init(&cuda_mem_index, pic[0x12]);
 332
 333     adb_kbd_init(&adb_bus);
 334     adb_mouse_init(&adb_bus);
 335
 336     nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
 337     pmac_format_nvram_partition(nvr, 0x2000);
 338
 339     dbdma_init(&dbdma_mem_index);
 340
 341     macio_init(pci_bus, 0x0017, 1, pic_mem_index, dbdma_mem_index,
 342                cuda_mem_index, nvr, 2, ide_mem_index);
 343
 344     if (usb_enabled) {
 345         usb_ohci_init_pci(pci_bus, 3, -1);
 346     }
 347
 348     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 349         graphic_depth = 15;
 350
 351     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 352     nvram.opaque = m48t59;
 353     nvram.read_fn = &m48t59_read;
 354     nvram.write_fn = &m48t59_write;
 355     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "HEATHROW", ram_size,
 356                          ppc_boot_device, kernel_base, kernel_size,
 357                          kernel_cmdline,
 358                          initrd_base, initrd_size,
 359                          /* XXX: need an option to load a NVRAM image */
 360                          0,
 361                          graphic_width, graphic_height, graphic_depth);
 362     /* No PCI init: the BIOS will do it */
 363
 364     /* Special port to get debug messages from Open-Firmware */
 365     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 366 }
 367
 368 QEMUMachine heathrow_machine = {
 369     .name = "g3bw",
 370     .desc = "Heathrow based PowerMAC",
 371     .init = ppc_heathrow_init,
 372     .ram_require = BIOS_SIZE + VGA_RAM_SIZE,
 373     .max_cpus = MAX_CPUS,
 374 };