hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "console.h"
  35
  36 /* output Bochs bios info messages */
  37 //#define DEBUG_BIOS
  38
  39 #define BIOS_FILENAME "bios.bin"
  40 #define VGABIOS_FILENAME "vgabios.bin"
  41 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  42
  43 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  44
  45 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  46 #define ACPI_DATA_SIZE       0x10000
  47
  48 #define MAX_IDE_BUS 2
  49
  50 static fdctrl_t *floppy_controller;
  51 static RTCState *rtc_state;
  52 static PITState *pit;
  53 static IOAPICState *ioapic;
  54 static PCIDevice *i440fx_state;
  55
  56 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  57 {
  58 }
  59
  60 /* MSDOS compatibility mode FPU exception support */
  61 static qemu_irq ferr_irq;
  62 /* XXX: add IGNNE support */
  63 void cpu_set_ferr(CPUX86State *s)
  64 {
  65     qemu_irq_raise(ferr_irq);
  66 }
  67
  68 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  69 {
  70     qemu_irq_lower(ferr_irq);
  71 }
  72
  73 /* TSC handling */
  74 uint64_t cpu_get_tsc(CPUX86State *env)
  75 {
  76     /* Note: when using kqemu, it is more logical to return the host TSC
  77        because kqemu does not trap the RDTSC instruction for
  78        performance reasons */
  79 #ifdef USE_KQEMU
  80     if (env->kqemu_enabled) {
  81         return cpu_get_real_ticks();
  82     } else
  83 #endif
  84     {
  85         return cpu_get_ticks();
  86     }
  87 }
  88
  89 /* SMM support */
  90 void cpu_smm_update(CPUState *env)
  91 {
  92     if (i440fx_state && env == first_cpu)
  93         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
  94 }
  95
  96
  97 /* IRQ handling */
  98 int cpu_get_pic_interrupt(CPUState *env)
  99 {
 100     int intno;
 101
 102     intno = apic_get_interrupt(env);
 103     if (intno >= 0) {
 104         /* set irq request if a PIC irq is still pending */
 105         /* XXX: improve that */
 106         pic_update_irq(isa_pic);
 107         return intno;
 108     }
 109     /* read the irq from the PIC */
 110     if (!apic_accept_pic_intr(env))
 111         return -1;
 112
 113     intno = pic_read_irq(isa_pic);
 114     return intno;
 115 }
 116
 117 static void pic_irq_request(void *opaque, int irq, int level)
 118 {
 119     CPUState *env = first_cpu;
 120
 121     if (env->apic_state) {
 122         while (env) {
 123             if (apic_accept_pic_intr(env))
 124                 apic_deliver_pic_intr(env, level);
 125             env = env->next_cpu;
 126         }
 127     } else {
 128         if (level)
 129             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 130         else
 131             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 132     }
 133 }
 134
 135 /* PC cmos mappings */
 136
 137 #define REG_EQUIPMENT_BYTE          0x14
 138
 139 static int cmos_get_fd_drive_type(int fd0)
 140 {
 141     int val;
 142
 143     switch (fd0) {
 144     case 0:
 145         /* 1.44 Mb 3"5 drive */
 146         val = 4;
 147         break;
 148     case 1:
 149         /* 2.88 Mb 3"5 drive */
 150         val = 5;
 151         break;
 152     case 2:
 153         /* 1.2 Mb 5"5 drive */
 154         val = 2;
 155         break;
 156     default:
 157         val = 0;
 158         break;
 159     }
 160     return val;
 161 }
 162
 163 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 164 {
 165     RTCState *s = rtc_state;
 166     int cylinders, heads, sectors;
 167     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 168     rtc_set_memory(s, type_ofs, 47);
 169     rtc_set_memory(s, info_ofs, cylinders);
 170     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 171     rtc_set_memory(s, info_ofs + 2, heads);
 172     rtc_set_memory(s, info_ofs + 3, 0xff);
 173     rtc_set_memory(s, info_ofs + 4, 0xff);
 174     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 175     rtc_set_memory(s, info_ofs + 6, cylinders);
 176     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 177     rtc_set_memory(s, info_ofs + 8, sectors);
 178 }
 179
 180 /* convert boot_device letter to something recognizable by the bios */
 181 static int boot_device2nibble(char boot_device)
 182 {
 183     switch(boot_device) {
 184     case 'a':
 185     case 'b':
 186         return 0x01; /* floppy boot */
 187     case 'c':
 188         return 0x02; /* hard drive boot */
 189     case 'd':
 190         return 0x03; /* CD-ROM boot */
 191     case 'n':
 192         return 0x04; /* Network boot */
 193     }
 194     return 0;
 195 }
 196
 197 /* copy/pasted from cmos_init, should be made a general function
 198  and used there as well */
 199 static int pc_boot_set(void *opaque, const char *boot_device)
 200 {
 201 #define PC_MAX_BOOT_DEVICES 3
 202     RTCState *s = (RTCState *)opaque;
 203     int nbds, bds[3] = { 0, };
 204     int i;
 205
 206     nbds = strlen(boot_device);
 207     if (nbds > PC_MAX_BOOT_DEVICES) {
 208         term_printf("Too many boot devices for PC\n");
 209         return(1);
 210     }
 211     for (i = 0; i < nbds; i++) {
 212         bds[i] = boot_device2nibble(boot_device[i]);
 213         if (bds[i] == 0) {
 214             term_printf("Invalid boot device for PC: '%c'\n",
 215                     boot_device[i]);
 216             return(1);
 217         }
 218     }
 219     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 220     rtc_set_memory(s, 0x38, (bds[2] << 4));
 221     return(0);
 222 }
 223
 224 /* hd_table must contain 4 block drivers */
 225 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 226                       const char *boot_device, BlockDriverState **hd_table)
 227 {
 228     RTCState *s = rtc_state;
 229     int nbds, bds[3] = { 0, };
 230     int val;
 231     int fd0, fd1, nb;
 232     int i;
 233
 234     /* various important CMOS locations needed by PC/Bochs bios */
 235
 236     /* memory size */
 237     val = 640; /* base memory in K */
 238     rtc_set_memory(s, 0x15, val);
 239     rtc_set_memory(s, 0x16, val >> 8);
 240
 241     val = (ram_size / 1024) - 1024;
 242     if (val > 65535)
 243         val = 65535;
 244     rtc_set_memory(s, 0x17, val);
 245     rtc_set_memory(s, 0x18, val >> 8);
 246     rtc_set_memory(s, 0x30, val);
 247     rtc_set_memory(s, 0x31, val >> 8);
 248
 249     if (above_4g_mem_size) {
 250         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 251         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 252         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 253     }
 254
 255     if (ram_size > (16 * 1024 * 1024))
 256         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 257     else
 258         val = 0;
 259     if (val > 65535)
 260         val = 65535;
 261     rtc_set_memory(s, 0x34, val);
 262     rtc_set_memory(s, 0x35, val >> 8);
 263
 264     /* set the number of CPU */
 265     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 266
 267     /* set boot devices, and disable floppy signature check if requested */
 268 #define PC_MAX_BOOT_DEVICES 3
 269     nbds = strlen(boot_device);
 270     if (nbds > PC_MAX_BOOT_DEVICES) {
 271         fprintf(stderr, "Too many boot devices for PC\n");
 272         exit(1);
 273     }
 274     for (i = 0; i < nbds; i++) {
 275         bds[i] = boot_device2nibble(boot_device[i]);
 276         if (bds[i] == 0) {
 277             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 278                     boot_device[i]);
 279             exit(1);
 280         }
 281     }
 282     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 283     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 284
 285     /* floppy type */
 286
 287     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 288     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 289
 290     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 291     rtc_set_memory(s, 0x10, val);
 292
 293     val = 0;
 294     nb = 0;
 295     if (fd0 < 3)
 296         nb++;
 297     if (fd1 < 3)
 298         nb++;
 299     switch (nb) {
 300     case 0:
 301         break;
 302     case 1:
 303         val |= 0x01; /* 1 drive, ready for boot */
 304         break;
 305     case 2:
 306         val |= 0x41; /* 2 drives, ready for boot */
 307         break;
 308     }
 309     val |= 0x02; /* FPU is there */
 310     val |= 0x04; /* PS/2 mouse installed */
 311     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 312
 313     /* hard drives */
 314
 315     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 316     if (hd_table[0])
 317         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 318     if (hd_table[1])
 319         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 320
 321     val = 0;
 322     for (i = 0; i < 4; i++) {
 323         if (hd_table[i]) {
 324             int cylinders, heads, sectors, translation;
 325             /* NOTE: bdrv_get_geometry_hint() returns the physical
 326                 geometry.  It is always such that: 1 <= sects <= 63, 1
 327                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 328                 geometry can be different if a translation is done. */
 329             translation = bdrv_get_translation_hint(hd_table[i]);
 330             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 331                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 332                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 333                     /* No translation. */
 334                     translation = 0;
 335                 } else {
 336                     /* LBA translation. */
 337                     translation = 1;
 338                 }
 339             } else {
 340                 translation--;
 341             }
 342             val |= translation << (i * 2);
 343         }
 344     }
 345     rtc_set_memory(s, 0x39, val);
 346 }
 347
 348 void ioport_set_a20(int enable)
 349 {
 350     /* XXX: send to all CPUs ? */
 351     cpu_x86_set_a20(first_cpu, enable);
 352 }
 353
 354 int ioport_get_a20(void)
 355 {
 356     return ((first_cpu->a20_mask >> 20) & 1);
 357 }
 358
 359 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 360 {
 361     ioport_set_a20((val >> 1) & 1);
 362     /* XXX: bit 0 is fast reset */
 363 }
 364
 365 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 366 {
 367     return ioport_get_a20() << 1;
 368 }
 369
 370 /***********************************************************/
 371 /* Bochs BIOS debug ports */
 372
 373 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 374 {
 375     static const char shutdown_str[8] = "Shutdown";
 376     static int shutdown_index = 0;
 377
 378     switch(addr) {
 379         /* Bochs BIOS messages */
 380     case 0x400:
 381     case 0x401:
 382         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 383         exit(1);
 384     case 0x402:
 385     case 0x403:
 386 #ifdef DEBUG_BIOS
 387         fprintf(stderr, "%c", val);
 388 #endif
 389         break;
 390     case 0x8900:
 391         /* same as Bochs power off */
 392         if (val == shutdown_str[shutdown_index]) {
 393             shutdown_index++;
 394             if (shutdown_index == 8) {
 395                 shutdown_index = 0;
 396                 qemu_system_shutdown_request();
 397             }
 398         } else {
 399             shutdown_index = 0;
 400         }
 401         break;
 402
 403         /* LGPL'ed VGA BIOS messages */
 404     case 0x501:
 405     case 0x502:
 406         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 407         exit(1);
 408     case 0x500:
 409     case 0x503:
 410 #ifdef DEBUG_BIOS
 411         fprintf(stderr, "%c", val);
 412 #endif
 413         break;
 414     }
 415 }
 416
 417 static void bochs_bios_init(void)
 418 {
 419     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 420     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 421     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 422     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 423     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 424
 425     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 426     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 427     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 428     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 429 }
 430
 431 /* Generate an initial boot sector which sets state and jump to
 432    a specified vector */
 433 static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 434 {
 435     uint8_t bootsect[512], *p;
 436     int i;
 437     int hda;
 438
 439     hda = drive_get_index(IF_IDE, 0, 0);
 440     if (hda == -1) {
 441         fprintf(stderr, "A disk image must be given for 'hda' when booting "
 442                 "a Linux kernel\n(if you really don't want it, use /dev/zero)\n");
 443         exit(1);
 444     }
 445
 446     memset(bootsect, 0, sizeof(bootsect));
 447
 448     /* Copy the MSDOS partition table if possible */
 449     bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1);
 450
 451     /* Make sure we have a partition signature */
 452     bootsect[510] = 0x55;
 453     bootsect[511] = 0xaa;
 454
 455     /* Actual code */
 456     p = bootsect;
 457     *p++ = 0xfa;                /* CLI */
 458     *p++ = 0xfc;                /* CLD */
 459
 460     for (i = 0; i < 6; i++) {
 461         if (i == 1)             /* Skip CS */
 462             continue;
 463
 464         *p++ = 0xb8;            /* MOV AX,imm16 */
 465         *p++ = segs[i];
 466         *p++ = segs[i] >> 8;
 467         *p++ = 0x8e;            /* MOV <seg>,AX */
 468         *p++ = 0xc0 + (i << 3);
 469     }
 470
 471     for (i = 0; i < 8; i++) {
 472         *p++ = 0x66;            /* 32-bit operand size */
 473         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 474         *p++ = gpr[i];
 475         *p++ = gpr[i] >> 8;
 476         *p++ = gpr[i] >> 16;
 477         *p++ = gpr[i] >> 24;
 478     }
 479
 480     *p++ = 0xea;                /* JMP FAR */
 481     *p++ = ip;                  /* IP */
 482     *p++ = ip >> 8;
 483     *p++ = segs[1];             /* CS */
 484     *p++ = segs[1] >> 8;
 485
 486     bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
 487 }
 488
 489 static long get_file_size(FILE *f)
 490 {
 491     long where, size;
 492
 493     /* XXX: on Unix systems, using fstat() probably makes more sense */
 494
 495     where = ftell(f);
 496     fseek(f, 0, SEEK_END);
 497     size = ftell(f);
 498     fseek(f, where, SEEK_SET);
 499
 500     return size;
 501 }
 502
 503 static void load_linux(const char *kernel_filename,
 504                        const char *initrd_filename,
 505                        const char *kernel_cmdline)
 506 {
 507     uint16_t protocol;
 508     uint32_t gpr[8];
 509     uint16_t seg[6];
 510     uint16_t real_seg;
 511     int setup_size, kernel_size, initrd_size, cmdline_size;
 512     uint32_t initrd_max;
 513     uint8_t header[1024];
 514     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 515     FILE *f, *fi;
 516
 517     /* Align to 16 bytes as a paranoia measure */
 518     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 519
 520     /* load the kernel header */
 521     f = fopen(kernel_filename, "rb");
 522     if (!f || !(kernel_size = get_file_size(f)) ||
 523         fread(header, 1, 1024, f) != 1024) {
 524         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 525                 kernel_filename);
 526         exit(1);
 527     }
 528
 529     /* kernel protocol version */
 530 #if 0
 531     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 532 #endif
 533     if (ldl_p(header+0x202) == 0x53726448)
 534         protocol = lduw_p(header+0x206);
 535     else
 536         protocol = 0;
 537
 538     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 539         /* Low kernel */
 540         real_addr    = 0x90000;
 541         cmdline_addr = 0x9a000 - cmdline_size;
 542         prot_addr    = 0x10000;
 543     } else if (protocol < 0x202) {
 544         /* High but ancient kernel */
 545         real_addr    = 0x90000;
 546         cmdline_addr = 0x9a000 - cmdline_size;
 547         prot_addr    = 0x100000;
 548     } else {
 549         /* High and recent kernel */
 550         real_addr    = 0x10000;
 551         cmdline_addr = 0x20000;
 552         prot_addr    = 0x100000;
 553     }
 554
 555 #if 0
 556     fprintf(stderr,
 557             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 558             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 559             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 560             real_addr,
 561             cmdline_addr,
 562             prot_addr);
 563 #endif
 564
 565     /* highest address for loading the initrd */
 566     if (protocol >= 0x203)
 567         initrd_max = ldl_p(header+0x22c);
 568     else
 569         initrd_max = 0x37ffffff;
 570
 571     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 572         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 573
 574     /* kernel command line */
 575     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 576
 577     if (protocol >= 0x202) {
 578         stl_p(header+0x228, cmdline_addr);
 579     } else {
 580         stw_p(header+0x20, 0xA33F);
 581         stw_p(header+0x22, cmdline_addr-real_addr);
 582     }
 583
 584     /* loader type */
 585     /* High nybble = B reserved for Qemu; low nybble is revision number.
 586        If this code is substantially changed, you may want to consider
 587        incrementing the revision. */
 588     if (protocol >= 0x200)
 589         header[0x210] = 0xB0;
 590
 591     /* heap */
 592     if (protocol >= 0x201) {
 593         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 594         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 595     }
 596
 597     /* load initrd */
 598     if (initrd_filename) {
 599         if (protocol < 0x200) {
 600             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 601             exit(1);
 602         }
 603
 604         fi = fopen(initrd_filename, "rb");
 605         if (!fi) {
 606             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 607                     initrd_filename);
 608             exit(1);
 609         }
 610
 611         initrd_size = get_file_size(fi);
 612         initrd_addr = (initrd_max-initrd_size) & ~4095;
 613
 614         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 615                 "\n", initrd_size, initrd_addr);
 616
 617         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 618             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 619                     initrd_filename);
 620             exit(1);
 621         }
 622         fclose(fi);
 623
 624         stl_p(header+0x218, initrd_addr);
 625         stl_p(header+0x21c, initrd_size);
 626     }
 627
 628     /* store the finalized header and load the rest of the kernel */
 629     cpu_physical_memory_write(real_addr, header, 1024);
 630
 631     setup_size = header[0x1f1];
 632     if (setup_size == 0)
 633         setup_size = 4;
 634
 635     setup_size = (setup_size+1)*512;
 636     kernel_size -= setup_size;  /* Size of protected-mode code */
 637
 638     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 639         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 640         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 641                 kernel_filename);
 642         exit(1);
 643     }
 644     fclose(f);
 645
 646     /* generate bootsector to set up the initial register state */
 647     real_seg = real_addr >> 4;
 648     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 649     seg[1] = real_seg+0x20;     /* CS */
 650     memset(gpr, 0, sizeof gpr);
 651     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 652
 653     generate_bootsect(gpr, seg, 0);
 654 }
 655
 656 static void main_cpu_reset(void *opaque)
 657 {
 658     CPUState *env = opaque;
 659     cpu_reset(env);
 660 }
 661
 662 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 663 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 664 static const int ide_irq[2] = { 14, 15 };
 665
 666 #define NE2000_NB_MAX 6
 667
 668 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 669 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 670
 671 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 672 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 673
 674 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 675 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 676
 677 #ifdef HAS_AUDIO
 678 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 679 {
 680     struct soundhw *c;
 681     int audio_enabled = 0;
 682
 683     for (c = soundhw; !audio_enabled && c->name; ++c) {
 684         audio_enabled = c->enabled;
 685     }
 686
 687     if (audio_enabled) {
 688         AudioState *s;
 689
 690         s = AUD_init ();
 691         if (s) {
 692             for (c = soundhw; c->name; ++c) {
 693                 if (c->enabled) {
 694                     if (c->isa) {
 695                         c->init.init_isa (s, pic);
 696                     }
 697                     else {
 698                         if (pci_bus) {
 699                             c->init.init_pci (pci_bus, s);
 700                         }
 701                     }
 702                 }
 703             }
 704         }
 705     }
 706 }
 707 #endif
 708
 709 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 710 {
 711     static int nb_ne2k = 0;
 712
 713     if (nb_ne2k == NE2000_NB_MAX)
 714         return;
 715     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 716     nb_ne2k++;
 717 }
 718
 719 /* PC hardware initialisation */
 720 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 721                      const char *boot_device, DisplayState *ds,
 722                      const char *kernel_filename, const char *kernel_cmdline,
 723                      const char *initrd_filename,
 724                      int pci_enabled, const char *cpu_model)
 725 {
 726     char buf[1024];
 727     int ret, linux_boot, i;
 728     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 729     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 730     int bios_size, isa_bios_size, vga_bios_size;
 731     PCIBus *pci_bus;
 732     int piix3_devfn = -1;
 733     CPUState *env;
 734     NICInfo *nd;
 735     qemu_irq *cpu_irq;
 736     qemu_irq *i8259;
 737     int index;
 738     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 739     BlockDriverState *fd[MAX_FD];
 740
 741     if (ram_size >= 0xe0000000 ) {
 742         above_4g_mem_size = ram_size - 0xe0000000;
 743         below_4g_mem_size = 0xe0000000;
 744     } else {
 745         below_4g_mem_size = ram_size;
 746     }
 747
 748     linux_boot = (kernel_filename != NULL);
 749
 750     /* init CPUs */
 751     if (cpu_model == NULL) {
 752 #ifdef TARGET_X86_64
 753         cpu_model = "qemu64";
 754 #else
 755         cpu_model = "qemu32";
 756 #endif
 757     }
 758
 759     for(i = 0; i < smp_cpus; i++) {
 760         env = cpu_init(cpu_model);
 761         if (!env) {
 762             fprintf(stderr, "Unable to find x86 CPU definition\n");
 763             exit(1);
 764         }
 765         if (i != 0)
 766             env->halted = 1;
 767         if (smp_cpus > 1) {
 768             /* XXX: enable it in all cases */
 769             env->cpuid_features |= CPUID_APIC;
 770         }
 771         qemu_register_reset(main_cpu_reset, env);
 772         if (pci_enabled) {
 773             apic_init(env);
 774         }
 775     }
 776
 777     vmport_init();
 778
 779     /* allocate RAM */
 780     ram_addr = qemu_ram_alloc(0xa0000);
 781     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 782
 783     /* Allocate, even though we won't register, so we don't break the
 784      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 785      * and some bios areas, which will be registered later
 786      */
 787     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 788     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 789     cpu_register_physical_memory(0x100000,
 790                  below_4g_mem_size - 0x100000,
 791                  ram_addr);
 792
 793     /* above 4giga memory allocation */
 794     if (above_4g_mem_size > 0) {
 795         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 796         cpu_register_physical_memory(0x100000000ULL,
 797                                      above_4g_mem_size,
 798                                      ram_addr);
 799     }
 800
 801
 802     /* allocate VGA RAM */
 803     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 804
 805     /* BIOS load */
 806     if (bios_name == NULL)
 807         bios_name = BIOS_FILENAME;
 808     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 809     bios_size = get_image_size(buf);
 810     if (bios_size <= 0 ||
 811         (bios_size % 65536) != 0) {
 812         goto bios_error;
 813     }
 814     bios_offset = qemu_ram_alloc(bios_size);
 815     ret = load_image(buf, phys_ram_base + bios_offset);
 816     if (ret != bios_size) {
 817     bios_error:
 818         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 819         exit(1);
 820     }
 821
 822     /* VGA BIOS load */
 823     if (cirrus_vga_enabled) {
 824         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 825     } else {
 826         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 827     }
 828     vga_bios_size = get_image_size(buf);
 829     if (vga_bios_size <= 0 || vga_bios_size > 65536)
 830         goto vga_bios_error;
 831     vga_bios_offset = qemu_ram_alloc(65536);
 832
 833     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 834     if (ret != vga_bios_size) {
 835     vga_bios_error:
 836         fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 837         exit(1);
 838     }
 839
 840     /* setup basic memory access */
 841     cpu_register_physical_memory(0xc0000, 0x10000,
 842                                  vga_bios_offset | IO_MEM_ROM);
 843
 844     /* map the last 128KB of the BIOS in ISA space */
 845     isa_bios_size = bios_size;
 846     if (isa_bios_size > (128 * 1024))
 847         isa_bios_size = 128 * 1024;
 848     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 849                                  IO_MEM_UNASSIGNED);
 850     cpu_register_physical_memory(0x100000 - isa_bios_size,
 851                                  isa_bios_size,
 852                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 853
 854     {
 855         ram_addr_t option_rom_offset;
 856         int size, offset;
 857
 858         offset = 0;
 859         for (i = 0; i < nb_option_roms; i++) {
 860             size = get_image_size(option_rom[i]);
 861             if (size < 0) {
 862                 fprintf(stderr, "Could not load option rom '%s'\n",
 863                         option_rom[i]);
 864                 exit(1);
 865             }
 866             if (size > (0x10000 - offset))
 867                 goto option_rom_error;
 868             option_rom_offset = qemu_ram_alloc(size);
 869             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 870             if (ret != size) {
 871             option_rom_error:
 872                 fprintf(stderr, "Too many option ROMS\n");
 873                 exit(1);
 874             }
 875             size = (size + 4095) & ~4095;
 876             cpu_register_physical_memory(0xd0000 + offset,
 877                                          size, option_rom_offset | IO_MEM_ROM);
 878             offset += size;
 879         }
 880     }
 881
 882     /* map all the bios at the top of memory */
 883     cpu_register_physical_memory((uint32_t)(-bios_size),
 884                                  bios_size, bios_offset | IO_MEM_ROM);
 885
 886     bochs_bios_init();
 887
 888     if (linux_boot)
 889         load_linux(kernel_filename, initrd_filename, kernel_cmdline);
 890
 891     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 892     i8259 = i8259_init(cpu_irq[0]);
 893     ferr_irq = i8259[13];
 894
 895     if (pci_enabled) {
 896         pci_bus = i440fx_init(&i440fx_state, i8259);
 897         piix3_devfn = piix3_init(pci_bus, -1);
 898     } else {
 899         pci_bus = NULL;
 900     }
 901
 902     /* init basic PC hardware */
 903     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 904
 905     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 906
 907     if (cirrus_vga_enabled) {
 908         if (pci_enabled) {
 909             pci_cirrus_vga_init(pci_bus,
 910                                 ds, phys_ram_base + vga_ram_addr,
 911                                 vga_ram_addr, vga_ram_size);
 912         } else {
 913             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 914                                 vga_ram_addr, vga_ram_size);
 915         }
 916     } else if (vmsvga_enabled) {
 917         if (pci_enabled)
 918             pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 919                             vga_ram_addr, vga_ram_size);
 920         else
 921             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 922     } else {
 923         if (pci_enabled) {
 924             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 925                          vga_ram_addr, vga_ram_size, 0, 0);
 926         } else {
 927             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 928                          vga_ram_addr, vga_ram_size);
 929         }
 930     }
 931
 932     rtc_state = rtc_init(0x70, i8259[8]);
 933
 934     qemu_register_boot_set(pc_boot_set, rtc_state);
 935
 936     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 937     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 938
 939     if (pci_enabled) {
 940         ioapic = ioapic_init();
 941     }
 942     pit = pit_init(0x40, i8259[0]);
 943     pcspk_init(pit);
 944     if (pci_enabled) {
 945         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 946     }
 947
 948     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 949         if (serial_hds[i]) {
 950             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 951                         serial_hds[i]);
 952         }
 953     }
 954
 955     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 956         if (parallel_hds[i]) {
 957             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
 958                           parallel_hds[i]);
 959         }
 960     }
 961
 962     for(i = 0; i < nb_nics; i++) {
 963         nd = &nd_table[i];
 964         if (!nd->model) {
 965             if (pci_enabled) {
 966                 nd->model = "ne2k_pci";
 967             } else {
 968                 nd->model = "ne2k_isa";
 969             }
 970         }
 971         if (strcmp(nd->model, "ne2k_isa") == 0) {
 972             pc_init_ne2k_isa(nd, i8259);
 973         } else if (pci_enabled) {
 974             if (strcmp(nd->model, "?") == 0)
 975                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 976             pci_nic_init(pci_bus, nd, -1);
 977         } else if (strcmp(nd->model, "?") == 0) {
 978             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 979             exit(1);
 980         } else {
 981             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 982             exit(1);
 983         }
 984     }
 985
 986     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 987         fprintf(stderr, "qemu: too many IDE bus\n");
 988         exit(1);
 989     }
 990
 991     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 992         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 993         if (index != -1)
 994             hd[i] = drives_table[index].bdrv;
 995         else
 996             hd[i] = NULL;
 997     }
 998
 999     if (pci_enabled) {
1000         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1001     } else {
1002         for(i = 0; i < MAX_IDE_BUS; i++) {
1003             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1004                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1005         }
1006     }
1007
1008     i8042_init(i8259[1], i8259[12], 0x60);
1009     DMA_init(0);
1010 #ifdef HAS_AUDIO
1011     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1012 #endif
1013
1014     for(i = 0; i < MAX_FD; i++) {
1015         index = drive_get_index(IF_FLOPPY, 0, i);
1016         if (index != -1)
1017             fd[i] = drives_table[index].bdrv;
1018         else
1019             fd[i] = NULL;
1020     }
1021     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1022
1023     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1024
1025     if (pci_enabled && usb_enabled) {
1026         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1027     }
1028
1029     if (pci_enabled && acpi_enabled) {
1030         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1031         i2c_bus *smbus;
1032
1033         /* TODO: Populate SPD eeprom data.  */
1034         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1035         for (i = 0; i < 8; i++) {
1036             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1037         }
1038     }
1039
1040     if (i440fx_state) {
1041         i440fx_init_memory_mappings(i440fx_state);
1042     }
1043
1044     if (pci_enabled) {
1045         int max_bus;
1046         int bus, unit;
1047         void *scsi;
1048
1049         max_bus = drive_get_max_bus(IF_SCSI);
1050
1051         for (bus = 0; bus <= max_bus; bus++) {
1052             scsi = lsi_scsi_init(pci_bus, -1);
1053             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1054                 index = drive_get_index(IF_SCSI, bus, unit);
1055                 if (index == -1)
1056                     continue;
1057                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1058             }
1059         }
1060     }
1061 }
1062
1063 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1064                         const char *boot_device, DisplayState *ds,
1065                         const char *kernel_filename,
1066                         const char *kernel_cmdline,
1067                         const char *initrd_filename,
1068                         const char *cpu_model)
1069 {
1070     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1071              kernel_filename, kernel_cmdline,
1072              initrd_filename, 1, cpu_model);
1073 }
1074
1075 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1076                         const char *boot_device, DisplayState *ds,
1077                         const char *kernel_filename,
1078                         const char *kernel_cmdline,
1079                         const char *initrd_filename,
1080                         const char *cpu_model)
1081 {
1082     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1083              kernel_filename, kernel_cmdline,
1084              initrd_filename, 0, cpu_model);
1085 }
1086
1087 QEMUMachine pc_machine = {
1088     .name = "pc",
1089     .desc = "Standard PC",
1090     .init = pc_init_pci,
1091     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1092 };
1093
1094 QEMUMachine isapc_machine = {
1095     .name = "isapc",
1096     .desc = "ISA-only PC",
1097     .init = pc_init_isa,
1098     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1099 };