target-ppc/op_mem.h

   1 /*
   2  *  PowerPC emulation micro-operations for qemu.
   3  *
   4  *  Copyright (c) 2003-2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #include "op_mem_access.h"
  22
  23 /***                    Integer load and store strings                     ***/
  24 void OPPROTO glue(op_lswi, MEMSUFFIX) (void)
  25 {
  26     glue(do_lsw, MEMSUFFIX)(PARAM1);
  27     RETURN();
  28 }
  29
  30 #if defined(TARGET_PPC64)
  31 void OPPROTO glue(op_lswi_64, MEMSUFFIX) (void)
  32 {
  33     glue(do_lsw_64, MEMSUFFIX)(PARAM1);
  34     RETURN();
  35 }
  36 #endif
  37
  38 /* PPC32 specification says we must generate an exception if
  39  * rA is in the range of registers to be loaded.
  40  * In an other hand, IBM says this is valid, but rA won't be loaded.
  41  * For now, I'll follow the spec...
  42  */
  43 void OPPROTO glue(op_lswx, MEMSUFFIX) (void)
  44 {
  45     /* Note: T1 comes from xer_bc then no cast is needed */
  46     if (likely(T1 != 0)) {
  47         if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
  48                      (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
  49             raise_exception_err(env, POWERPC_EXCP_PROGRAM,
  50                                 POWERPC_EXCP_INVAL |
  51                                 POWERPC_EXCP_INVAL_LSWX);
  52         } else {
  53             glue(do_lsw, MEMSUFFIX)(PARAM1);
  54         }
  55     }
  56     RETURN();
  57 }
  58
  59 #if defined(TARGET_PPC64)
  60 void OPPROTO glue(op_lswx_64, MEMSUFFIX) (void)
  61 {
  62     /* Note: T1 comes from xer_bc then no cast is needed */
  63     if (likely(T1 != 0)) {
  64         if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
  65                      (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
  66             raise_exception_err(env, POWERPC_EXCP_PROGRAM,
  67                                 POWERPC_EXCP_INVAL |
  68                                 POWERPC_EXCP_INVAL_LSWX);
  69         } else {
  70             glue(do_lsw_64, MEMSUFFIX)(PARAM1);
  71         }
  72     }
  73     RETURN();
  74 }
  75 #endif
  76
  77 void OPPROTO glue(op_stsw, MEMSUFFIX) (void)
  78 {
  79     glue(do_stsw, MEMSUFFIX)(PARAM1);
  80     RETURN();
  81 }
  82
  83 #if defined(TARGET_PPC64)
  84 void OPPROTO glue(op_stsw_64, MEMSUFFIX) (void)
  85 {
  86     glue(do_stsw_64, MEMSUFFIX)(PARAM1);
  87     RETURN();
  88 }
  89 #endif
  90
  91 /* Load and set reservation */
  92 void OPPROTO glue(op_lwarx, MEMSUFFIX) (void)
  93 {
  94     if (unlikely(T0 & 0x03)) {
  95         raise_exception(env, POWERPC_EXCP_ALIGN);
  96     } else {
  97         T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);
  98         env->reserve = (uint32_t)T0;
  99     }
 100     RETURN();
 101 }
 102
 103 #if defined(TARGET_PPC64)
 104 void OPPROTO glue(op_lwarx_64, MEMSUFFIX) (void)
 105 {
 106     if (unlikely(T0 & 0x03)) {
 107         raise_exception(env, POWERPC_EXCP_ALIGN);
 108     } else {
 109         T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);
 110         env->reserve = (uint64_t)T0;
 111     }
 112     RETURN();
 113 }
 114
 115 void OPPROTO glue(op_ldarx, MEMSUFFIX) (void)
 116 {
 117     if (unlikely(T0 & 0x03)) {
 118         raise_exception(env, POWERPC_EXCP_ALIGN);
 119     } else {
 120         T1 = glue(ldu64, MEMSUFFIX)((uint32_t)T0);
 121         env->reserve = (uint32_t)T0;
 122     }
 123     RETURN();
 124 }
 125
 126 void OPPROTO glue(op_ldarx_64, MEMSUFFIX) (void)
 127 {
 128     if (unlikely(T0 & 0x03)) {
 129         raise_exception(env, POWERPC_EXCP_ALIGN);
 130     } else {
 131         T1 = glue(ldu64, MEMSUFFIX)((uint64_t)T0);
 132         env->reserve = (uint64_t)T0;
 133     }
 134     RETURN();
 135 }
 136 #endif
 137
 138 void OPPROTO glue(op_lwarx_le, MEMSUFFIX) (void)
 139 {
 140     if (unlikely(T0 & 0x03)) {
 141         raise_exception(env, POWERPC_EXCP_ALIGN);
 142     } else {
 143         T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);
 144         env->reserve = (uint32_t)T0;
 145     }
 146     RETURN();
 147 }
 148
 149 #if defined(TARGET_PPC64)
 150 void OPPROTO glue(op_lwarx_le_64, MEMSUFFIX) (void)
 151 {
 152     if (unlikely(T0 & 0x03)) {
 153         raise_exception(env, POWERPC_EXCP_ALIGN);
 154     } else {
 155         T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);
 156         env->reserve = (uint64_t)T0;
 157     }
 158     RETURN();
 159 }
 160
 161 void OPPROTO glue(op_ldarx_le, MEMSUFFIX) (void)
 162 {
 163     if (unlikely(T0 & 0x03)) {
 164         raise_exception(env, POWERPC_EXCP_ALIGN);
 165     } else {
 166         T1 = glue(ldu64r, MEMSUFFIX)((uint32_t)T0);
 167         env->reserve = (uint32_t)T0;
 168     }
 169     RETURN();
 170 }
 171
 172 void OPPROTO glue(op_ldarx_le_64, MEMSUFFIX) (void)
 173 {
 174     if (unlikely(T0 & 0x03)) {
 175         raise_exception(env, POWERPC_EXCP_ALIGN);
 176     } else {
 177         T1 = glue(ldu64r, MEMSUFFIX)((uint64_t)T0);
 178         env->reserve = (uint64_t)T0;
 179     }
 180     RETURN();
 181 }
 182 #endif
 183
 184 /* Store with reservation */
 185 void OPPROTO glue(op_stwcx, MEMSUFFIX) (void)
 186 {
 187     if (unlikely(T0 & 0x03)) {
 188         raise_exception(env, POWERPC_EXCP_ALIGN);
 189     } else {
 190         if (unlikely(env->reserve != (uint32_t)T0)) {
 191             env->crf[0] = xer_so;
 192         } else {
 193             glue(st32, MEMSUFFIX)((uint32_t)T0, T1);
 194             env->crf[0] = xer_so | 0x02;
 195         }
 196     }
 197     env->reserve = (target_ulong)-1ULL;
 198     RETURN();
 199 }
 200
 201 #if defined(TARGET_PPC64)
 202 void OPPROTO glue(op_stwcx_64, MEMSUFFIX) (void)
 203 {
 204     if (unlikely(T0 & 0x03)) {
 205         raise_exception(env, POWERPC_EXCP_ALIGN);
 206     } else {
 207         if (unlikely(env->reserve != (uint64_t)T0)) {
 208             env->crf[0] = xer_so;
 209         } else {
 210             glue(st32, MEMSUFFIX)((uint64_t)T0, T1);
 211             env->crf[0] = xer_so | 0x02;
 212         }
 213     }
 214     env->reserve = (target_ulong)-1ULL;
 215     RETURN();
 216 }
 217
 218 void OPPROTO glue(op_stdcx, MEMSUFFIX) (void)
 219 {
 220     if (unlikely(T0 & 0x03)) {
 221         raise_exception(env, POWERPC_EXCP_ALIGN);
 222     } else {
 223         if (unlikely(env->reserve != (uint32_t)T0)) {
 224             env->crf[0] = xer_so;
 225         } else {
 226             glue(st64, MEMSUFFIX)((uint32_t)T0, T1);
 227             env->crf[0] = xer_so | 0x02;
 228         }
 229     }
 230     env->reserve = (target_ulong)-1ULL;
 231     RETURN();
 232 }
 233
 234 void OPPROTO glue(op_stdcx_64, MEMSUFFIX) (void)
 235 {
 236     if (unlikely(T0 & 0x03)) {
 237         raise_exception(env, POWERPC_EXCP_ALIGN);
 238     } else {
 239         if (unlikely(env->reserve != (uint64_t)T0)) {
 240             env->crf[0] = xer_so;
 241         } else {
 242             glue(st64, MEMSUFFIX)((uint64_t)T0, T1);
 243             env->crf[0] = xer_so | 0x02;
 244         }
 245     }
 246     env->reserve = (target_ulong)-1ULL;
 247     RETURN();
 248 }
 249 #endif
 250
 251 void OPPROTO glue(op_stwcx_le, MEMSUFFIX) (void)
 252 {
 253     if (unlikely(T0 & 0x03)) {
 254         raise_exception(env, POWERPC_EXCP_ALIGN);
 255     } else {
 256         if (unlikely(env->reserve != (uint32_t)T0)) {
 257             env->crf[0] = xer_so;
 258         } else {
 259             glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
 260             env->crf[0] = xer_so | 0x02;
 261         }
 262     }
 263     env->reserve = (target_ulong)-1ULL;
 264     RETURN();
 265 }
 266
 267 #if defined(TARGET_PPC64)
 268 void OPPROTO glue(op_stwcx_le_64, MEMSUFFIX) (void)
 269 {
 270     if (unlikely(T0 & 0x03)) {
 271         raise_exception(env, POWERPC_EXCP_ALIGN);
 272     } else {
 273         if (unlikely(env->reserve != (uint64_t)T0)) {
 274             env->crf[0] = xer_so;
 275         } else {
 276             glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
 277             env->crf[0] = xer_so | 0x02;
 278         }
 279     }
 280     env->reserve = (target_ulong)-1ULL;
 281     RETURN();
 282 }
 283
 284 void OPPROTO glue(op_stdcx_le, MEMSUFFIX) (void)
 285 {
 286     if (unlikely(T0 & 0x03)) {
 287         raise_exception(env, POWERPC_EXCP_ALIGN);
 288     } else {
 289         if (unlikely(env->reserve != (uint32_t)T0)) {
 290             env->crf[0] = xer_so;
 291         } else {
 292             glue(st64r, MEMSUFFIX)((uint32_t)T0, T1);
 293             env->crf[0] = xer_so | 0x02;
 294         }
 295     }
 296     env->reserve = (target_ulong)-1ULL;
 297     RETURN();
 298 }
 299
 300 void OPPROTO glue(op_stdcx_le_64, MEMSUFFIX) (void)
 301 {
 302     if (unlikely(T0 & 0x03)) {
 303         raise_exception(env, POWERPC_EXCP_ALIGN);
 304     } else {
 305         if (unlikely(env->reserve != (uint64_t)T0)) {
 306             env->crf[0] = xer_so;
 307         } else {
 308             glue(st64r, MEMSUFFIX)((uint64_t)T0, T1);
 309             env->crf[0] = xer_so | 0x02;
 310         }
 311     }
 312     env->reserve = (target_ulong)-1ULL;
 313     RETURN();
 314 }
 315 #endif
 316
 317 /* Instruction cache block invalidate */
 318 void OPPROTO glue(op_icbi, MEMSUFFIX) (void)
 319 {
 320     glue(do_icbi, MEMSUFFIX)();
 321     RETURN();
 322 }
 323
 324 #if defined(TARGET_PPC64)
 325 void OPPROTO glue(op_icbi_64, MEMSUFFIX) (void)
 326 {
 327     glue(do_icbi_64, MEMSUFFIX)();
 328     RETURN();
 329 }
 330 #endif
 331
 332 /* External access */
 333 void OPPROTO glue(op_eciwx, MEMSUFFIX) (void)
 334 {
 335     T1 = glue(ldu32, MEMSUFFIX)((uint32_t)T0);
 336     RETURN();
 337 }
 338
 339 #if defined(TARGET_PPC64)
 340 void OPPROTO glue(op_eciwx_64, MEMSUFFIX) (void)
 341 {
 342     T1 = glue(ldu32, MEMSUFFIX)((uint64_t)T0);
 343     RETURN();
 344 }
 345 #endif
 346
 347 void OPPROTO glue(op_ecowx, MEMSUFFIX) (void)
 348 {
 349     glue(st32, MEMSUFFIX)((uint32_t)T0, T1);
 350     RETURN();
 351 }
 352
 353 #if defined(TARGET_PPC64)
 354 void OPPROTO glue(op_ecowx_64, MEMSUFFIX) (void)
 355 {
 356     glue(st32, MEMSUFFIX)((uint64_t)T0, T1);
 357     RETURN();
 358 }
 359 #endif
 360
 361 void OPPROTO glue(op_eciwx_le, MEMSUFFIX) (void)
 362 {
 363     T1 = glue(ldu32r, MEMSUFFIX)((uint32_t)T0);
 364     RETURN();
 365 }
 366
 367 #if defined(TARGET_PPC64)
 368 void OPPROTO glue(op_eciwx_le_64, MEMSUFFIX) (void)
 369 {
 370     T1 = glue(ldu32r, MEMSUFFIX)((uint64_t)T0);
 371     RETURN();
 372 }
 373 #endif
 374
 375 void OPPROTO glue(op_ecowx_le, MEMSUFFIX) (void)
 376 {
 377     glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
 378     RETURN();
 379 }
 380
 381 #if defined(TARGET_PPC64)
 382 void OPPROTO glue(op_ecowx_le_64, MEMSUFFIX) (void)
 383 {
 384     glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
 385     RETURN();
 386 }
 387 #endif
 388
 389 /* XXX: those micro-ops need tests ! */
 390 /* PowerPC 601 specific instructions (POWER bridge) */
 391 void OPPROTO glue(op_POWER_lscbx, MEMSUFFIX) (void)
 392 {
 393     /* When byte count is 0, do nothing */
 394     if (likely(T1 != 0)) {
 395         glue(do_POWER_lscbx, MEMSUFFIX)(PARAM1, PARAM2, PARAM3);
 396     }
 397     RETURN();
 398 }
 399
 400 #undef MEMSUFFIX