4 #include "qemu-common.h"
7 typedef unsigned char intc_enum
;
14 #define INTC_VECT(enum_id, vect) { enum_id, vect }
18 intc_enum enum_ids
[32];
21 #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
23 struct intc_mask_reg
{
24 unsigned long set_reg
, clr_reg
, reg_width
;
25 intc_enum enum_ids
[32];
29 struct intc_prio_reg
{
30 unsigned long set_reg
, clr_reg
, reg_width
, field_width
;
31 intc_enum enum_ids
[16];
35 #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
39 intc_enum next_enum_id
;
41 int asserted
; /* emulates the interrupt signal line from device to intc */
44 int pending
; /* emulates the result of signal and masking */
45 struct intc_desc
*parent
;
50 struct intc_source
*sources
;
52 struct intc_mask_reg
*mask_regs
;
54 struct intc_prio_reg
*prio_regs
;
57 int pending
; /* number of interrupt sources that has pending set */
60 int sh_intc_get_pending_vector(struct intc_desc
*desc
, int imask
);
61 struct intc_source
*sh_intc_source(struct intc_desc
*desc
, intc_enum id
);
62 void sh_intc_toggle_source(struct intc_source
*source
,
63 int enable_adj
, int assert_adj
);
65 void sh_intc_register_sources(struct intc_desc
*desc
,
66 struct intc_vect
*vectors
,
68 struct intc_group
*groups
,
71 int sh_intc_init(struct intc_desc
*desc
,
73 struct intc_mask_reg
*mask_regs
,
75 struct intc_prio_reg
*prio_regs
,
78 void sh_intc_set_irl(void *opaque
, int n
, int level
);
80 #endif /* __SH_INTC_H__ */