hw/ppc_chrp.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "nvram.h"
  29 #include "pc.h"
  30 #include "pci.h"
  31 #include "net.h"
  32 #include "sysemu.h"
  33 #include "boards.h"
  34
  35 #define MAX_IDE_BUS 2
  36
  37 /* UniN device */
  38 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  39 {
  40 }
  41
  42 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  43 {
  44     return 0;
  45 }
  46
  47 static CPUWriteMemoryFunc *unin_write[] = {
  48     &unin_writel,
  49     &unin_writel,
  50     &unin_writel,
  51 };
  52
  53 static CPUReadMemoryFunc *unin_read[] = {
  54     &unin_readl,
  55     &unin_readl,
  56     &unin_readl,
  57 };
  58
  59 /* PowerPC Mac99 hardware initialisation */
  60 static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
  61                              const char *boot_device, DisplayState *ds,
  62                              const char *kernel_filename,
  63                              const char *kernel_cmdline,
  64                              const char *initrd_filename,
  65                              const char *cpu_model)
  66 {
  67     CPUState *env = NULL, *envs[MAX_CPUS];
  68     char buf[1024];
  69     qemu_irq *pic, **openpic_irqs;
  70     int unin_memory;
  71     int linux_boot, i;
  72     unsigned long bios_offset, vga_bios_offset;
  73     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  74     PCIBus *pci_bus;
  75     nvram_t nvram;
  76 #if 0
  77     MacIONVRAMState *nvr;
  78     int nvram_mem_index;
  79 #endif
  80     m48t59_t *m48t59;
  81     int vga_bios_size, bios_size;
  82     qemu_irq *dummy_irq;
  83     int pic_mem_index, dbdma_mem_index, cuda_mem_index;
  84     int ide_mem_index[2];
  85     int ppc_boot_device;
  86     int index;
  87     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  88
  89     linux_boot = (kernel_filename != NULL);
  90
  91     /* init CPUs */
  92     if (cpu_model == NULL)
  93         cpu_model = "default";
  94     for (i = 0; i < smp_cpus; i++) {
  95         env = cpu_init(cpu_model);
  96         if (!env) {
  97             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
  98             exit(1);
  99         }
 100         /* Set time-base frequency to 100 Mhz */
 101         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 102 #if 0
 103         env->osi_call = vga_osi_call;
 104 #endif
 105         qemu_register_reset(&cpu_ppc_reset, env);
 106         envs[i] = env;
 107     }
 108     if (env->nip < 0xFFF80000) {
 109         /* Special test for PowerPC 601:
 110          * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
 111          * But the NVRAM is located at 0xFFF04000...
 112          */
 113         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 114     }
 115
 116     /* allocate RAM */
 117     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 118
 119     /* allocate and load BIOS */
 120     bios_offset = ram_size + vga_ram_size;
 121     if (bios_name == NULL)
 122         bios_name = BIOS_FILENAME;
 123     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 124     bios_size = load_image(buf, phys_ram_base + bios_offset);
 125     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 126         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 127         exit(1);
 128     }
 129     bios_size = (bios_size + 0xfff) & ~0xfff;
 130     if (bios_size > 0x00080000) {
 131         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 132         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 133     }
 134     cpu_register_physical_memory((uint32_t)(-bios_size),
 135                                  bios_size, bios_offset | IO_MEM_ROM);
 136
 137     /* allocate and load VGA BIOS */
 138     vga_bios_offset = bios_offset + bios_size;
 139     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 140     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 141     if (vga_bios_size < 0) {
 142         /* if no bios is present, we can still work */
 143         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 144         vga_bios_size = 0;
 145     } else {
 146         /* set a specific header (XXX: find real Apple format for NDRV
 147            drivers) */
 148         phys_ram_base[vga_bios_offset] = 'N';
 149         phys_ram_base[vga_bios_offset + 1] = 'D';
 150         phys_ram_base[vga_bios_offset + 2] = 'R';
 151         phys_ram_base[vga_bios_offset + 3] = 'V';
 152         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 153                      vga_bios_size);
 154         vga_bios_size += 8;
 155     }
 156     vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
 157
 158     if (linux_boot) {
 159         kernel_base = KERNEL_LOAD_ADDR;
 160         /* now we can load the kernel */
 161         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 162         if (kernel_size < 0) {
 163             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 164                       kernel_filename);
 165             exit(1);
 166         }
 167         /* load initrd */
 168         if (initrd_filename) {
 169             initrd_base = INITRD_LOAD_ADDR;
 170             initrd_size = load_image(initrd_filename,
 171                                      phys_ram_base + initrd_base);
 172             if (initrd_size < 0) {
 173                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 174                           initrd_filename);
 175                 exit(1);
 176             }
 177         } else {
 178             initrd_base = 0;
 179             initrd_size = 0;
 180         }
 181         ppc_boot_device = 'm';
 182     } else {
 183         kernel_base = 0;
 184         kernel_size = 0;
 185         initrd_base = 0;
 186         initrd_size = 0;
 187         ppc_boot_device = '\0';
 188         /* We consider that NewWorld PowerMac never have any floppy drive
 189          * For now, OHW cannot boot from the network.
 190          */
 191         for (i = 0; boot_device[i] != '\0'; i++) {
 192             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 193                 ppc_boot_device = boot_device[i];
 194                 break;
 195             }
 196         }
 197         if (ppc_boot_device == '\0') {
 198             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 199             exit(1);
 200         }
 201     }
 202
 203     isa_mem_base = 0x80000000;
 204
 205     /* Register 8 MB of ISA IO space */
 206     isa_mmio_init(0xf2000000, 0x00800000);
 207
 208     /* UniN init */
 209     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 210     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 211
 212     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 213     openpic_irqs[0] =
 214         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 215     for (i = 0; i < smp_cpus; i++) {
 216         /* Mac99 IRQ connection between OpenPIC outputs pins
 217          * and PowerPC input pins
 218          */
 219         switch (PPC_INPUT(env)) {
 220         case PPC_FLAGS_INPUT_6xx:
 221             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 222             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 223                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 224             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 225                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 226             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 227                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 228             /* Not connected ? */
 229             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 230             /* Check this */
 231             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 232                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 233             break;
 234 #if defined(TARGET_PPC64)
 235         case PPC_FLAGS_INPUT_970:
 236             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 237             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 238                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 239             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 240                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 241             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 242                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 243             /* Not connected ? */
 244             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 245             /* Check this */
 246             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 247                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 248             break;
 249 #endif /* defined(TARGET_PPC64) */
 250         default:
 251             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 252             exit(1);
 253         }
 254     }
 255     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 256     pci_bus = pci_pmac_init(pic);
 257     /* init basic PC hardware */
 258     pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
 259                  ram_size, vga_ram_size,
 260                  vga_bios_offset, vga_bios_size);
 261
 262     /* XXX: suppress that */
 263     dummy_irq = i8259_init(NULL);
 264
 265     /* XXX: use Mac Serial port */
 266     serial_init(0x3f8, dummy_irq[4], 115200, serial_hds[0]);
 267     for(i = 0; i < nb_nics; i++) {
 268         if (!nd_table[i].model)
 269             nd_table[i].model = "ne2k_pci";
 270         pci_nic_init(pci_bus, &nd_table[i], -1);
 271     }
 272     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 273         fprintf(stderr, "qemu: too many IDE bus\n");
 274         exit(1);
 275     }
 276     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 277         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 278         if (index != -1)
 279             hd[i] = drives_table[index].bdrv;
 280         else
 281             hd[i] = NULL;
 282     }
 283 #if 1
 284     ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13]);
 285     ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14]);
 286 #else
 287     pci_cmd646_ide_init(pci_bus, &hd[0], 0);
 288 #endif
 289     /* cuda also initialize ADB */
 290     cuda_init(&cuda_mem_index, pic[0x19]);
 291
 292     adb_kbd_init(&adb_bus);
 293     adb_mouse_init(&adb_bus);
 294
 295     dbdma_init(&dbdma_mem_index);
 296
 297     macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
 298                cuda_mem_index, NULL, 2, ide_mem_index);
 299
 300     if (usb_enabled) {
 301         usb_ohci_init_pci(pci_bus, 3, -1);
 302     }
 303
 304     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 305         graphic_depth = 15;
 306 #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
 307     /* The NewWorld NVRAM is not located in the MacIO device */
 308     nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
 309     pmac_format_nvram_partition(nvr, 0x2000);
 310     macio_nvram_map(nvr, 0xFFF04000);
 311     nvram.opaque = nvr;
 312     nvram.read_fn = &macio_nvram_read;
 313     nvram.write_fn = &macio_nvram_write;
 314 #else
 315     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 316     nvram.opaque = m48t59;
 317     nvram.read_fn = &m48t59_read;
 318     nvram.write_fn = &m48t59_write;
 319 #endif
 320     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
 321                          ppc_boot_device, kernel_base, kernel_size,
 322                          kernel_cmdline,
 323                          initrd_base, initrd_size,
 324                          /* XXX: need an option to load a NVRAM image */
 325                          0,
 326                          graphic_width, graphic_height, graphic_depth);
 327     /* No PCI init: the BIOS will do it */
 328
 329     /* Special port to get debug messages from Open-Firmware */
 330     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 331 }
 332
 333 QEMUMachine core99_machine = {
 334     .name = "mac99",
 335     .desc = "Mac99 based PowerMAC",
 336     .init = ppc_core99_init,
 337     .ram_require = BIOS_SIZE + VGA_RAM_SIZE,
 338     .max_cpus = MAX_CPUS,
 339 };