4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include "qemu-common.h"
32 #define DEBUG_LOGFILE "/tmp/qemu.log"
34 static const char *interp_prefix
= CONFIG_QEMU_PREFIX
;
35 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
37 #if defined(__i386__) && !defined(CONFIG_STATIC)
38 /* Force usage of an ELF interpreter even if it is an ELF shared
40 const char interp
[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
43 /* for recent libc, we add these dummy symbols which are not declared
44 when generating a linked object (bug in ld ?) */
45 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46 asm(".globl __preinit_array_start\n"
47 ".globl __preinit_array_end\n"
48 ".globl __init_array_start\n"
49 ".globl __init_array_end\n"
50 ".globl __fini_array_start\n"
51 ".globl __fini_array_end\n"
52 ".section \".rodata\"\n"
53 "__preinit_array_start:\n"
54 "__preinit_array_end:\n"
55 "__init_array_start:\n"
57 "__fini_array_start:\n"
63 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
64 we allocate a bigger stack. Need a better solution, for example
65 by remapping the process stack directly at the right place */
66 unsigned long x86_stack_size
= 512 * 1024;
68 void gemu_log(const char *fmt
, ...)
73 vfprintf(stderr
, fmt
, ap
);
77 void cpu_outb(CPUState
*env
, int addr
, int val
)
79 fprintf(stderr
, "outb: port=0x%04x, data=%02x\n", addr
, val
);
82 void cpu_outw(CPUState
*env
, int addr
, int val
)
84 fprintf(stderr
, "outw: port=0x%04x, data=%04x\n", addr
, val
);
87 void cpu_outl(CPUState
*env
, int addr
, int val
)
89 fprintf(stderr
, "outl: port=0x%04x, data=%08x\n", addr
, val
);
92 int cpu_inb(CPUState
*env
, int addr
)
94 fprintf(stderr
, "inb: port=0x%04x\n", addr
);
98 int cpu_inw(CPUState
*env
, int addr
)
100 fprintf(stderr
, "inw: port=0x%04x\n", addr
);
104 int cpu_inl(CPUState
*env
, int addr
)
106 fprintf(stderr
, "inl: port=0x%04x\n", addr
);
110 int cpu_get_pic_interrupt(CPUState
*env
)
115 /* timers for rdtsc */
119 static uint64_t emu_time
;
121 int64_t cpu_get_real_ticks(void)
128 #if defined(USE_NPTL)
129 /***********************************************************/
130 /* Helper routines for implementing atomic operations. */
132 /* To implement exclusive operations we force all cpus to syncronise.
133 We don't require a full sync, only that no cpus are executing guest code.
134 The alternative is to map target atomic ops onto host equivalents,
135 which requires quite a lot of per host/target work. */
136 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
137 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
138 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
139 static int pending_cpus
;
141 /* Make sure everything is in a consistent state for calling fork(). */
142 void fork_start(void)
145 pthread_mutex_lock(&tb_lock
);
146 pthread_mutex_lock(&exclusive_lock
);
149 void fork_end(int child
)
152 /* Child processes created by fork() only have a single thread.
153 Discard information about the parent threads. */
154 first_cpu
= thread_env
;
155 thread_env
->next_cpu
= NULL
;
157 pthread_mutex_init(&exclusive_lock
, NULL
);
158 pthread_cond_init(&exclusive_cond
, NULL
);
159 pthread_cond_init(&exclusive_resume
, NULL
);
160 pthread_mutex_init(&tb_lock
, NULL
);
162 pthread_mutex_unlock(&exclusive_lock
);
163 pthread_mutex_unlock(&tb_lock
);
165 mmap_fork_end(child
);
168 /* Wait for pending exclusive operations to complete. The exclusive lock
170 static inline void exclusive_idle(void)
172 while (pending_cpus
) {
173 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
177 /* Start an exclusive operation.
178 Must only be called from outside cpu_arm_exec. */
179 static inline void start_exclusive(void)
182 pthread_mutex_lock(&exclusive_lock
);
186 /* Make all other cpus stop executing. */
187 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
188 if (other
->running
) {
190 cpu_interrupt(other
, CPU_INTERRUPT_EXIT
);
193 if (pending_cpus
> 1) {
194 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
198 /* Finish an exclusive operation. */
199 static inline void end_exclusive(void)
202 pthread_cond_broadcast(&exclusive_resume
);
203 pthread_mutex_unlock(&exclusive_lock
);
206 /* Wait for exclusive ops to finish, and begin cpu execution. */
207 static inline void cpu_exec_start(CPUState
*env
)
209 pthread_mutex_lock(&exclusive_lock
);
212 pthread_mutex_unlock(&exclusive_lock
);
215 /* Mark cpu as not executing, and release pending exclusive ops. */
216 static inline void cpu_exec_end(CPUState
*env
)
218 pthread_mutex_lock(&exclusive_lock
);
220 if (pending_cpus
> 1) {
222 if (pending_cpus
== 1) {
223 pthread_cond_signal(&exclusive_cond
);
227 pthread_mutex_unlock(&exclusive_lock
);
229 #else /* if !USE_NPTL */
230 /* These are no-ops because we are not threadsafe. */
231 static inline void cpu_exec_start(CPUState
*env
)
235 static inline void cpu_exec_end(CPUState
*env
)
239 static inline void start_exclusive(void)
243 static inline void end_exclusive(void)
247 void fork_start(void)
251 void fork_end(int child
)
258 /***********************************************************/
259 /* CPUX86 core interface */
261 void cpu_smm_update(CPUState
*env
)
265 uint64_t cpu_get_tsc(CPUX86State
*env
)
267 return cpu_get_real_ticks();
270 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
275 e1
= (addr
<< 16) | (limit
& 0xffff);
276 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
284 uint64_t idt_table
[512];
286 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
287 uint64_t addr
, unsigned int sel
)
290 e1
= (addr
& 0xffff) | (sel
<< 16);
291 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
295 p
[2] = tswap32(addr
>> 32);
298 /* only dpl matters as we do only user space emulation */
299 static void set_idt(int n
, unsigned int dpl
)
301 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
304 uint64_t idt_table
[256];
306 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
307 uint32_t addr
, unsigned int sel
)
310 e1
= (addr
& 0xffff) | (sel
<< 16);
311 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
317 /* only dpl matters as we do only user space emulation */
318 static void set_idt(int n
, unsigned int dpl
)
320 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
324 void cpu_loop(CPUX86State
*env
)
328 target_siginfo_t info
;
331 trapnr
= cpu_x86_exec(env
);
334 /* linux syscall from int $0x80 */
335 env
->regs
[R_EAX
] = do_syscall(env
,
346 /* linux syscall from syscall intruction */
347 env
->regs
[R_EAX
] = do_syscall(env
,
355 env
->eip
= env
->exception_next_eip
;
360 info
.si_signo
= SIGBUS
;
362 info
.si_code
= TARGET_SI_KERNEL
;
363 info
._sifields
._sigfault
._addr
= 0;
364 queue_signal(env
, info
.si_signo
, &info
);
367 /* XXX: potential problem if ABI32 */
368 #ifndef TARGET_X86_64
369 if (env
->eflags
& VM_MASK
) {
370 handle_vm86_fault(env
);
374 info
.si_signo
= SIGSEGV
;
376 info
.si_code
= TARGET_SI_KERNEL
;
377 info
._sifields
._sigfault
._addr
= 0;
378 queue_signal(env
, info
.si_signo
, &info
);
382 info
.si_signo
= SIGSEGV
;
384 if (!(env
->error_code
& 1))
385 info
.si_code
= TARGET_SEGV_MAPERR
;
387 info
.si_code
= TARGET_SEGV_ACCERR
;
388 info
._sifields
._sigfault
._addr
= env
->cr
[2];
389 queue_signal(env
, info
.si_signo
, &info
);
392 #ifndef TARGET_X86_64
393 if (env
->eflags
& VM_MASK
) {
394 handle_vm86_trap(env
, trapnr
);
398 /* division by zero */
399 info
.si_signo
= SIGFPE
;
401 info
.si_code
= TARGET_FPE_INTDIV
;
402 info
._sifields
._sigfault
._addr
= env
->eip
;
403 queue_signal(env
, info
.si_signo
, &info
);
408 #ifndef TARGET_X86_64
409 if (env
->eflags
& VM_MASK
) {
410 handle_vm86_trap(env
, trapnr
);
414 info
.si_signo
= SIGTRAP
;
416 if (trapnr
== EXCP01_SSTP
) {
417 info
.si_code
= TARGET_TRAP_BRKPT
;
418 info
._sifields
._sigfault
._addr
= env
->eip
;
420 info
.si_code
= TARGET_SI_KERNEL
;
421 info
._sifields
._sigfault
._addr
= 0;
423 queue_signal(env
, info
.si_signo
, &info
);
428 #ifndef TARGET_X86_64
429 if (env
->eflags
& VM_MASK
) {
430 handle_vm86_trap(env
, trapnr
);
434 info
.si_signo
= SIGSEGV
;
436 info
.si_code
= TARGET_SI_KERNEL
;
437 info
._sifields
._sigfault
._addr
= 0;
438 queue_signal(env
, info
.si_signo
, &info
);
442 info
.si_signo
= SIGILL
;
444 info
.si_code
= TARGET_ILL_ILLOPN
;
445 info
._sifields
._sigfault
._addr
= env
->eip
;
446 queue_signal(env
, info
.si_signo
, &info
);
449 /* just indicate that signals should be handled asap */
455 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
460 info
.si_code
= TARGET_TRAP_BRKPT
;
461 queue_signal(env
, info
.si_signo
, &info
);
466 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
467 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
471 process_pending_signals(env
);
478 /* XXX: find a better solution */
479 extern void tb_invalidate_page_range(abi_ulong start
, abi_ulong end
);
481 static void arm_cache_flush(abi_ulong start
, abi_ulong last
)
483 abi_ulong addr
, last1
;
489 last1
= ((addr
+ TARGET_PAGE_SIZE
) & TARGET_PAGE_MASK
) - 1;
492 tb_invalidate_page_range(addr
, last1
+ 1);
499 /* Handle a jump to the kernel code page. */
501 do_kernel_trap(CPUARMState
*env
)
507 switch (env
->regs
[15]) {
508 case 0xffff0fa0: /* __kernel_memory_barrier */
509 /* ??? No-op. Will need to do better for SMP. */
511 case 0xffff0fc0: /* __kernel_cmpxchg */
512 /* XXX: This only works between threads, not between processes.
513 It's probably possible to implement this with native host
514 operations. However things like ldrex/strex are much harder so
515 there's not much point trying. */
517 cpsr
= cpsr_read(env
);
519 /* FIXME: This should SEGV if the access fails. */
520 if (get_user_u32(val
, addr
))
522 if (val
== env
->regs
[0]) {
524 /* FIXME: Check for segfaults. */
525 put_user_u32(val
, addr
);
532 cpsr_write(env
, cpsr
, CPSR_C
);
535 case 0xffff0fe0: /* __kernel_get_tls */
536 env
->regs
[0] = env
->cp15
.c13_tls2
;
541 /* Jump back to the caller. */
542 addr
= env
->regs
[14];
547 env
->regs
[15] = addr
;
552 void cpu_loop(CPUARMState
*env
)
555 unsigned int n
, insn
;
556 target_siginfo_t info
;
561 trapnr
= cpu_arm_exec(env
);
566 TaskState
*ts
= env
->opaque
;
570 /* we handle the FPU emulation here, as Linux */
571 /* we get the opcode */
572 /* FIXME - what to do if get_user() fails? */
573 get_user_u32(opcode
, env
->regs
[15]);
575 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
576 if (rc
== 0) { /* illegal instruction */
577 info
.si_signo
= SIGILL
;
579 info
.si_code
= TARGET_ILL_ILLOPN
;
580 info
._sifields
._sigfault
._addr
= env
->regs
[15];
581 queue_signal(env
, info
.si_signo
, &info
);
582 } else if (rc
< 0) { /* FP exception */
585 /* translate softfloat flags to FPSR flags */
586 if (-rc
& float_flag_invalid
)
588 if (-rc
& float_flag_divbyzero
)
590 if (-rc
& float_flag_overflow
)
592 if (-rc
& float_flag_underflow
)
594 if (-rc
& float_flag_inexact
)
597 FPSR fpsr
= ts
->fpa
.fpsr
;
598 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
600 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
601 info
.si_signo
= SIGFPE
;
604 /* ordered by priority, least first */
605 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
606 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
607 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
608 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
609 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
611 info
._sifields
._sigfault
._addr
= env
->regs
[15];
612 queue_signal(env
, info
.si_signo
, &info
);
617 /* accumulate unenabled exceptions */
618 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
620 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
622 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
624 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
626 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
629 } else { /* everything OK */
640 if (trapnr
== EXCP_BKPT
) {
642 /* FIXME - what to do if get_user() fails? */
643 get_user_u16(insn
, env
->regs
[15]);
647 /* FIXME - what to do if get_user() fails? */
648 get_user_u32(insn
, env
->regs
[15]);
649 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
654 /* FIXME - what to do if get_user() fails? */
655 get_user_u16(insn
, env
->regs
[15] - 2);
658 /* FIXME - what to do if get_user() fails? */
659 get_user_u32(insn
, env
->regs
[15] - 4);
664 if (n
== ARM_NR_cacheflush
) {
665 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
666 } else if (n
== ARM_NR_semihosting
667 || n
== ARM_NR_thumb_semihosting
) {
668 env
->regs
[0] = do_arm_semihosting (env
);
669 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
670 || (env
->thumb
&& n
== ARM_THUMB_SYSCALL
)) {
672 if (env
->thumb
|| n
== 0) {
675 n
-= ARM_SYSCALL_BASE
;
678 if ( n
> ARM_NR_BASE
) {
680 case ARM_NR_cacheflush
:
681 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
684 cpu_set_tls(env
, env
->regs
[0]);
688 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
690 env
->regs
[0] = -TARGET_ENOSYS
;
694 env
->regs
[0] = do_syscall(env
,
709 /* just indicate that signals should be handled asap */
711 case EXCP_PREFETCH_ABORT
:
712 addr
= env
->cp15
.c6_data
;
714 case EXCP_DATA_ABORT
:
715 addr
= env
->cp15
.c6_insn
;
719 info
.si_signo
= SIGSEGV
;
721 /* XXX: check env->error_code */
722 info
.si_code
= TARGET_SEGV_MAPERR
;
723 info
._sifields
._sigfault
._addr
= addr
;
724 queue_signal(env
, info
.si_signo
, &info
);
731 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
736 info
.si_code
= TARGET_TRAP_BRKPT
;
737 queue_signal(env
, info
.si_signo
, &info
);
741 case EXCP_KERNEL_TRAP
:
742 if (do_kernel_trap(env
))
747 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
749 cpu_dump_state(env
, stderr
, fprintf
, 0);
752 process_pending_signals(env
);
762 /* WARNING: dealing with register windows _is_ complicated. More info
763 can be found at http://www.sics.se/~psm/sparcstack.html */
764 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
766 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
767 /* wrap handling : if cwp is on the last window, then we use the
768 registers 'after' the end */
769 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
770 index
+= 16 * env
->nwindows
;
774 /* save the register window 'cwp1' */
775 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
780 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
781 #if defined(DEBUG_WIN)
782 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
785 for(i
= 0; i
< 16; i
++) {
786 /* FIXME - what to do if put_user() fails? */
787 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
788 sp_ptr
+= sizeof(abi_ulong
);
792 static void save_window(CPUSPARCState
*env
)
794 #ifndef TARGET_SPARC64
795 unsigned int new_wim
;
796 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
797 ((1LL << env
->nwindows
) - 1);
798 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
801 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
807 static void restore_window(CPUSPARCState
*env
)
809 unsigned int new_wim
, i
, cwp1
;
812 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
813 ((1LL << env
->nwindows
) - 1);
815 /* restore the invalid window */
816 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
817 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
818 #if defined(DEBUG_WIN)
819 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
822 for(i
= 0; i
< 16; i
++) {
823 /* FIXME - what to do if get_user() fails? */
824 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
825 sp_ptr
+= sizeof(abi_ulong
);
828 #ifdef TARGET_SPARC64
830 if (env
->cleanwin
< env
->nwindows
- 1)
836 static void flush_windows(CPUSPARCState
*env
)
842 /* if restore would invoke restore_window(), then we can stop */
843 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
844 if (env
->wim
& (1 << cwp1
))
846 save_window_offset(env
, cwp1
);
849 /* set wim so that restore will reload the registers */
850 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
851 env
->wim
= 1 << cwp1
;
852 #if defined(DEBUG_WIN)
853 printf("flush_windows: nb=%d\n", offset
- 1);
857 void cpu_loop (CPUSPARCState
*env
)
860 target_siginfo_t info
;
863 trapnr
= cpu_sparc_exec (env
);
866 #ifndef TARGET_SPARC64
873 ret
= do_syscall (env
, env
->gregs
[1],
874 env
->regwptr
[0], env
->regwptr
[1],
875 env
->regwptr
[2], env
->regwptr
[3],
876 env
->regwptr
[4], env
->regwptr
[5]);
877 if ((unsigned int)ret
>= (unsigned int)(-515)) {
878 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
879 env
->xcc
|= PSR_CARRY
;
881 env
->psr
|= PSR_CARRY
;
885 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
886 env
->xcc
&= ~PSR_CARRY
;
888 env
->psr
&= ~PSR_CARRY
;
891 env
->regwptr
[0] = ret
;
892 /* next instruction */
894 env
->npc
= env
->npc
+ 4;
896 case 0x83: /* flush windows */
901 /* next instruction */
903 env
->npc
= env
->npc
+ 4;
905 #ifndef TARGET_SPARC64
906 case TT_WIN_OVF
: /* window overflow */
909 case TT_WIN_UNF
: /* window underflow */
915 info
.si_signo
= SIGSEGV
;
917 /* XXX: check env->error_code */
918 info
.si_code
= TARGET_SEGV_MAPERR
;
919 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
920 queue_signal(env
, info
.si_signo
, &info
);
924 case TT_SPILL
: /* window overflow */
927 case TT_FILL
: /* window underflow */
933 info
.si_signo
= SIGSEGV
;
935 /* XXX: check env->error_code */
936 info
.si_code
= TARGET_SEGV_MAPERR
;
937 if (trapnr
== TT_DFAULT
)
938 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
940 info
._sifields
._sigfault
._addr
= env
->tsptr
->tpc
;
941 queue_signal(env
, info
.si_signo
, &info
);
947 sparc64_get_context(env
);
951 sparc64_set_context(env
);
956 /* just indicate that signals should be handled asap */
962 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
967 info
.si_code
= TARGET_TRAP_BRKPT
;
968 queue_signal(env
, info
.si_signo
, &info
);
973 printf ("Unhandled trap: 0x%x\n", trapnr
);
974 cpu_dump_state(env
, stderr
, fprintf
, 0);
977 process_pending_signals (env
);
984 static inline uint64_t cpu_ppc_get_tb (CPUState
*env
)
990 uint32_t cpu_ppc_load_tbl (CPUState
*env
)
992 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
995 uint32_t cpu_ppc_load_tbu (CPUState
*env
)
997 return cpu_ppc_get_tb(env
) >> 32;
1000 uint32_t cpu_ppc_load_atbl (CPUState
*env
)
1002 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1005 uint32_t cpu_ppc_load_atbu (CPUState
*env
)
1007 return cpu_ppc_get_tb(env
) >> 32;
1010 uint32_t cpu_ppc601_load_rtcu (CPUState
*env
)
1011 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1013 uint32_t cpu_ppc601_load_rtcl (CPUState
*env
)
1015 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1018 /* XXX: to be fixed */
1019 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong
*valp
)
1024 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong val
)
1029 #define EXCP_DUMP(env, fmt, args...) \
1031 fprintf(stderr, fmt , ##args); \
1032 cpu_dump_state(env, stderr, fprintf, 0); \
1033 if (loglevel != 0) { \
1034 fprintf(logfile, fmt , ##args); \
1035 cpu_dump_state(env, logfile, fprintf, 0); \
1039 void cpu_loop(CPUPPCState
*env
)
1041 target_siginfo_t info
;
1046 trapnr
= cpu_ppc_exec(env
);
1048 case POWERPC_EXCP_NONE
:
1051 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1052 cpu_abort(env
, "Critical interrupt while in user mode. "
1055 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1056 cpu_abort(env
, "Machine check exception while in user mode. "
1059 case POWERPC_EXCP_DSI
: /* Data storage exception */
1060 EXCP_DUMP(env
, "Invalid data memory access: 0x" ADDRX
"\n",
1062 /* XXX: check this. Seems bugged */
1063 switch (env
->error_code
& 0xFF000000) {
1065 info
.si_signo
= TARGET_SIGSEGV
;
1067 info
.si_code
= TARGET_SEGV_MAPERR
;
1070 info
.si_signo
= TARGET_SIGILL
;
1072 info
.si_code
= TARGET_ILL_ILLADR
;
1075 info
.si_signo
= TARGET_SIGSEGV
;
1077 info
.si_code
= TARGET_SEGV_ACCERR
;
1080 /* Let's send a regular segfault... */
1081 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1083 info
.si_signo
= TARGET_SIGSEGV
;
1085 info
.si_code
= TARGET_SEGV_MAPERR
;
1088 info
._sifields
._sigfault
._addr
= env
->nip
;
1089 queue_signal(env
, info
.si_signo
, &info
);
1091 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1092 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" ADDRX
"\n",
1093 env
->spr
[SPR_SRR0
]);
1094 /* XXX: check this */
1095 switch (env
->error_code
& 0xFF000000) {
1097 info
.si_signo
= TARGET_SIGSEGV
;
1099 info
.si_code
= TARGET_SEGV_MAPERR
;
1103 info
.si_signo
= TARGET_SIGSEGV
;
1105 info
.si_code
= TARGET_SEGV_ACCERR
;
1108 /* Let's send a regular segfault... */
1109 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1111 info
.si_signo
= TARGET_SIGSEGV
;
1113 info
.si_code
= TARGET_SEGV_MAPERR
;
1116 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1117 queue_signal(env
, info
.si_signo
, &info
);
1119 case POWERPC_EXCP_EXTERNAL
: /* External input */
1120 cpu_abort(env
, "External interrupt while in user mode. "
1123 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1124 EXCP_DUMP(env
, "Unaligned memory access\n");
1125 /* XXX: check this */
1126 info
.si_signo
= TARGET_SIGBUS
;
1128 info
.si_code
= TARGET_BUS_ADRALN
;
1129 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1130 queue_signal(env
, info
.si_signo
, &info
);
1132 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1133 /* XXX: check this */
1134 switch (env
->error_code
& ~0xF) {
1135 case POWERPC_EXCP_FP
:
1136 EXCP_DUMP(env
, "Floating point program exception\n");
1137 info
.si_signo
= TARGET_SIGFPE
;
1139 switch (env
->error_code
& 0xF) {
1140 case POWERPC_EXCP_FP_OX
:
1141 info
.si_code
= TARGET_FPE_FLTOVF
;
1143 case POWERPC_EXCP_FP_UX
:
1144 info
.si_code
= TARGET_FPE_FLTUND
;
1146 case POWERPC_EXCP_FP_ZX
:
1147 case POWERPC_EXCP_FP_VXZDZ
:
1148 info
.si_code
= TARGET_FPE_FLTDIV
;
1150 case POWERPC_EXCP_FP_XX
:
1151 info
.si_code
= TARGET_FPE_FLTRES
;
1153 case POWERPC_EXCP_FP_VXSOFT
:
1154 info
.si_code
= TARGET_FPE_FLTINV
;
1156 case POWERPC_EXCP_FP_VXSNAN
:
1157 case POWERPC_EXCP_FP_VXISI
:
1158 case POWERPC_EXCP_FP_VXIDI
:
1159 case POWERPC_EXCP_FP_VXIMZ
:
1160 case POWERPC_EXCP_FP_VXVC
:
1161 case POWERPC_EXCP_FP_VXSQRT
:
1162 case POWERPC_EXCP_FP_VXCVI
:
1163 info
.si_code
= TARGET_FPE_FLTSUB
;
1166 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1171 case POWERPC_EXCP_INVAL
:
1172 EXCP_DUMP(env
, "Invalid instruction\n");
1173 info
.si_signo
= TARGET_SIGILL
;
1175 switch (env
->error_code
& 0xF) {
1176 case POWERPC_EXCP_INVAL_INVAL
:
1177 info
.si_code
= TARGET_ILL_ILLOPC
;
1179 case POWERPC_EXCP_INVAL_LSWX
:
1180 info
.si_code
= TARGET_ILL_ILLOPN
;
1182 case POWERPC_EXCP_INVAL_SPR
:
1183 info
.si_code
= TARGET_ILL_PRVREG
;
1185 case POWERPC_EXCP_INVAL_FP
:
1186 info
.si_code
= TARGET_ILL_COPROC
;
1189 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1190 env
->error_code
& 0xF);
1191 info
.si_code
= TARGET_ILL_ILLADR
;
1195 case POWERPC_EXCP_PRIV
:
1196 EXCP_DUMP(env
, "Privilege violation\n");
1197 info
.si_signo
= TARGET_SIGILL
;
1199 switch (env
->error_code
& 0xF) {
1200 case POWERPC_EXCP_PRIV_OPC
:
1201 info
.si_code
= TARGET_ILL_PRVOPC
;
1203 case POWERPC_EXCP_PRIV_REG
:
1204 info
.si_code
= TARGET_ILL_PRVREG
;
1207 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1208 env
->error_code
& 0xF);
1209 info
.si_code
= TARGET_ILL_PRVOPC
;
1213 case POWERPC_EXCP_TRAP
:
1214 cpu_abort(env
, "Tried to call a TRAP\n");
1217 /* Should not happen ! */
1218 cpu_abort(env
, "Unknown program exception (%02x)\n",
1222 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1223 queue_signal(env
, info
.si_signo
, &info
);
1225 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1226 EXCP_DUMP(env
, "No floating point allowed\n");
1227 info
.si_signo
= TARGET_SIGILL
;
1229 info
.si_code
= TARGET_ILL_COPROC
;
1230 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1231 queue_signal(env
, info
.si_signo
, &info
);
1233 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1234 cpu_abort(env
, "Syscall exception while in user mode. "
1237 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1238 EXCP_DUMP(env
, "No APU instruction allowed\n");
1239 info
.si_signo
= TARGET_SIGILL
;
1241 info
.si_code
= TARGET_ILL_COPROC
;
1242 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1243 queue_signal(env
, info
.si_signo
, &info
);
1245 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1246 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1249 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1250 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1253 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1254 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1257 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1258 cpu_abort(env
, "Data TLB exception while in user mode. "
1261 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1262 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1265 case POWERPC_EXCP_DEBUG
: /* Debug interrupt */
1266 /* XXX: check this */
1270 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1272 info
.si_signo
= sig
;
1274 info
.si_code
= TARGET_TRAP_BRKPT
;
1275 queue_signal(env
, info
.si_signo
, &info
);
1279 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1280 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1281 info
.si_signo
= TARGET_SIGILL
;
1283 info
.si_code
= TARGET_ILL_COPROC
;
1284 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1285 queue_signal(env
, info
.si_signo
, &info
);
1287 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1288 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1290 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1291 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1293 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1294 cpu_abort(env
, "Performance monitor exception not handled\n");
1296 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1297 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1300 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1301 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1304 case POWERPC_EXCP_RESET
: /* System reset exception */
1305 cpu_abort(env
, "Reset interrupt while in user mode. "
1308 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1309 cpu_abort(env
, "Data segment exception while in user mode. "
1312 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1313 cpu_abort(env
, "Instruction segment exception "
1314 "while in user mode. Aborting\n");
1316 /* PowerPC 64 with hypervisor mode support */
1317 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1318 cpu_abort(env
, "Hypervisor decrementer interrupt "
1319 "while in user mode. Aborting\n");
1321 case POWERPC_EXCP_TRACE
: /* Trace exception */
1323 * we use this exception to emulate step-by-step execution mode.
1326 /* PowerPC 64 with hypervisor mode support */
1327 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1328 cpu_abort(env
, "Hypervisor data storage exception "
1329 "while in user mode. Aborting\n");
1331 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1332 cpu_abort(env
, "Hypervisor instruction storage exception "
1333 "while in user mode. Aborting\n");
1335 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1336 cpu_abort(env
, "Hypervisor data segment exception "
1337 "while in user mode. Aborting\n");
1339 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1340 cpu_abort(env
, "Hypervisor instruction segment exception "
1341 "while in user mode. Aborting\n");
1343 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1344 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1345 info
.si_signo
= TARGET_SIGILL
;
1347 info
.si_code
= TARGET_ILL_COPROC
;
1348 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1349 queue_signal(env
, info
.si_signo
, &info
);
1351 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1352 cpu_abort(env
, "Programable interval timer interrupt "
1353 "while in user mode. Aborting\n");
1355 case POWERPC_EXCP_IO
: /* IO error exception */
1356 cpu_abort(env
, "IO error exception while in user mode. "
1359 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1360 cpu_abort(env
, "Run mode exception while in user mode. "
1363 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1364 cpu_abort(env
, "Emulation trap exception not handled\n");
1366 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1367 cpu_abort(env
, "Instruction fetch TLB exception "
1368 "while in user-mode. Aborting");
1370 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1371 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1374 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1375 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1378 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1379 cpu_abort(env
, "Floating-point assist exception not handled\n");
1381 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1382 cpu_abort(env
, "Instruction address breakpoint exception "
1385 case POWERPC_EXCP_SMI
: /* System management interrupt */
1386 cpu_abort(env
, "System management interrupt while in user mode. "
1389 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1390 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1393 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1394 cpu_abort(env
, "Performance monitor exception not handled\n");
1396 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1397 cpu_abort(env
, "Vector assist exception not handled\n");
1399 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1400 cpu_abort(env
, "Soft patch exception not handled\n");
1402 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1403 cpu_abort(env
, "Maintenance exception while in user mode. "
1406 case POWERPC_EXCP_STOP
: /* stop translation */
1407 /* We did invalidate the instruction cache. Go on */
1409 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1410 /* We just stopped because of a branch. Go on */
1412 case POWERPC_EXCP_SYSCALL_USER
:
1413 /* system call in user-mode emulation */
1415 * PPC ABI uses overflow flag in cr0 to signal an error
1419 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env
->gpr
[0],
1420 env
->gpr
[3], env
->gpr
[4], env
->gpr
[5], env
->gpr
[6]);
1422 env
->crf
[0] &= ~0x1;
1423 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1424 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1426 if (ret
> (uint32_t)(-515)) {
1432 printf("syscall returned 0x%08x (%d)\n", ret
, ret
);
1435 case EXCP_INTERRUPT
:
1436 /* just indicate that signals should be handled asap */
1439 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1442 process_pending_signals(env
);
1449 #define MIPS_SYS(name, args) args,
1451 static const uint8_t mips_syscall_args
[] = {
1452 MIPS_SYS(sys_syscall
, 0) /* 4000 */
1453 MIPS_SYS(sys_exit
, 1)
1454 MIPS_SYS(sys_fork
, 0)
1455 MIPS_SYS(sys_read
, 3)
1456 MIPS_SYS(sys_write
, 3)
1457 MIPS_SYS(sys_open
, 3) /* 4005 */
1458 MIPS_SYS(sys_close
, 1)
1459 MIPS_SYS(sys_waitpid
, 3)
1460 MIPS_SYS(sys_creat
, 2)
1461 MIPS_SYS(sys_link
, 2)
1462 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1463 MIPS_SYS(sys_execve
, 0)
1464 MIPS_SYS(sys_chdir
, 1)
1465 MIPS_SYS(sys_time
, 1)
1466 MIPS_SYS(sys_mknod
, 3)
1467 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1468 MIPS_SYS(sys_lchown
, 3)
1469 MIPS_SYS(sys_ni_syscall
, 0)
1470 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1471 MIPS_SYS(sys_lseek
, 3)
1472 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1473 MIPS_SYS(sys_mount
, 5)
1474 MIPS_SYS(sys_oldumount
, 1)
1475 MIPS_SYS(sys_setuid
, 1)
1476 MIPS_SYS(sys_getuid
, 0)
1477 MIPS_SYS(sys_stime
, 1) /* 4025 */
1478 MIPS_SYS(sys_ptrace
, 4)
1479 MIPS_SYS(sys_alarm
, 1)
1480 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1481 MIPS_SYS(sys_pause
, 0)
1482 MIPS_SYS(sys_utime
, 2) /* 4030 */
1483 MIPS_SYS(sys_ni_syscall
, 0)
1484 MIPS_SYS(sys_ni_syscall
, 0)
1485 MIPS_SYS(sys_access
, 2)
1486 MIPS_SYS(sys_nice
, 1)
1487 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1488 MIPS_SYS(sys_sync
, 0)
1489 MIPS_SYS(sys_kill
, 2)
1490 MIPS_SYS(sys_rename
, 2)
1491 MIPS_SYS(sys_mkdir
, 2)
1492 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1493 MIPS_SYS(sys_dup
, 1)
1494 MIPS_SYS(sys_pipe
, 0)
1495 MIPS_SYS(sys_times
, 1)
1496 MIPS_SYS(sys_ni_syscall
, 0)
1497 MIPS_SYS(sys_brk
, 1) /* 4045 */
1498 MIPS_SYS(sys_setgid
, 1)
1499 MIPS_SYS(sys_getgid
, 0)
1500 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1501 MIPS_SYS(sys_geteuid
, 0)
1502 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1503 MIPS_SYS(sys_acct
, 0)
1504 MIPS_SYS(sys_umount
, 2)
1505 MIPS_SYS(sys_ni_syscall
, 0)
1506 MIPS_SYS(sys_ioctl
, 3)
1507 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1508 MIPS_SYS(sys_ni_syscall
, 2)
1509 MIPS_SYS(sys_setpgid
, 2)
1510 MIPS_SYS(sys_ni_syscall
, 0)
1511 MIPS_SYS(sys_olduname
, 1)
1512 MIPS_SYS(sys_umask
, 1) /* 4060 */
1513 MIPS_SYS(sys_chroot
, 1)
1514 MIPS_SYS(sys_ustat
, 2)
1515 MIPS_SYS(sys_dup2
, 2)
1516 MIPS_SYS(sys_getppid
, 0)
1517 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1518 MIPS_SYS(sys_setsid
, 0)
1519 MIPS_SYS(sys_sigaction
, 3)
1520 MIPS_SYS(sys_sgetmask
, 0)
1521 MIPS_SYS(sys_ssetmask
, 1)
1522 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1523 MIPS_SYS(sys_setregid
, 2)
1524 MIPS_SYS(sys_sigsuspend
, 0)
1525 MIPS_SYS(sys_sigpending
, 1)
1526 MIPS_SYS(sys_sethostname
, 2)
1527 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1528 MIPS_SYS(sys_getrlimit
, 2)
1529 MIPS_SYS(sys_getrusage
, 2)
1530 MIPS_SYS(sys_gettimeofday
, 2)
1531 MIPS_SYS(sys_settimeofday
, 2)
1532 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1533 MIPS_SYS(sys_setgroups
, 2)
1534 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1535 MIPS_SYS(sys_symlink
, 2)
1536 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1537 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1538 MIPS_SYS(sys_uselib
, 1)
1539 MIPS_SYS(sys_swapon
, 2)
1540 MIPS_SYS(sys_reboot
, 3)
1541 MIPS_SYS(old_readdir
, 3)
1542 MIPS_SYS(old_mmap
, 6) /* 4090 */
1543 MIPS_SYS(sys_munmap
, 2)
1544 MIPS_SYS(sys_truncate
, 2)
1545 MIPS_SYS(sys_ftruncate
, 2)
1546 MIPS_SYS(sys_fchmod
, 2)
1547 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1548 MIPS_SYS(sys_getpriority
, 2)
1549 MIPS_SYS(sys_setpriority
, 3)
1550 MIPS_SYS(sys_ni_syscall
, 0)
1551 MIPS_SYS(sys_statfs
, 2)
1552 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1553 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1554 MIPS_SYS(sys_socketcall
, 2)
1555 MIPS_SYS(sys_syslog
, 3)
1556 MIPS_SYS(sys_setitimer
, 3)
1557 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1558 MIPS_SYS(sys_newstat
, 2)
1559 MIPS_SYS(sys_newlstat
, 2)
1560 MIPS_SYS(sys_newfstat
, 2)
1561 MIPS_SYS(sys_uname
, 1)
1562 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1563 MIPS_SYS(sys_vhangup
, 0)
1564 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1565 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1566 MIPS_SYS(sys_wait4
, 4)
1567 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1568 MIPS_SYS(sys_sysinfo
, 1)
1569 MIPS_SYS(sys_ipc
, 6)
1570 MIPS_SYS(sys_fsync
, 1)
1571 MIPS_SYS(sys_sigreturn
, 0)
1572 MIPS_SYS(sys_clone
, 0) /* 4120 */
1573 MIPS_SYS(sys_setdomainname
, 2)
1574 MIPS_SYS(sys_newuname
, 1)
1575 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1576 MIPS_SYS(sys_adjtimex
, 1)
1577 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1578 MIPS_SYS(sys_sigprocmask
, 3)
1579 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1580 MIPS_SYS(sys_init_module
, 5)
1581 MIPS_SYS(sys_delete_module
, 1)
1582 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1583 MIPS_SYS(sys_quotactl
, 0)
1584 MIPS_SYS(sys_getpgid
, 1)
1585 MIPS_SYS(sys_fchdir
, 1)
1586 MIPS_SYS(sys_bdflush
, 2)
1587 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1588 MIPS_SYS(sys_personality
, 1)
1589 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1590 MIPS_SYS(sys_setfsuid
, 1)
1591 MIPS_SYS(sys_setfsgid
, 1)
1592 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1593 MIPS_SYS(sys_getdents
, 3)
1594 MIPS_SYS(sys_select
, 5)
1595 MIPS_SYS(sys_flock
, 2)
1596 MIPS_SYS(sys_msync
, 3)
1597 MIPS_SYS(sys_readv
, 3) /* 4145 */
1598 MIPS_SYS(sys_writev
, 3)
1599 MIPS_SYS(sys_cacheflush
, 3)
1600 MIPS_SYS(sys_cachectl
, 3)
1601 MIPS_SYS(sys_sysmips
, 4)
1602 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1603 MIPS_SYS(sys_getsid
, 1)
1604 MIPS_SYS(sys_fdatasync
, 0)
1605 MIPS_SYS(sys_sysctl
, 1)
1606 MIPS_SYS(sys_mlock
, 2)
1607 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1608 MIPS_SYS(sys_mlockall
, 1)
1609 MIPS_SYS(sys_munlockall
, 0)
1610 MIPS_SYS(sys_sched_setparam
, 2)
1611 MIPS_SYS(sys_sched_getparam
, 2)
1612 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1613 MIPS_SYS(sys_sched_getscheduler
, 1)
1614 MIPS_SYS(sys_sched_yield
, 0)
1615 MIPS_SYS(sys_sched_get_priority_max
, 1)
1616 MIPS_SYS(sys_sched_get_priority_min
, 1)
1617 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1618 MIPS_SYS(sys_nanosleep
, 2)
1619 MIPS_SYS(sys_mremap
, 4)
1620 MIPS_SYS(sys_accept
, 3)
1621 MIPS_SYS(sys_bind
, 3)
1622 MIPS_SYS(sys_connect
, 3) /* 4170 */
1623 MIPS_SYS(sys_getpeername
, 3)
1624 MIPS_SYS(sys_getsockname
, 3)
1625 MIPS_SYS(sys_getsockopt
, 5)
1626 MIPS_SYS(sys_listen
, 2)
1627 MIPS_SYS(sys_recv
, 4) /* 4175 */
1628 MIPS_SYS(sys_recvfrom
, 6)
1629 MIPS_SYS(sys_recvmsg
, 3)
1630 MIPS_SYS(sys_send
, 4)
1631 MIPS_SYS(sys_sendmsg
, 3)
1632 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1633 MIPS_SYS(sys_setsockopt
, 5)
1634 MIPS_SYS(sys_shutdown
, 2)
1635 MIPS_SYS(sys_socket
, 3)
1636 MIPS_SYS(sys_socketpair
, 4)
1637 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1638 MIPS_SYS(sys_getresuid
, 3)
1639 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1640 MIPS_SYS(sys_poll
, 3)
1641 MIPS_SYS(sys_nfsservctl
, 3)
1642 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1643 MIPS_SYS(sys_getresgid
, 3)
1644 MIPS_SYS(sys_prctl
, 5)
1645 MIPS_SYS(sys_rt_sigreturn
, 0)
1646 MIPS_SYS(sys_rt_sigaction
, 4)
1647 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1648 MIPS_SYS(sys_rt_sigpending
, 2)
1649 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1650 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1651 MIPS_SYS(sys_rt_sigsuspend
, 0)
1652 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1653 MIPS_SYS(sys_pwrite64
, 6)
1654 MIPS_SYS(sys_chown
, 3)
1655 MIPS_SYS(sys_getcwd
, 2)
1656 MIPS_SYS(sys_capget
, 2)
1657 MIPS_SYS(sys_capset
, 2) /* 4205 */
1658 MIPS_SYS(sys_sigaltstack
, 0)
1659 MIPS_SYS(sys_sendfile
, 4)
1660 MIPS_SYS(sys_ni_syscall
, 0)
1661 MIPS_SYS(sys_ni_syscall
, 0)
1662 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1663 MIPS_SYS(sys_truncate64
, 4)
1664 MIPS_SYS(sys_ftruncate64
, 4)
1665 MIPS_SYS(sys_stat64
, 2)
1666 MIPS_SYS(sys_lstat64
, 2)
1667 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1668 MIPS_SYS(sys_pivot_root
, 2)
1669 MIPS_SYS(sys_mincore
, 3)
1670 MIPS_SYS(sys_madvise
, 3)
1671 MIPS_SYS(sys_getdents64
, 3)
1672 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1673 MIPS_SYS(sys_ni_syscall
, 0)
1674 MIPS_SYS(sys_gettid
, 0)
1675 MIPS_SYS(sys_readahead
, 5)
1676 MIPS_SYS(sys_setxattr
, 5)
1677 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1678 MIPS_SYS(sys_fsetxattr
, 5)
1679 MIPS_SYS(sys_getxattr
, 4)
1680 MIPS_SYS(sys_lgetxattr
, 4)
1681 MIPS_SYS(sys_fgetxattr
, 4)
1682 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1683 MIPS_SYS(sys_llistxattr
, 3)
1684 MIPS_SYS(sys_flistxattr
, 3)
1685 MIPS_SYS(sys_removexattr
, 2)
1686 MIPS_SYS(sys_lremovexattr
, 2)
1687 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1688 MIPS_SYS(sys_tkill
, 2)
1689 MIPS_SYS(sys_sendfile64
, 5)
1690 MIPS_SYS(sys_futex
, 2)
1691 MIPS_SYS(sys_sched_setaffinity
, 3)
1692 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1693 MIPS_SYS(sys_io_setup
, 2)
1694 MIPS_SYS(sys_io_destroy
, 1)
1695 MIPS_SYS(sys_io_getevents
, 5)
1696 MIPS_SYS(sys_io_submit
, 3)
1697 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
1698 MIPS_SYS(sys_exit_group
, 1)
1699 MIPS_SYS(sys_lookup_dcookie
, 3)
1700 MIPS_SYS(sys_epoll_create
, 1)
1701 MIPS_SYS(sys_epoll_ctl
, 4)
1702 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
1703 MIPS_SYS(sys_remap_file_pages
, 5)
1704 MIPS_SYS(sys_set_tid_address
, 1)
1705 MIPS_SYS(sys_restart_syscall
, 0)
1706 MIPS_SYS(sys_fadvise64_64
, 7)
1707 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
1708 MIPS_SYS(sys_fstatfs64
, 2)
1709 MIPS_SYS(sys_timer_create
, 3)
1710 MIPS_SYS(sys_timer_settime
, 4)
1711 MIPS_SYS(sys_timer_gettime
, 2)
1712 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
1713 MIPS_SYS(sys_timer_delete
, 1)
1714 MIPS_SYS(sys_clock_settime
, 2)
1715 MIPS_SYS(sys_clock_gettime
, 2)
1716 MIPS_SYS(sys_clock_getres
, 2)
1717 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
1718 MIPS_SYS(sys_tgkill
, 3)
1719 MIPS_SYS(sys_utimes
, 2)
1720 MIPS_SYS(sys_mbind
, 4)
1721 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
1722 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
1723 MIPS_SYS(sys_mq_open
, 4)
1724 MIPS_SYS(sys_mq_unlink
, 1)
1725 MIPS_SYS(sys_mq_timedsend
, 5)
1726 MIPS_SYS(sys_mq_timedreceive
, 5)
1727 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
1728 MIPS_SYS(sys_mq_getsetattr
, 3)
1729 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
1730 MIPS_SYS(sys_waitid
, 4)
1731 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
1732 MIPS_SYS(sys_add_key
, 5)
1733 MIPS_SYS(sys_request_key
, 4)
1734 MIPS_SYS(sys_keyctl
, 5)
1735 MIPS_SYS(sys_set_thread_area
, 1)
1736 MIPS_SYS(sys_inotify_init
, 0)
1737 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
1738 MIPS_SYS(sys_inotify_rm_watch
, 2)
1739 MIPS_SYS(sys_migrate_pages
, 4)
1740 MIPS_SYS(sys_openat
, 4)
1741 MIPS_SYS(sys_mkdirat
, 3)
1742 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
1743 MIPS_SYS(sys_fchownat
, 5)
1744 MIPS_SYS(sys_futimesat
, 3)
1745 MIPS_SYS(sys_fstatat64
, 4)
1746 MIPS_SYS(sys_unlinkat
, 3)
1747 MIPS_SYS(sys_renameat
, 4) /* 4295 */
1748 MIPS_SYS(sys_linkat
, 5)
1749 MIPS_SYS(sys_symlinkat
, 3)
1750 MIPS_SYS(sys_readlinkat
, 4)
1751 MIPS_SYS(sys_fchmodat
, 3)
1752 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
1753 MIPS_SYS(sys_pselect6
, 6)
1754 MIPS_SYS(sys_ppoll
, 5)
1755 MIPS_SYS(sys_unshare
, 1)
1756 MIPS_SYS(sys_splice
, 4)
1757 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
1758 MIPS_SYS(sys_tee
, 4)
1759 MIPS_SYS(sys_vmsplice
, 4)
1760 MIPS_SYS(sys_move_pages
, 6)
1761 MIPS_SYS(sys_set_robust_list
, 2)
1762 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
1763 MIPS_SYS(sys_kexec_load
, 4)
1764 MIPS_SYS(sys_getcpu
, 3)
1765 MIPS_SYS(sys_epoll_pwait
, 6)
1766 MIPS_SYS(sys_ioprio_set
, 3)
1767 MIPS_SYS(sys_ioprio_get
, 2)
1772 void cpu_loop(CPUMIPSState
*env
)
1774 target_siginfo_t info
;
1776 unsigned int syscall_num
;
1779 trapnr
= cpu_mips_exec(env
);
1782 syscall_num
= env
->gpr
[env
->current_tc
][2] - 4000;
1783 env
->PC
[env
->current_tc
] += 4;
1784 if (syscall_num
>= sizeof(mips_syscall_args
)) {
1789 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
1791 nb_args
= mips_syscall_args
[syscall_num
];
1792 sp_reg
= env
->gpr
[env
->current_tc
][29];
1794 /* these arguments are taken from the stack */
1795 /* FIXME - what to do if get_user() fails? */
1796 case 8: get_user_ual(arg8
, sp_reg
+ 28);
1797 case 7: get_user_ual(arg7
, sp_reg
+ 24);
1798 case 6: get_user_ual(arg6
, sp_reg
+ 20);
1799 case 5: get_user_ual(arg5
, sp_reg
+ 16);
1803 ret
= do_syscall(env
, env
->gpr
[env
->current_tc
][2],
1804 env
->gpr
[env
->current_tc
][4],
1805 env
->gpr
[env
->current_tc
][5],
1806 env
->gpr
[env
->current_tc
][6],
1807 env
->gpr
[env
->current_tc
][7],
1808 arg5
, arg6
/*, arg7, arg8*/);
1810 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
1811 env
->gpr
[env
->current_tc
][7] = 1; /* error flag */
1814 env
->gpr
[env
->current_tc
][7] = 0; /* error flag */
1816 env
->gpr
[env
->current_tc
][2] = ret
;
1822 info
.si_signo
= TARGET_SIGILL
;
1825 queue_signal(env
, info
.si_signo
, &info
);
1827 case EXCP_INTERRUPT
:
1828 /* just indicate that signals should be handled asap */
1834 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1837 info
.si_signo
= sig
;
1839 info
.si_code
= TARGET_TRAP_BRKPT
;
1840 queue_signal(env
, info
.si_signo
, &info
);
1846 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
1848 cpu_dump_state(env
, stderr
, fprintf
, 0);
1851 process_pending_signals(env
);
1857 void cpu_loop (CPUState
*env
)
1860 target_siginfo_t info
;
1863 trapnr
= cpu_sh4_exec (env
);
1867 ret
= do_syscall(env
,
1875 env
->gregs
[0] = ret
;
1878 case EXCP_INTERRUPT
:
1879 /* just indicate that signals should be handled asap */
1885 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1888 info
.si_signo
= sig
;
1890 info
.si_code
= TARGET_TRAP_BRKPT
;
1891 queue_signal(env
, info
.si_signo
, &info
);
1897 info
.si_signo
= SIGSEGV
;
1899 info
.si_code
= TARGET_SEGV_MAPERR
;
1900 info
._sifields
._sigfault
._addr
= env
->tea
;
1901 queue_signal(env
, info
.si_signo
, &info
);
1905 printf ("Unhandled trap: 0x%x\n", trapnr
);
1906 cpu_dump_state(env
, stderr
, fprintf
, 0);
1909 process_pending_signals (env
);
1915 void cpu_loop (CPUState
*env
)
1918 target_siginfo_t info
;
1921 trapnr
= cpu_cris_exec (env
);
1925 info
.si_signo
= SIGSEGV
;
1927 /* XXX: check env->error_code */
1928 info
.si_code
= TARGET_SEGV_MAPERR
;
1929 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
1930 queue_signal(env
, info
.si_signo
, &info
);
1933 case EXCP_INTERRUPT
:
1934 /* just indicate that signals should be handled asap */
1937 ret
= do_syscall(env
,
1945 env
->regs
[10] = ret
;
1952 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1955 info
.si_signo
= sig
;
1957 info
.si_code
= TARGET_TRAP_BRKPT
;
1958 queue_signal(env
, info
.si_signo
, &info
);
1963 printf ("Unhandled trap: 0x%x\n", trapnr
);
1964 cpu_dump_state(env
, stderr
, fprintf
, 0);
1967 process_pending_signals (env
);
1974 void cpu_loop(CPUM68KState
*env
)
1978 target_siginfo_t info
;
1979 TaskState
*ts
= env
->opaque
;
1982 trapnr
= cpu_m68k_exec(env
);
1986 if (ts
->sim_syscalls
) {
1988 nr
= lduw(env
->pc
+ 2);
1990 do_m68k_simcall(env
, nr
);
1996 case EXCP_HALT_INSN
:
1997 /* Semihosing syscall. */
1999 do_m68k_semihosting(env
, env
->dregs
[0]);
2003 case EXCP_UNSUPPORTED
:
2005 info
.si_signo
= SIGILL
;
2007 info
.si_code
= TARGET_ILL_ILLOPN
;
2008 info
._sifields
._sigfault
._addr
= env
->pc
;
2009 queue_signal(env
, info
.si_signo
, &info
);
2013 ts
->sim_syscalls
= 0;
2016 env
->dregs
[0] = do_syscall(env
,
2026 case EXCP_INTERRUPT
:
2027 /* just indicate that signals should be handled asap */
2031 info
.si_signo
= SIGSEGV
;
2033 /* XXX: check env->error_code */
2034 info
.si_code
= TARGET_SEGV_MAPERR
;
2035 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2036 queue_signal(env
, info
.si_signo
, &info
);
2043 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2046 info
.si_signo
= sig
;
2048 info
.si_code
= TARGET_TRAP_BRKPT
;
2049 queue_signal(env
, info
.si_signo
, &info
);
2054 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2056 cpu_dump_state(env
, stderr
, fprintf
, 0);
2059 process_pending_signals(env
);
2062 #endif /* TARGET_M68K */
2065 void cpu_loop (CPUState
*env
)
2068 target_siginfo_t info
;
2071 trapnr
= cpu_alpha_exec (env
);
2075 fprintf(stderr
, "Reset requested. Exit\n");
2079 fprintf(stderr
, "Machine check exception. Exit\n");
2083 fprintf(stderr
, "Arithmetic trap.\n");
2086 case EXCP_HW_INTERRUPT
:
2087 fprintf(stderr
, "External interrupt. Exit\n");
2091 fprintf(stderr
, "MMU data fault\n");
2094 case EXCP_DTB_MISS_PAL
:
2095 fprintf(stderr
, "MMU data TLB miss in PALcode\n");
2099 fprintf(stderr
, "MMU instruction TLB miss\n");
2103 fprintf(stderr
, "MMU instruction access violation\n");
2106 case EXCP_DTB_MISS_NATIVE
:
2107 fprintf(stderr
, "MMU data TLB miss\n");
2111 fprintf(stderr
, "Unaligned access\n");
2115 fprintf(stderr
, "Invalid instruction\n");
2119 fprintf(stderr
, "Floating-point not allowed\n");
2122 case EXCP_CALL_PAL
... (EXCP_CALL_PALP
- 1):
2123 fprintf(stderr
, "Call to PALcode\n");
2124 call_pal(env
, (trapnr
>> 6) | 0x80);
2126 case EXCP_CALL_PALP
... (EXCP_CALL_PALE
- 1):
2127 fprintf(stderr
, "Privileged call to PALcode\n");
2134 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2137 info
.si_signo
= sig
;
2139 info
.si_code
= TARGET_TRAP_BRKPT
;
2140 queue_signal(env
, info
.si_signo
, &info
);
2145 printf ("Unhandled trap: 0x%x\n", trapnr
);
2146 cpu_dump_state(env
, stderr
, fprintf
, 0);
2149 process_pending_signals (env
);
2152 #endif /* TARGET_ALPHA */
2156 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION
", Copyright (c) 2003-2008 Fabrice Bellard\n"
2157 "usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
2158 "Linux CPU emulator (compiled for %s emulation)\n"
2160 "Standard options:\n"
2161 "-h print this help\n"
2162 "-g port wait gdb connection to port\n"
2163 "-L path set the elf interpreter prefix (default=%s)\n"
2164 "-s size set the stack size in bytes (default=%ld)\n"
2165 "-cpu model select CPU (-cpu ? for list)\n"
2166 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2169 "-d options activate log (logfile=%s)\n"
2170 "-p pagesize set the host page size to 'pagesize'\n"
2171 "-strace log system calls\n"
2173 "Environment variables:\n"
2174 "QEMU_STRACE Print system calls and arguments similar to the\n"
2175 " 'strace' program. Enable by setting to any value.\n"
2184 THREAD CPUState
*thread_env
;
2186 /* Assumes contents are already zeroed. */
2187 void init_task_state(TaskState
*ts
)
2192 ts
->first_free
= ts
->sigqueue_table
;
2193 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
2194 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
2196 ts
->sigqueue_table
[i
].next
= NULL
;
2199 int main(int argc
, char **argv
)
2201 const char *filename
;
2202 const char *cpu_model
;
2203 struct target_pt_regs regs1
, *regs
= ®s1
;
2204 struct image_info info1
, *info
= &info1
;
2205 TaskState ts1
, *ts
= &ts1
;
2209 int gdbstub_port
= 0;
2210 int drop_ld_preload
= 0, environ_count
= 0;
2211 char **target_environ
, **wrk
, **dst
;
2217 cpu_set_log_filename(DEBUG_LOGFILE
);
2229 if (!strcmp(r
, "-")) {
2231 } else if (!strcmp(r
, "d")) {
2239 mask
= cpu_str_to_log_mask(r
);
2241 printf("Log items (comma separated):\n");
2242 for(item
= cpu_log_items
; item
->mask
!= 0; item
++) {
2243 printf("%-10s %s\n", item
->name
, item
->help
);
2248 } else if (!strcmp(r
, "s")) {
2250 x86_stack_size
= strtol(r
, (char **)&r
, 0);
2251 if (x86_stack_size
<= 0)
2254 x86_stack_size
*= 1024 * 1024;
2255 else if (*r
== 'k' || *r
== 'K')
2256 x86_stack_size
*= 1024;
2257 } else if (!strcmp(r
, "L")) {
2258 interp_prefix
= argv
[optind
++];
2259 } else if (!strcmp(r
, "p")) {
2260 qemu_host_page_size
= atoi(argv
[optind
++]);
2261 if (qemu_host_page_size
== 0 ||
2262 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
2263 fprintf(stderr
, "page size must be a power of two\n");
2266 } else if (!strcmp(r
, "g")) {
2267 gdbstub_port
= atoi(argv
[optind
++]);
2268 } else if (!strcmp(r
, "r")) {
2269 qemu_uname_release
= argv
[optind
++];
2270 } else if (!strcmp(r
, "cpu")) {
2271 cpu_model
= argv
[optind
++];
2272 if (strcmp(cpu_model
, "?") == 0) {
2273 /* XXX: implement xxx_cpu_list for targets that still miss it */
2274 #if defined(cpu_list)
2275 cpu_list(stdout
, &fprintf
);
2279 } else if (!strcmp(r
, "drop-ld-preload")) {
2280 drop_ld_preload
= 1;
2281 } else if (!strcmp(r
, "strace")) {
2290 filename
= argv
[optind
];
2293 memset(regs
, 0, sizeof(struct target_pt_regs
));
2295 /* Zero out image_info */
2296 memset(info
, 0, sizeof(struct image_info
));
2298 /* Scan interp_prefix dir for replacement files. */
2299 init_paths(interp_prefix
);
2301 if (cpu_model
== NULL
) {
2302 #if defined(TARGET_I386)
2303 #ifdef TARGET_X86_64
2304 cpu_model
= "qemu64";
2306 cpu_model
= "qemu32";
2308 #elif defined(TARGET_ARM)
2309 cpu_model
= "arm926";
2310 #elif defined(TARGET_M68K)
2312 #elif defined(TARGET_SPARC)
2313 #ifdef TARGET_SPARC64
2314 cpu_model
= "TI UltraSparc II";
2316 cpu_model
= "Fujitsu MB86904";
2318 #elif defined(TARGET_MIPS)
2319 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2324 #elif defined(TARGET_PPC)
2334 cpu_exec_init_all(0);
2335 /* NOTE: we need to init the CPU at this stage to get
2336 qemu_host_page_size */
2337 env
= cpu_init(cpu_model
);
2339 fprintf(stderr
, "Unable to find CPU definition\n");
2344 if (getenv("QEMU_STRACE")) {
2352 target_environ
= malloc((environ_count
+ 1) * sizeof(char *));
2353 if (!target_environ
)
2355 for (wrk
= environ
, dst
= target_environ
; *wrk
; wrk
++) {
2356 if (drop_ld_preload
&& !strncmp(*wrk
, "LD_PRELOAD=", 11))
2358 *(dst
++) = strdup(*wrk
);
2360 *dst
= NULL
; /* NULL terminate target_environ */
2362 if (loader_exec(filename
, argv
+optind
, target_environ
, regs
, info
) != 0) {
2363 printf("Error loading %s\n", filename
);
2367 for (wrk
= target_environ
; *wrk
; wrk
++) {
2371 free(target_environ
);
2376 fprintf(logfile
, "start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
2377 fprintf(logfile
, "end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
2378 fprintf(logfile
, "start_code 0x" TARGET_ABI_FMT_lx
"\n",
2380 fprintf(logfile
, "start_data 0x" TARGET_ABI_FMT_lx
"\n",
2382 fprintf(logfile
, "end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
2383 fprintf(logfile
, "start_stack 0x" TARGET_ABI_FMT_lx
"\n",
2385 fprintf(logfile
, "brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
2386 fprintf(logfile
, "entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
2389 target_set_brk(info
->brk
);
2393 /* build Task State */
2394 memset(ts
, 0, sizeof(TaskState
));
2395 init_task_state(ts
);
2398 env
->user_mode_only
= 1;
2400 #if defined(TARGET_I386)
2401 cpu_x86_set_cpl(env
, 3);
2403 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
2404 env
->hflags
|= HF_PE_MASK
;
2405 if (env
->cpuid_features
& CPUID_SSE
) {
2406 env
->cr
[4] |= CR4_OSFXSR_MASK
;
2407 env
->hflags
|= HF_OSFXSR_MASK
;
2409 #ifndef TARGET_ABI32
2410 /* enable 64 bit mode if possible */
2411 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
2412 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
2415 env
->cr
[4] |= CR4_PAE_MASK
;
2416 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
2417 env
->hflags
|= HF_LMA_MASK
;
2420 /* flags setup : we activate the IRQs by default as in user mode */
2421 env
->eflags
|= IF_MASK
;
2423 /* linux register setup */
2424 #ifndef TARGET_ABI32
2425 env
->regs
[R_EAX
] = regs
->rax
;
2426 env
->regs
[R_EBX
] = regs
->rbx
;
2427 env
->regs
[R_ECX
] = regs
->rcx
;
2428 env
->regs
[R_EDX
] = regs
->rdx
;
2429 env
->regs
[R_ESI
] = regs
->rsi
;
2430 env
->regs
[R_EDI
] = regs
->rdi
;
2431 env
->regs
[R_EBP
] = regs
->rbp
;
2432 env
->regs
[R_ESP
] = regs
->rsp
;
2433 env
->eip
= regs
->rip
;
2435 env
->regs
[R_EAX
] = regs
->eax
;
2436 env
->regs
[R_EBX
] = regs
->ebx
;
2437 env
->regs
[R_ECX
] = regs
->ecx
;
2438 env
->regs
[R_EDX
] = regs
->edx
;
2439 env
->regs
[R_ESI
] = regs
->esi
;
2440 env
->regs
[R_EDI
] = regs
->edi
;
2441 env
->regs
[R_EBP
] = regs
->ebp
;
2442 env
->regs
[R_ESP
] = regs
->esp
;
2443 env
->eip
= regs
->eip
;
2446 /* linux interrupt setup */
2447 env
->idt
.base
= h2g(idt_table
);
2448 env
->idt
.limit
= sizeof(idt_table
) - 1;
2471 /* linux segment setup */
2473 uint64_t *gdt_table
;
2474 gdt_table
= qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES
);
2475 env
->gdt
.base
= h2g((unsigned long)gdt_table
);
2476 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
2478 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2479 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2480 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2482 /* 64 bit code segment */
2483 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2484 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2486 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2488 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
2489 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2490 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
2492 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
2493 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
2495 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
2496 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
2497 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
2498 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
2499 /* This hack makes Wine work... */
2500 env
->segs
[R_FS
].selector
= 0;
2502 cpu_x86_load_seg(env
, R_DS
, 0);
2503 cpu_x86_load_seg(env
, R_ES
, 0);
2504 cpu_x86_load_seg(env
, R_FS
, 0);
2505 cpu_x86_load_seg(env
, R_GS
, 0);
2507 #elif defined(TARGET_ARM)
2510 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
2511 for(i
= 0; i
< 16; i
++) {
2512 env
->regs
[i
] = regs
->uregs
[i
];
2515 #elif defined(TARGET_SPARC)
2519 env
->npc
= regs
->npc
;
2521 for(i
= 0; i
< 8; i
++)
2522 env
->gregs
[i
] = regs
->u_regs
[i
];
2523 for(i
= 0; i
< 8; i
++)
2524 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
2526 #elif defined(TARGET_PPC)
2530 #if defined(TARGET_PPC64)
2531 #if defined(TARGET_ABI32)
2532 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
2534 env
->msr
|= (target_ulong
)1 << MSR_SF
;
2537 env
->nip
= regs
->nip
;
2538 for(i
= 0; i
< 32; i
++) {
2539 env
->gpr
[i
] = regs
->gpr
[i
];
2542 #elif defined(TARGET_M68K)
2545 env
->dregs
[0] = regs
->d0
;
2546 env
->dregs
[1] = regs
->d1
;
2547 env
->dregs
[2] = regs
->d2
;
2548 env
->dregs
[3] = regs
->d3
;
2549 env
->dregs
[4] = regs
->d4
;
2550 env
->dregs
[5] = regs
->d5
;
2551 env
->dregs
[6] = regs
->d6
;
2552 env
->dregs
[7] = regs
->d7
;
2553 env
->aregs
[0] = regs
->a0
;
2554 env
->aregs
[1] = regs
->a1
;
2555 env
->aregs
[2] = regs
->a2
;
2556 env
->aregs
[3] = regs
->a3
;
2557 env
->aregs
[4] = regs
->a4
;
2558 env
->aregs
[5] = regs
->a5
;
2559 env
->aregs
[6] = regs
->a6
;
2560 env
->aregs
[7] = regs
->usp
;
2562 ts
->sim_syscalls
= 1;
2564 #elif defined(TARGET_MIPS)
2568 for(i
= 0; i
< 32; i
++) {
2569 env
->gpr
[env
->current_tc
][i
] = regs
->regs
[i
];
2571 env
->PC
[env
->current_tc
] = regs
->cp0_epc
;
2573 #elif defined(TARGET_SH4)
2577 for(i
= 0; i
< 16; i
++) {
2578 env
->gregs
[i
] = regs
->regs
[i
];
2582 #elif defined(TARGET_ALPHA)
2586 for(i
= 0; i
< 28; i
++) {
2587 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
2589 env
->ipr
[IPR_USP
] = regs
->usp
;
2590 env
->ir
[30] = regs
->usp
;
2592 env
->unique
= regs
->unique
;
2594 #elif defined(TARGET_CRIS)
2596 env
->regs
[0] = regs
->r0
;
2597 env
->regs
[1] = regs
->r1
;
2598 env
->regs
[2] = regs
->r2
;
2599 env
->regs
[3] = regs
->r3
;
2600 env
->regs
[4] = regs
->r4
;
2601 env
->regs
[5] = regs
->r5
;
2602 env
->regs
[6] = regs
->r6
;
2603 env
->regs
[7] = regs
->r7
;
2604 env
->regs
[8] = regs
->r8
;
2605 env
->regs
[9] = regs
->r9
;
2606 env
->regs
[10] = regs
->r10
;
2607 env
->regs
[11] = regs
->r11
;
2608 env
->regs
[12] = regs
->r12
;
2609 env
->regs
[13] = regs
->r13
;
2610 env
->regs
[14] = info
->start_stack
;
2611 env
->regs
[15] = regs
->acr
;
2612 env
->pc
= regs
->erp
;
2615 #error unsupported target CPU
2618 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2619 ts
->stack_base
= info
->start_stack
;
2620 ts
->heap_base
= info
->brk
;
2621 /* This will be filled in on the first SYS_HEAPINFO call. */
2626 gdbserver_start (gdbstub_port
);
2627 gdb_handlesig(env
, 0);