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Add vrl{b,h,w} instructions.
[qemu/qemu-JZ.git] / linux-user / main.c
blob238165f454b224a0ba45c9112b47d229bedafb10
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26 #include <sys/mman.h>
27
28 #include "qemu.h"
29 #include "qemu-common.h"
30 #include "cache-utils.h"
31 /* For tb_lock */
32 #include "exec-all.h"
33
34 #define DEBUG_LOGFILE "/tmp/qemu.log"
35
36 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
37 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
38
39 #if defined(__i386__) && !defined(CONFIG_STATIC)
40 /* Force usage of an ELF interpreter even if it is an ELF shared
41 object ! */
42 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
43 #endif
44
45 /* for recent libc, we add these dummy symbols which are not declared
46 when generating a linked object (bug in ld ?) */
47 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
48 asm(".globl __preinit_array_start\n"
49 ".globl __preinit_array_end\n"
50 ".globl __init_array_start\n"
51 ".globl __init_array_end\n"
52 ".globl __fini_array_start\n"
53 ".globl __fini_array_end\n"
54 ".section \".rodata\"\n"
55 "__preinit_array_start:\n"
56 "__preinit_array_end:\n"
57 "__init_array_start:\n"
58 "__init_array_end:\n"
59 "__fini_array_start:\n"
60 "__fini_array_end:\n"
61 ".long 0\n"
62 ".previous\n");
63 #endif
64
65 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
66 we allocate a bigger stack. Need a better solution, for example
67 by remapping the process stack directly at the right place */
68 unsigned long x86_stack_size = 512 * 1024;
69
70 void gemu_log(const char *fmt, ...)
71 {
72 va_list ap;
73
74 va_start(ap, fmt);
75 vfprintf(stderr, fmt, ap);
76 va_end(ap);
77 }
78
79 void cpu_outb(CPUState *env, int addr, int val)
80 {
81 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
82 }
83
84 void cpu_outw(CPUState *env, int addr, int val)
85 {
86 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
87 }
88
89 void cpu_outl(CPUState *env, int addr, int val)
90 {
91 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
92 }
93
94 int cpu_inb(CPUState *env, int addr)
95 {
96 fprintf(stderr, "inb: port=0x%04x\n", addr);
97 return 0;
98 }
99
100 int cpu_inw(CPUState *env, int addr)
101 {
102 fprintf(stderr, "inw: port=0x%04x\n", addr);
103 return 0;
104 }
105
106 int cpu_inl(CPUState *env, int addr)
107 {
108 fprintf(stderr, "inl: port=0x%04x\n", addr);
109 return 0;
110 }
111
112 #if defined(TARGET_I386)
113 int cpu_get_pic_interrupt(CPUState *env)
114 {
115 return -1;
116 }
117 #endif
118
119 /* timers for rdtsc */
120
121 #if 0
122
123 static uint64_t emu_time;
124
125 int64_t cpu_get_real_ticks(void)
126 {
127 return emu_time++;
128 }
129
130 #endif
131
132 #if defined(USE_NPTL)
133 /***********************************************************/
134 /* Helper routines for implementing atomic operations. */
135
136 /* To implement exclusive operations we force all cpus to syncronise.
137 We don't require a full sync, only that no cpus are executing guest code.
138 The alternative is to map target atomic ops onto host equivalents,
139 which requires quite a lot of per host/target work. */
140 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
141 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
142 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
143 static int pending_cpus;
144
145 /* Make sure everything is in a consistent state for calling fork(). */
146 void fork_start(void)
147 {
148 mmap_fork_start();
149 pthread_mutex_lock(&tb_lock);
150 pthread_mutex_lock(&exclusive_lock);
151 }
152
153 void fork_end(int child)
154 {
155 if (child) {
156 /* Child processes created by fork() only have a single thread.
157 Discard information about the parent threads. */
158 first_cpu = thread_env;
159 thread_env->next_cpu = NULL;
160 pending_cpus = 0;
161 pthread_mutex_init(&exclusive_lock, NULL);
162 pthread_cond_init(&exclusive_cond, NULL);
163 pthread_cond_init(&exclusive_resume, NULL);
164 pthread_mutex_init(&tb_lock, NULL);
165 gdbserver_fork(thread_env);
166 } else {
167 pthread_mutex_unlock(&exclusive_lock);
168 pthread_mutex_unlock(&tb_lock);
169 }
170 mmap_fork_end(child);
171 }
172
173 /* Wait for pending exclusive operations to complete. The exclusive lock
174 must be held. */
175 static inline void exclusive_idle(void)
176 {
177 while (pending_cpus) {
178 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
179 }
180 }
181
182 /* Start an exclusive operation.
183 Must only be called from outside cpu_arm_exec. */
184 static inline void start_exclusive(void)
185 {
186 CPUState *other;
187 pthread_mutex_lock(&exclusive_lock);
188 exclusive_idle();
189
190 pending_cpus = 1;
191 /* Make all other cpus stop executing. */
192 for (other = first_cpu; other; other = other->next_cpu) {
193 if (other->running) {
194 pending_cpus++;
195 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
196 }
197 }
198 if (pending_cpus > 1) {
199 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
200 }
201 }
202
203 /* Finish an exclusive operation. */
204 static inline void end_exclusive(void)
205 {
206 pending_cpus = 0;
207 pthread_cond_broadcast(&exclusive_resume);
208 pthread_mutex_unlock(&exclusive_lock);
209 }
210
211 /* Wait for exclusive ops to finish, and begin cpu execution. */
212 static inline void cpu_exec_start(CPUState *env)
213 {
214 pthread_mutex_lock(&exclusive_lock);
215 exclusive_idle();
216 env->running = 1;
217 pthread_mutex_unlock(&exclusive_lock);
218 }
219
220 /* Mark cpu as not executing, and release pending exclusive ops. */
221 static inline void cpu_exec_end(CPUState *env)
222 {
223 pthread_mutex_lock(&exclusive_lock);
224 env->running = 0;
225 if (pending_cpus > 1) {
226 pending_cpus--;
227 if (pending_cpus == 1) {
228 pthread_cond_signal(&exclusive_cond);
229 }
230 }
231 exclusive_idle();
232 pthread_mutex_unlock(&exclusive_lock);
233 }
234 #else /* if !USE_NPTL */
235 /* These are no-ops because we are not threadsafe. */
236 static inline void cpu_exec_start(CPUState *env)
237 {
238 }
239
240 static inline void cpu_exec_end(CPUState *env)
241 {
242 }
243
244 static inline void start_exclusive(void)
245 {
246 }
247
248 static inline void end_exclusive(void)
249 {
250 }
251
252 void fork_start(void)
253 {
254 }
255
256 void fork_end(int child)
257 {
258 if (child) {
259 gdbserver_fork(thread_env);
260 }
261 }
262 #endif
263
264
265 #ifdef TARGET_I386
266 /***********************************************************/
267 /* CPUX86 core interface */
268
269 void cpu_smm_update(CPUState *env)
270 {
271 }
272
273 uint64_t cpu_get_tsc(CPUX86State *env)
274 {
275 return cpu_get_real_ticks();
276 }
277
278 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
279 int flags)
280 {
281 unsigned int e1, e2;
282 uint32_t *p;
283 e1 = (addr << 16) | (limit & 0xffff);
284 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
285 e2 |= flags;
286 p = ptr;
287 p[0] = tswap32(e1);
288 p[1] = tswap32(e2);
289 }
290
291 static uint64_t *idt_table;
292 #ifdef TARGET_X86_64
293 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
294 uint64_t addr, unsigned int sel)
295 {
296 uint32_t *p, e1, e2;
297 e1 = (addr & 0xffff) | (sel << 16);
298 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
299 p = ptr;
300 p[0] = tswap32(e1);
301 p[1] = tswap32(e2);
302 p[2] = tswap32(addr >> 32);
303 p[3] = 0;
304 }
305 /* only dpl matters as we do only user space emulation */
306 static void set_idt(int n, unsigned int dpl)
307 {
308 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
309 }
310 #else
311 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
312 uint32_t addr, unsigned int sel)
313 {
314 uint32_t *p, e1, e2;
315 e1 = (addr & 0xffff) | (sel << 16);
316 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
317 p = ptr;
318 p[0] = tswap32(e1);
319 p[1] = tswap32(e2);
320 }
321
322 /* only dpl matters as we do only user space emulation */
323 static void set_idt(int n, unsigned int dpl)
324 {
325 set_gate(idt_table + n, 0, dpl, 0, 0);
326 }
327 #endif
328
329 void cpu_loop(CPUX86State *env)
330 {
331 int trapnr;
332 abi_ulong pc;
333 target_siginfo_t info;
334
335 for(;;) {
336 trapnr = cpu_x86_exec(env);
337 switch(trapnr) {
338 case 0x80:
339 /* linux syscall from int $0x80 */
340 env->regs[R_EAX] = do_syscall(env,
341 env->regs[R_EAX],
342 env->regs[R_EBX],
343 env->regs[R_ECX],
344 env->regs[R_EDX],
345 env->regs[R_ESI],
346 env->regs[R_EDI],
347 env->regs[R_EBP]);
348 break;
349 #ifndef TARGET_ABI32
350 case EXCP_SYSCALL:
351 /* linux syscall from syscall intruction */
352 env->regs[R_EAX] = do_syscall(env,
353 env->regs[R_EAX],
354 env->regs[R_EDI],
355 env->regs[R_ESI],
356 env->regs[R_EDX],
357 env->regs[10],
358 env->regs[8],
359 env->regs[9]);
360 env->eip = env->exception_next_eip;
361 break;
362 #endif
363 case EXCP0B_NOSEG:
364 case EXCP0C_STACK:
365 info.si_signo = SIGBUS;
366 info.si_errno = 0;
367 info.si_code = TARGET_SI_KERNEL;
368 info._sifields._sigfault._addr = 0;
369 queue_signal(env, info.si_signo, &info);
370 break;
371 case EXCP0D_GPF:
372 /* XXX: potential problem if ABI32 */
373 #ifndef TARGET_X86_64
374 if (env->eflags & VM_MASK) {
375 handle_vm86_fault(env);
376 } else
377 #endif
378 {
379 info.si_signo = SIGSEGV;
380 info.si_errno = 0;
381 info.si_code = TARGET_SI_KERNEL;
382 info._sifields._sigfault._addr = 0;
383 queue_signal(env, info.si_signo, &info);
384 }
385 break;
386 case EXCP0E_PAGE:
387 info.si_signo = SIGSEGV;
388 info.si_errno = 0;
389 if (!(env->error_code & 1))
390 info.si_code = TARGET_SEGV_MAPERR;
391 else
392 info.si_code = TARGET_SEGV_ACCERR;
393 info._sifields._sigfault._addr = env->cr[2];
394 queue_signal(env, info.si_signo, &info);
395 break;
396 case EXCP00_DIVZ:
397 #ifndef TARGET_X86_64
398 if (env->eflags & VM_MASK) {
399 handle_vm86_trap(env, trapnr);
400 } else
401 #endif
402 {
403 /* division by zero */
404 info.si_signo = SIGFPE;
405 info.si_errno = 0;
406 info.si_code = TARGET_FPE_INTDIV;
407 info._sifields._sigfault._addr = env->eip;
408 queue_signal(env, info.si_signo, &info);
409 }
410 break;
411 case EXCP01_DB:
412 case EXCP03_INT3:
413 #ifndef TARGET_X86_64
414 if (env->eflags & VM_MASK) {
415 handle_vm86_trap(env, trapnr);
416 } else
417 #endif
418 {
419 info.si_signo = SIGTRAP;
420 info.si_errno = 0;
421 if (trapnr == EXCP01_DB) {
422 info.si_code = TARGET_TRAP_BRKPT;
423 info._sifields._sigfault._addr = env->eip;
424 } else {
425 info.si_code = TARGET_SI_KERNEL;
426 info._sifields._sigfault._addr = 0;
427 }
428 queue_signal(env, info.si_signo, &info);
429 }
430 break;
431 case EXCP04_INTO:
432 case EXCP05_BOUND:
433 #ifndef TARGET_X86_64
434 if (env->eflags & VM_MASK) {
435 handle_vm86_trap(env, trapnr);
436 } else
437 #endif
438 {
439 info.si_signo = SIGSEGV;
440 info.si_errno = 0;
441 info.si_code = TARGET_SI_KERNEL;
442 info._sifields._sigfault._addr = 0;
443 queue_signal(env, info.si_signo, &info);
444 }
445 break;
446 case EXCP06_ILLOP:
447 info.si_signo = SIGILL;
448 info.si_errno = 0;
449 info.si_code = TARGET_ILL_ILLOPN;
450 info._sifields._sigfault._addr = env->eip;
451 queue_signal(env, info.si_signo, &info);
452 break;
453 case EXCP_INTERRUPT:
454 /* just indicate that signals should be handled asap */
455 break;
456 case EXCP_DEBUG:
457 {
458 int sig;
459
460 sig = gdb_handlesig (env, TARGET_SIGTRAP);
461 if (sig)
462 {
463 info.si_signo = sig;
464 info.si_errno = 0;
465 info.si_code = TARGET_TRAP_BRKPT;
466 queue_signal(env, info.si_signo, &info);
467 }
468 }
469 break;
470 default:
471 pc = env->segs[R_CS].base + env->eip;
472 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
473 (long)pc, trapnr);
474 abort();
475 }
476 process_pending_signals(env);
477 }
478 }
479 #endif
480
481 #ifdef TARGET_ARM
482
483 static void arm_cache_flush(abi_ulong start, abi_ulong last)
484 {
485 abi_ulong addr, last1;
486
487 if (last < start)
488 return;
489 addr = start;
490 for(;;) {
491 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
492 if (last1 > last)
493 last1 = last;
494 tb_invalidate_page_range(addr, last1 + 1);
495 if (last1 == last)
496 break;
497 addr = last1 + 1;
498 }
499 }
500
501 /* Handle a jump to the kernel code page. */
502 static int
503 do_kernel_trap(CPUARMState *env)
504 {
505 uint32_t addr;
506 uint32_t cpsr;
507 uint32_t val;
508
509 switch (env->regs[15]) {
510 case 0xffff0fa0: /* __kernel_memory_barrier */
511 /* ??? No-op. Will need to do better for SMP. */
512 break;
513 case 0xffff0fc0: /* __kernel_cmpxchg */
514 /* XXX: This only works between threads, not between processes.
515 It's probably possible to implement this with native host
516 operations. However things like ldrex/strex are much harder so
517 there's not much point trying. */
518 start_exclusive();
519 cpsr = cpsr_read(env);
520 addr = env->regs[2];
521 /* FIXME: This should SEGV if the access fails. */
522 if (get_user_u32(val, addr))
523 val = ~env->regs[0];
524 if (val == env->regs[0]) {
525 val = env->regs[1];
526 /* FIXME: Check for segfaults. */
527 put_user_u32(val, addr);
528 env->regs[0] = 0;
529 cpsr |= CPSR_C;
530 } else {
531 env->regs[0] = -1;
532 cpsr &= ~CPSR_C;
533 }
534 cpsr_write(env, cpsr, CPSR_C);
535 end_exclusive();
536 break;
537 case 0xffff0fe0: /* __kernel_get_tls */
538 env->regs[0] = env->cp15.c13_tls2;
539 break;
540 default:
541 return 1;
542 }
543 /* Jump back to the caller. */
544 addr = env->regs[14];
545 if (addr & 1) {
546 env->thumb = 1;
547 addr &= ~1;
548 }
549 env->regs[15] = addr;
550
551 return 0;
552 }
553
554 void cpu_loop(CPUARMState *env)
555 {
556 int trapnr;
557 unsigned int n, insn;
558 target_siginfo_t info;
559 uint32_t addr;
560
561 for(;;) {
562 cpu_exec_start(env);
563 trapnr = cpu_arm_exec(env);
564 cpu_exec_end(env);
565 switch(trapnr) {
566 case EXCP_UDEF:
567 {
568 TaskState *ts = env->opaque;
569 uint32_t opcode;
570 int rc;
571
572 /* we handle the FPU emulation here, as Linux */
573 /* we get the opcode */
574 /* FIXME - what to do if get_user() fails? */
575 get_user_u32(opcode, env->regs[15]);
576
577 rc = EmulateAll(opcode, &ts->fpa, env);
578 if (rc == 0) { /* illegal instruction */
579 info.si_signo = SIGILL;
580 info.si_errno = 0;
581 info.si_code = TARGET_ILL_ILLOPN;
582 info._sifields._sigfault._addr = env->regs[15];
583 queue_signal(env, info.si_signo, &info);
584 } else if (rc < 0) { /* FP exception */
585 int arm_fpe=0;
586
587 /* translate softfloat flags to FPSR flags */
588 if (-rc & float_flag_invalid)
589 arm_fpe |= BIT_IOC;
590 if (-rc & float_flag_divbyzero)
591 arm_fpe |= BIT_DZC;
592 if (-rc & float_flag_overflow)
593 arm_fpe |= BIT_OFC;
594 if (-rc & float_flag_underflow)
595 arm_fpe |= BIT_UFC;
596 if (-rc & float_flag_inexact)
597 arm_fpe |= BIT_IXC;
598
599 FPSR fpsr = ts->fpa.fpsr;
600 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
601
602 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
603 info.si_signo = SIGFPE;
604 info.si_errno = 0;
605
606 /* ordered by priority, least first */
607 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
608 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
609 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
610 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
611 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
612
613 info._sifields._sigfault._addr = env->regs[15];
614 queue_signal(env, info.si_signo, &info);
615 } else {
616 env->regs[15] += 4;
617 }
618
619 /* accumulate unenabled exceptions */
620 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
621 fpsr |= BIT_IXC;
622 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
623 fpsr |= BIT_UFC;
624 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
625 fpsr |= BIT_OFC;
626 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
627 fpsr |= BIT_DZC;
628 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
629 fpsr |= BIT_IOC;
630 ts->fpa.fpsr=fpsr;
631 } else { /* everything OK */
632 /* increment PC */
633 env->regs[15] += 4;
634 }
635 }
636 break;
637 case EXCP_SWI:
638 case EXCP_BKPT:
639 {
640 env->eabi = 1;
641 /* system call */
642 if (trapnr == EXCP_BKPT) {
643 if (env->thumb) {
644 /* FIXME - what to do if get_user() fails? */
645 get_user_u16(insn, env->regs[15]);
646 n = insn & 0xff;
647 env->regs[15] += 2;
648 } else {
649 /* FIXME - what to do if get_user() fails? */
650 get_user_u32(insn, env->regs[15]);
651 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
652 env->regs[15] += 4;
653 }
654 } else {
655 if (env->thumb) {
656 /* FIXME - what to do if get_user() fails? */
657 get_user_u16(insn, env->regs[15] - 2);
658 n = insn & 0xff;
659 } else {
660 /* FIXME - what to do if get_user() fails? */
661 get_user_u32(insn, env->regs[15] - 4);
662 n = insn & 0xffffff;
663 }
664 }
665
666 if (n == ARM_NR_cacheflush) {
667 arm_cache_flush(env->regs[0], env->regs[1]);
668 } else if (n == ARM_NR_semihosting
669 || n == ARM_NR_thumb_semihosting) {
670 env->regs[0] = do_arm_semihosting (env);
671 } else if (n == 0 || n >= ARM_SYSCALL_BASE
672 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
673 /* linux syscall */
674 if (env->thumb || n == 0) {
675 n = env->regs[7];
676 } else {
677 n -= ARM_SYSCALL_BASE;
678 env->eabi = 0;
679 }
680 if ( n > ARM_NR_BASE) {
681 switch (n) {
682 case ARM_NR_cacheflush:
683 arm_cache_flush(env->regs[0], env->regs[1]);
684 break;
685 case ARM_NR_set_tls:
686 cpu_set_tls(env, env->regs[0]);
687 env->regs[0] = 0;
688 break;
689 default:
690 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
691 n);
692 env->regs[0] = -TARGET_ENOSYS;
693 break;
694 }
695 } else {
696 env->regs[0] = do_syscall(env,
697 n,
698 env->regs[0],
699 env->regs[1],
700 env->regs[2],
701 env->regs[3],
702 env->regs[4],
703 env->regs[5]);
704 }
705 } else {
706 goto error;
707 }
708 }
709 break;
710 case EXCP_INTERRUPT:
711 /* just indicate that signals should be handled asap */
712 break;
713 case EXCP_PREFETCH_ABORT:
714 addr = env->cp15.c6_insn;
715 goto do_segv;
716 case EXCP_DATA_ABORT:
717 addr = env->cp15.c6_data;
718 goto do_segv;
719 do_segv:
720 {
721 info.si_signo = SIGSEGV;
722 info.si_errno = 0;
723 /* XXX: check env->error_code */
724 info.si_code = TARGET_SEGV_MAPERR;
725 info._sifields._sigfault._addr = addr;
726 queue_signal(env, info.si_signo, &info);
727 }
728 break;
729 case EXCP_DEBUG:
730 {
731 int sig;
732
733 sig = gdb_handlesig (env, TARGET_SIGTRAP);
734 if (sig)
735 {
736 info.si_signo = sig;
737 info.si_errno = 0;
738 info.si_code = TARGET_TRAP_BRKPT;
739 queue_signal(env, info.si_signo, &info);
740 }
741 }
742 break;
743 case EXCP_KERNEL_TRAP:
744 if (do_kernel_trap(env))
745 goto error;
746 break;
747 default:
748 error:
749 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
750 trapnr);
751 cpu_dump_state(env, stderr, fprintf, 0);
752 abort();
753 }
754 process_pending_signals(env);
755 }
756 }
757
758 #endif
759
760 #ifdef TARGET_SPARC
761 #define SPARC64_STACK_BIAS 2047
762
763 //#define DEBUG_WIN
764
765 /* WARNING: dealing with register windows _is_ complicated. More info
766 can be found at http://www.sics.se/~psm/sparcstack.html */
767 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
768 {
769 index = (index + cwp * 16) % (16 * env->nwindows);
770 /* wrap handling : if cwp is on the last window, then we use the
771 registers 'after' the end */
772 if (index < 8 && env->cwp == env->nwindows - 1)
773 index += 16 * env->nwindows;
774 return index;
775 }
776
777 /* save the register window 'cwp1' */
778 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
779 {
780 unsigned int i;
781 abi_ulong sp_ptr;
782
783 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
784 #ifdef TARGET_SPARC64
785 if (sp_ptr & 3)
786 sp_ptr += SPARC64_STACK_BIAS;
787 #endif
788 #if defined(DEBUG_WIN)
789 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
790 sp_ptr, cwp1);
791 #endif
792 for(i = 0; i < 16; i++) {
793 /* FIXME - what to do if put_user() fails? */
794 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
795 sp_ptr += sizeof(abi_ulong);
796 }
797 }
798
799 static void save_window(CPUSPARCState *env)
800 {
801 #ifndef TARGET_SPARC64
802 unsigned int new_wim;
803 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
804 ((1LL << env->nwindows) - 1);
805 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
806 env->wim = new_wim;
807 #else
808 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
809 env->cansave++;
810 env->canrestore--;
811 #endif
812 }
813
814 static void restore_window(CPUSPARCState *env)
815 {
816 #ifndef TARGET_SPARC64
817 unsigned int new_wim;
818 #endif
819 unsigned int i, cwp1;
820 abi_ulong sp_ptr;
821
822 #ifndef TARGET_SPARC64
823 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
824 ((1LL << env->nwindows) - 1);
825 #endif
826
827 /* restore the invalid window */
828 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
829 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
830 #ifdef TARGET_SPARC64
831 if (sp_ptr & 3)
832 sp_ptr += SPARC64_STACK_BIAS;
833 #endif
834 #if defined(DEBUG_WIN)
835 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
836 sp_ptr, cwp1);
837 #endif
838 for(i = 0; i < 16; i++) {
839 /* FIXME - what to do if get_user() fails? */
840 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
841 sp_ptr += sizeof(abi_ulong);
842 }
843 #ifdef TARGET_SPARC64
844 env->canrestore++;
845 if (env->cleanwin < env->nwindows - 1)
846 env->cleanwin++;
847 env->cansave--;
848 #else
849 env->wim = new_wim;
850 #endif
851 }
852
853 static void flush_windows(CPUSPARCState *env)
854 {
855 int offset, cwp1;
856
857 offset = 1;
858 for(;;) {
859 /* if restore would invoke restore_window(), then we can stop */
860 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
861 #ifndef TARGET_SPARC64
862 if (env->wim & (1 << cwp1))
863 break;
864 #else
865 if (env->canrestore == 0)
866 break;
867 env->cansave++;
868 env->canrestore--;
869 #endif
870 save_window_offset(env, cwp1);
871 offset++;
872 }
873 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
874 #ifndef TARGET_SPARC64
875 /* set wim so that restore will reload the registers */
876 env->wim = 1 << cwp1;
877 #endif
878 #if defined(DEBUG_WIN)
879 printf("flush_windows: nb=%d\n", offset - 1);
880 #endif
881 }
882
883 void cpu_loop (CPUSPARCState *env)
884 {
885 int trapnr, ret;
886 target_siginfo_t info;
887
888 while (1) {
889 trapnr = cpu_sparc_exec (env);
890
891 switch (trapnr) {
892 #ifndef TARGET_SPARC64
893 case 0x88:
894 case 0x90:
895 #else
896 case 0x110:
897 case 0x16d:
898 #endif
899 ret = do_syscall (env, env->gregs[1],
900 env->regwptr[0], env->regwptr[1],
901 env->regwptr[2], env->regwptr[3],
902 env->regwptr[4], env->regwptr[5]);
903 if ((unsigned int)ret >= (unsigned int)(-515)) {
904 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
905 env->xcc |= PSR_CARRY;
906 #else
907 env->psr |= PSR_CARRY;
908 #endif
909 ret = -ret;
910 } else {
911 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
912 env->xcc &= ~PSR_CARRY;
913 #else
914 env->psr &= ~PSR_CARRY;
915 #endif
916 }
917 env->regwptr[0] = ret;
918 /* next instruction */
919 env->pc = env->npc;
920 env->npc = env->npc + 4;
921 break;
922 case 0x83: /* flush windows */
923 #ifdef TARGET_ABI32
924 case 0x103:
925 #endif
926 flush_windows(env);
927 /* next instruction */
928 env->pc = env->npc;
929 env->npc = env->npc + 4;
930 break;
931 #ifndef TARGET_SPARC64
932 case TT_WIN_OVF: /* window overflow */
933 save_window(env);
934 break;
935 case TT_WIN_UNF: /* window underflow */
936 restore_window(env);
937 break;
938 case TT_TFAULT:
939 case TT_DFAULT:
940 {
941 info.si_signo = SIGSEGV;
942 info.si_errno = 0;
943 /* XXX: check env->error_code */
944 info.si_code = TARGET_SEGV_MAPERR;
945 info._sifields._sigfault._addr = env->mmuregs[4];
946 queue_signal(env, info.si_signo, &info);
947 }
948 break;
949 #else
950 case TT_SPILL: /* window overflow */
951 save_window(env);
952 break;
953 case TT_FILL: /* window underflow */
954 restore_window(env);
955 break;
956 case TT_TFAULT:
957 case TT_DFAULT:
958 {
959 info.si_signo = SIGSEGV;
960 info.si_errno = 0;
961 /* XXX: check env->error_code */
962 info.si_code = TARGET_SEGV_MAPERR;
963 if (trapnr == TT_DFAULT)
964 info._sifields._sigfault._addr = env->dmmuregs[4];
965 else
966 info._sifields._sigfault._addr = env->tsptr->tpc;
967 queue_signal(env, info.si_signo, &info);
968 }
969 break;
970 #ifndef TARGET_ABI32
971 case 0x16e:
972 flush_windows(env);
973 sparc64_get_context(env);
974 break;
975 case 0x16f:
976 flush_windows(env);
977 sparc64_set_context(env);
978 break;
979 #endif
980 #endif
981 case EXCP_INTERRUPT:
982 /* just indicate that signals should be handled asap */
983 break;
984 case EXCP_DEBUG:
985 {
986 int sig;
987
988 sig = gdb_handlesig (env, TARGET_SIGTRAP);
989 if (sig)
990 {
991 info.si_signo = sig;
992 info.si_errno = 0;
993 info.si_code = TARGET_TRAP_BRKPT;
994 queue_signal(env, info.si_signo, &info);
995 }
996 }
997 break;
998 default:
999 printf ("Unhandled trap: 0x%x\n", trapnr);
1000 cpu_dump_state(env, stderr, fprintf, 0);
1001 exit (1);
1002 }
1003 process_pending_signals (env);
1004 }
1005 }
1006
1007 #endif
1008
1009 #ifdef TARGET_PPC
1010 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1011 {
1012 /* TO FIX */
1013 return 0;
1014 }
1015
1016 uint32_t cpu_ppc_load_tbl (CPUState *env)
1017 {
1018 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1019 }
1020
1021 uint32_t cpu_ppc_load_tbu (CPUState *env)
1022 {
1023 return cpu_ppc_get_tb(env) >> 32;
1024 }
1025
1026 uint32_t cpu_ppc_load_atbl (CPUState *env)
1027 {
1028 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1029 }
1030
1031 uint32_t cpu_ppc_load_atbu (CPUState *env)
1032 {
1033 return cpu_ppc_get_tb(env) >> 32;
1034 }
1035
1036 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1037 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1038
1039 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1040 {
1041 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1042 }
1043
1044 /* XXX: to be fixed */
1045 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1046 {
1047 return -1;
1048 }
1049
1050 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1051 {
1052 return -1;
1053 }
1054
1055 #define EXCP_DUMP(env, fmt, args...) \
1056 do { \
1057 fprintf(stderr, fmt , ##args); \
1058 cpu_dump_state(env, stderr, fprintf, 0); \
1059 if (loglevel != 0) { \
1060 fprintf(logfile, fmt , ##args); \
1061 cpu_dump_state(env, logfile, fprintf, 0); \
1062 } \
1063 } while (0)
1064
1065 void cpu_loop(CPUPPCState *env)
1066 {
1067 target_siginfo_t info;
1068 int trapnr;
1069 uint32_t ret;
1070
1071 for(;;) {
1072 trapnr = cpu_ppc_exec(env);
1073 switch(trapnr) {
1074 case POWERPC_EXCP_NONE:
1075 /* Just go on */
1076 break;
1077 case POWERPC_EXCP_CRITICAL: /* Critical input */
1078 cpu_abort(env, "Critical interrupt while in user mode. "
1079 "Aborting\n");
1080 break;
1081 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1082 cpu_abort(env, "Machine check exception while in user mode. "
1083 "Aborting\n");
1084 break;
1085 case POWERPC_EXCP_DSI: /* Data storage exception */
1086 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1087 env->spr[SPR_DAR]);
1088 /* XXX: check this. Seems bugged */
1089 switch (env->error_code & 0xFF000000) {
1090 case 0x40000000:
1091 info.si_signo = TARGET_SIGSEGV;
1092 info.si_errno = 0;
1093 info.si_code = TARGET_SEGV_MAPERR;
1094 break;
1095 case 0x04000000:
1096 info.si_signo = TARGET_SIGILL;
1097 info.si_errno = 0;
1098 info.si_code = TARGET_ILL_ILLADR;
1099 break;
1100 case 0x08000000:
1101 info.si_signo = TARGET_SIGSEGV;
1102 info.si_errno = 0;
1103 info.si_code = TARGET_SEGV_ACCERR;
1104 break;
1105 default:
1106 /* Let's send a regular segfault... */
1107 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1108 env->error_code);
1109 info.si_signo = TARGET_SIGSEGV;
1110 info.si_errno = 0;
1111 info.si_code = TARGET_SEGV_MAPERR;
1112 break;
1113 }
1114 info._sifields._sigfault._addr = env->nip;
1115 queue_signal(env, info.si_signo, &info);
1116 break;
1117 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1118 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1119 env->spr[SPR_SRR0]);
1120 /* XXX: check this */
1121 switch (env->error_code & 0xFF000000) {
1122 case 0x40000000:
1123 info.si_signo = TARGET_SIGSEGV;
1124 info.si_errno = 0;
1125 info.si_code = TARGET_SEGV_MAPERR;
1126 break;
1127 case 0x10000000:
1128 case 0x08000000:
1129 info.si_signo = TARGET_SIGSEGV;
1130 info.si_errno = 0;
1131 info.si_code = TARGET_SEGV_ACCERR;
1132 break;
1133 default:
1134 /* Let's send a regular segfault... */
1135 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1136 env->error_code);
1137 info.si_signo = TARGET_SIGSEGV;
1138 info.si_errno = 0;
1139 info.si_code = TARGET_SEGV_MAPERR;
1140 break;
1141 }
1142 info._sifields._sigfault._addr = env->nip - 4;
1143 queue_signal(env, info.si_signo, &info);
1144 break;
1145 case POWERPC_EXCP_EXTERNAL: /* External input */
1146 cpu_abort(env, "External interrupt while in user mode. "
1147 "Aborting\n");
1148 break;
1149 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1150 EXCP_DUMP(env, "Unaligned memory access\n");
1151 /* XXX: check this */
1152 info.si_signo = TARGET_SIGBUS;
1153 info.si_errno = 0;
1154 info.si_code = TARGET_BUS_ADRALN;
1155 info._sifields._sigfault._addr = env->nip - 4;
1156 queue_signal(env, info.si_signo, &info);
1157 break;
1158 case POWERPC_EXCP_PROGRAM: /* Program exception */
1159 /* XXX: check this */
1160 switch (env->error_code & ~0xF) {
1161 case POWERPC_EXCP_FP:
1162 EXCP_DUMP(env, "Floating point program exception\n");
1163 info.si_signo = TARGET_SIGFPE;
1164 info.si_errno = 0;
1165 switch (env->error_code & 0xF) {
1166 case POWERPC_EXCP_FP_OX:
1167 info.si_code = TARGET_FPE_FLTOVF;
1168 break;
1169 case POWERPC_EXCP_FP_UX:
1170 info.si_code = TARGET_FPE_FLTUND;
1171 break;
1172 case POWERPC_EXCP_FP_ZX:
1173 case POWERPC_EXCP_FP_VXZDZ:
1174 info.si_code = TARGET_FPE_FLTDIV;
1175 break;
1176 case POWERPC_EXCP_FP_XX:
1177 info.si_code = TARGET_FPE_FLTRES;
1178 break;
1179 case POWERPC_EXCP_FP_VXSOFT:
1180 info.si_code = TARGET_FPE_FLTINV;
1181 break;
1182 case POWERPC_EXCP_FP_VXSNAN:
1183 case POWERPC_EXCP_FP_VXISI:
1184 case POWERPC_EXCP_FP_VXIDI:
1185 case POWERPC_EXCP_FP_VXIMZ:
1186 case POWERPC_EXCP_FP_VXVC:
1187 case POWERPC_EXCP_FP_VXSQRT:
1188 case POWERPC_EXCP_FP_VXCVI:
1189 info.si_code = TARGET_FPE_FLTSUB;
1190 break;
1191 default:
1192 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1193 env->error_code);
1194 break;
1195 }
1196 break;
1197 case POWERPC_EXCP_INVAL:
1198 EXCP_DUMP(env, "Invalid instruction\n");
1199 info.si_signo = TARGET_SIGILL;
1200 info.si_errno = 0;
1201 switch (env->error_code & 0xF) {
1202 case POWERPC_EXCP_INVAL_INVAL:
1203 info.si_code = TARGET_ILL_ILLOPC;
1204 break;
1205 case POWERPC_EXCP_INVAL_LSWX:
1206 info.si_code = TARGET_ILL_ILLOPN;
1207 break;
1208 case POWERPC_EXCP_INVAL_SPR:
1209 info.si_code = TARGET_ILL_PRVREG;
1210 break;
1211 case POWERPC_EXCP_INVAL_FP:
1212 info.si_code = TARGET_ILL_COPROC;
1213 break;
1214 default:
1215 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1216 env->error_code & 0xF);
1217 info.si_code = TARGET_ILL_ILLADR;
1218 break;
1219 }
1220 break;
1221 case POWERPC_EXCP_PRIV:
1222 EXCP_DUMP(env, "Privilege violation\n");
1223 info.si_signo = TARGET_SIGILL;
1224 info.si_errno = 0;
1225 switch (env->error_code & 0xF) {
1226 case POWERPC_EXCP_PRIV_OPC:
1227 info.si_code = TARGET_ILL_PRVOPC;
1228 break;
1229 case POWERPC_EXCP_PRIV_REG:
1230 info.si_code = TARGET_ILL_PRVREG;
1231 break;
1232 default:
1233 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1234 env->error_code & 0xF);
1235 info.si_code = TARGET_ILL_PRVOPC;
1236 break;
1237 }
1238 break;
1239 case POWERPC_EXCP_TRAP:
1240 cpu_abort(env, "Tried to call a TRAP\n");
1241 break;
1242 default:
1243 /* Should not happen ! */
1244 cpu_abort(env, "Unknown program exception (%02x)\n",
1245 env->error_code);
1246 break;
1247 }
1248 info._sifields._sigfault._addr = env->nip - 4;
1249 queue_signal(env, info.si_signo, &info);
1250 break;
1251 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1252 EXCP_DUMP(env, "No floating point allowed\n");
1253 info.si_signo = TARGET_SIGILL;
1254 info.si_errno = 0;
1255 info.si_code = TARGET_ILL_COPROC;
1256 info._sifields._sigfault._addr = env->nip - 4;
1257 queue_signal(env, info.si_signo, &info);
1258 break;
1259 case POWERPC_EXCP_SYSCALL: /* System call exception */
1260 cpu_abort(env, "Syscall exception while in user mode. "
1261 "Aborting\n");
1262 break;
1263 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1264 EXCP_DUMP(env, "No APU instruction allowed\n");
1265 info.si_signo = TARGET_SIGILL;
1266 info.si_errno = 0;
1267 info.si_code = TARGET_ILL_COPROC;
1268 info._sifields._sigfault._addr = env->nip - 4;
1269 queue_signal(env, info.si_signo, &info);
1270 break;
1271 case POWERPC_EXCP_DECR: /* Decrementer exception */
1272 cpu_abort(env, "Decrementer interrupt while in user mode. "
1273 "Aborting\n");
1274 break;
1275 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1276 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1277 "Aborting\n");
1278 break;
1279 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1280 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1281 "Aborting\n");
1282 break;
1283 case POWERPC_EXCP_DTLB: /* Data TLB error */
1284 cpu_abort(env, "Data TLB exception while in user mode. "
1285 "Aborting\n");
1286 break;
1287 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1288 cpu_abort(env, "Instruction TLB exception while in user mode. "
1289 "Aborting\n");
1290 break;
1291 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1292 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1293 info.si_signo = TARGET_SIGILL;
1294 info.si_errno = 0;
1295 info.si_code = TARGET_ILL_COPROC;
1296 info._sifields._sigfault._addr = env->nip - 4;
1297 queue_signal(env, info.si_signo, &info);
1298 break;
1299 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1300 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1301 break;
1302 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1303 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1304 break;
1305 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1306 cpu_abort(env, "Performance monitor exception not handled\n");
1307 break;
1308 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1309 cpu_abort(env, "Doorbell interrupt while in user mode. "
1310 "Aborting\n");
1311 break;
1312 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1313 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1314 "Aborting\n");
1315 break;
1316 case POWERPC_EXCP_RESET: /* System reset exception */
1317 cpu_abort(env, "Reset interrupt while in user mode. "
1318 "Aborting\n");
1319 break;
1320 case POWERPC_EXCP_DSEG: /* Data segment exception */
1321 cpu_abort(env, "Data segment exception while in user mode. "
1322 "Aborting\n");
1323 break;
1324 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1325 cpu_abort(env, "Instruction segment exception "
1326 "while in user mode. Aborting\n");
1327 break;
1328 /* PowerPC 64 with hypervisor mode support */
1329 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1330 cpu_abort(env, "Hypervisor decrementer interrupt "
1331 "while in user mode. Aborting\n");
1332 break;
1333 case POWERPC_EXCP_TRACE: /* Trace exception */
1334 /* Nothing to do:
1335 * we use this exception to emulate step-by-step execution mode.
1336 */
1337 break;
1338 /* PowerPC 64 with hypervisor mode support */
1339 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1340 cpu_abort(env, "Hypervisor data storage exception "
1341 "while in user mode. Aborting\n");
1342 break;
1343 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1344 cpu_abort(env, "Hypervisor instruction storage exception "
1345 "while in user mode. Aborting\n");
1346 break;
1347 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1348 cpu_abort(env, "Hypervisor data segment exception "
1349 "while in user mode. Aborting\n");
1350 break;
1351 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1352 cpu_abort(env, "Hypervisor instruction segment exception "
1353 "while in user mode. Aborting\n");
1354 break;
1355 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1356 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1357 info.si_signo = TARGET_SIGILL;
1358 info.si_errno = 0;
1359 info.si_code = TARGET_ILL_COPROC;
1360 info._sifields._sigfault._addr = env->nip - 4;
1361 queue_signal(env, info.si_signo, &info);
1362 break;
1363 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1364 cpu_abort(env, "Programable interval timer interrupt "
1365 "while in user mode. Aborting\n");
1366 break;
1367 case POWERPC_EXCP_IO: /* IO error exception */
1368 cpu_abort(env, "IO error exception while in user mode. "
1369 "Aborting\n");
1370 break;
1371 case POWERPC_EXCP_RUNM: /* Run mode exception */
1372 cpu_abort(env, "Run mode exception while in user mode. "
1373 "Aborting\n");
1374 break;
1375 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1376 cpu_abort(env, "Emulation trap exception not handled\n");
1377 break;
1378 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1379 cpu_abort(env, "Instruction fetch TLB exception "
1380 "while in user-mode. Aborting");
1381 break;
1382 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1383 cpu_abort(env, "Data load TLB exception while in user-mode. "
1384 "Aborting");
1385 break;
1386 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1387 cpu_abort(env, "Data store TLB exception while in user-mode. "
1388 "Aborting");
1389 break;
1390 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1391 cpu_abort(env, "Floating-point assist exception not handled\n");
1392 break;
1393 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1394 cpu_abort(env, "Instruction address breakpoint exception "
1395 "not handled\n");
1396 break;
1397 case POWERPC_EXCP_SMI: /* System management interrupt */
1398 cpu_abort(env, "System management interrupt while in user mode. "
1399 "Aborting\n");
1400 break;
1401 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1402 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1403 "Aborting\n");
1404 break;
1405 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1406 cpu_abort(env, "Performance monitor exception not handled\n");
1407 break;
1408 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1409 cpu_abort(env, "Vector assist exception not handled\n");
1410 break;
1411 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1412 cpu_abort(env, "Soft patch exception not handled\n");
1413 break;
1414 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1415 cpu_abort(env, "Maintenance exception while in user mode. "
1416 "Aborting\n");
1417 break;
1418 case POWERPC_EXCP_STOP: /* stop translation */
1419 /* We did invalidate the instruction cache. Go on */
1420 break;
1421 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1422 /* We just stopped because of a branch. Go on */
1423 break;
1424 case POWERPC_EXCP_SYSCALL_USER:
1425 /* system call in user-mode emulation */
1426 /* WARNING:
1427 * PPC ABI uses overflow flag in cr0 to signal an error
1428 * in syscalls.
1429 */
1430 #if 0
1431 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1432 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1433 #endif
1434 env->crf[0] &= ~0x1;
1435 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1436 env->gpr[5], env->gpr[6], env->gpr[7],
1437 env->gpr[8]);
1438 if (ret > (uint32_t)(-515)) {
1439 env->crf[0] |= 0x1;
1440 ret = -ret;
1441 }
1442 env->gpr[3] = ret;
1443 #if 0
1444 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1445 #endif
1446 break;
1447 case EXCP_DEBUG:
1448 {
1449 int sig;
1450
1451 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1452 if (sig) {
1453 info.si_signo = sig;
1454 info.si_errno = 0;
1455 info.si_code = TARGET_TRAP_BRKPT;
1456 queue_signal(env, info.si_signo, &info);
1457 }
1458 }
1459 break;
1460 case EXCP_INTERRUPT:
1461 /* just indicate that signals should be handled asap */
1462 break;
1463 default:
1464 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1465 break;
1466 }
1467 process_pending_signals(env);
1468 }
1469 }
1470 #endif
1471
1472 #ifdef TARGET_MIPS
1473
1474 #define MIPS_SYS(name, args) args,
1475
1476 static const uint8_t mips_syscall_args[] = {
1477 MIPS_SYS(sys_syscall , 0) /* 4000 */
1478 MIPS_SYS(sys_exit , 1)
1479 MIPS_SYS(sys_fork , 0)
1480 MIPS_SYS(sys_read , 3)
1481 MIPS_SYS(sys_write , 3)
1482 MIPS_SYS(sys_open , 3) /* 4005 */
1483 MIPS_SYS(sys_close , 1)
1484 MIPS_SYS(sys_waitpid , 3)
1485 MIPS_SYS(sys_creat , 2)
1486 MIPS_SYS(sys_link , 2)
1487 MIPS_SYS(sys_unlink , 1) /* 4010 */
1488 MIPS_SYS(sys_execve , 0)
1489 MIPS_SYS(sys_chdir , 1)
1490 MIPS_SYS(sys_time , 1)
1491 MIPS_SYS(sys_mknod , 3)
1492 MIPS_SYS(sys_chmod , 2) /* 4015 */
1493 MIPS_SYS(sys_lchown , 3)
1494 MIPS_SYS(sys_ni_syscall , 0)
1495 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1496 MIPS_SYS(sys_lseek , 3)
1497 MIPS_SYS(sys_getpid , 0) /* 4020 */
1498 MIPS_SYS(sys_mount , 5)
1499 MIPS_SYS(sys_oldumount , 1)
1500 MIPS_SYS(sys_setuid , 1)
1501 MIPS_SYS(sys_getuid , 0)
1502 MIPS_SYS(sys_stime , 1) /* 4025 */
1503 MIPS_SYS(sys_ptrace , 4)
1504 MIPS_SYS(sys_alarm , 1)
1505 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1506 MIPS_SYS(sys_pause , 0)
1507 MIPS_SYS(sys_utime , 2) /* 4030 */
1508 MIPS_SYS(sys_ni_syscall , 0)
1509 MIPS_SYS(sys_ni_syscall , 0)
1510 MIPS_SYS(sys_access , 2)
1511 MIPS_SYS(sys_nice , 1)
1512 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1513 MIPS_SYS(sys_sync , 0)
1514 MIPS_SYS(sys_kill , 2)
1515 MIPS_SYS(sys_rename , 2)
1516 MIPS_SYS(sys_mkdir , 2)
1517 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1518 MIPS_SYS(sys_dup , 1)
1519 MIPS_SYS(sys_pipe , 0)
1520 MIPS_SYS(sys_times , 1)
1521 MIPS_SYS(sys_ni_syscall , 0)
1522 MIPS_SYS(sys_brk , 1) /* 4045 */
1523 MIPS_SYS(sys_setgid , 1)
1524 MIPS_SYS(sys_getgid , 0)
1525 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1526 MIPS_SYS(sys_geteuid , 0)
1527 MIPS_SYS(sys_getegid , 0) /* 4050 */
1528 MIPS_SYS(sys_acct , 0)
1529 MIPS_SYS(sys_umount , 2)
1530 MIPS_SYS(sys_ni_syscall , 0)
1531 MIPS_SYS(sys_ioctl , 3)
1532 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1533 MIPS_SYS(sys_ni_syscall , 2)
1534 MIPS_SYS(sys_setpgid , 2)
1535 MIPS_SYS(sys_ni_syscall , 0)
1536 MIPS_SYS(sys_olduname , 1)
1537 MIPS_SYS(sys_umask , 1) /* 4060 */
1538 MIPS_SYS(sys_chroot , 1)
1539 MIPS_SYS(sys_ustat , 2)
1540 MIPS_SYS(sys_dup2 , 2)
1541 MIPS_SYS(sys_getppid , 0)
1542 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1543 MIPS_SYS(sys_setsid , 0)
1544 MIPS_SYS(sys_sigaction , 3)
1545 MIPS_SYS(sys_sgetmask , 0)
1546 MIPS_SYS(sys_ssetmask , 1)
1547 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1548 MIPS_SYS(sys_setregid , 2)
1549 MIPS_SYS(sys_sigsuspend , 0)
1550 MIPS_SYS(sys_sigpending , 1)
1551 MIPS_SYS(sys_sethostname , 2)
1552 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1553 MIPS_SYS(sys_getrlimit , 2)
1554 MIPS_SYS(sys_getrusage , 2)
1555 MIPS_SYS(sys_gettimeofday, 2)
1556 MIPS_SYS(sys_settimeofday, 2)
1557 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1558 MIPS_SYS(sys_setgroups , 2)
1559 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1560 MIPS_SYS(sys_symlink , 2)
1561 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1562 MIPS_SYS(sys_readlink , 3) /* 4085 */
1563 MIPS_SYS(sys_uselib , 1)
1564 MIPS_SYS(sys_swapon , 2)
1565 MIPS_SYS(sys_reboot , 3)
1566 MIPS_SYS(old_readdir , 3)
1567 MIPS_SYS(old_mmap , 6) /* 4090 */
1568 MIPS_SYS(sys_munmap , 2)
1569 MIPS_SYS(sys_truncate , 2)
1570 MIPS_SYS(sys_ftruncate , 2)
1571 MIPS_SYS(sys_fchmod , 2)
1572 MIPS_SYS(sys_fchown , 3) /* 4095 */
1573 MIPS_SYS(sys_getpriority , 2)
1574 MIPS_SYS(sys_setpriority , 3)
1575 MIPS_SYS(sys_ni_syscall , 0)
1576 MIPS_SYS(sys_statfs , 2)
1577 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1578 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1579 MIPS_SYS(sys_socketcall , 2)
1580 MIPS_SYS(sys_syslog , 3)
1581 MIPS_SYS(sys_setitimer , 3)
1582 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1583 MIPS_SYS(sys_newstat , 2)
1584 MIPS_SYS(sys_newlstat , 2)
1585 MIPS_SYS(sys_newfstat , 2)
1586 MIPS_SYS(sys_uname , 1)
1587 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1588 MIPS_SYS(sys_vhangup , 0)
1589 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1590 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1591 MIPS_SYS(sys_wait4 , 4)
1592 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1593 MIPS_SYS(sys_sysinfo , 1)
1594 MIPS_SYS(sys_ipc , 6)
1595 MIPS_SYS(sys_fsync , 1)
1596 MIPS_SYS(sys_sigreturn , 0)
1597 MIPS_SYS(sys_clone , 0) /* 4120 */
1598 MIPS_SYS(sys_setdomainname, 2)
1599 MIPS_SYS(sys_newuname , 1)
1600 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1601 MIPS_SYS(sys_adjtimex , 1)
1602 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1603 MIPS_SYS(sys_sigprocmask , 3)
1604 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1605 MIPS_SYS(sys_init_module , 5)
1606 MIPS_SYS(sys_delete_module, 1)
1607 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1608 MIPS_SYS(sys_quotactl , 0)
1609 MIPS_SYS(sys_getpgid , 1)
1610 MIPS_SYS(sys_fchdir , 1)
1611 MIPS_SYS(sys_bdflush , 2)
1612 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1613 MIPS_SYS(sys_personality , 1)
1614 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1615 MIPS_SYS(sys_setfsuid , 1)
1616 MIPS_SYS(sys_setfsgid , 1)
1617 MIPS_SYS(sys_llseek , 5) /* 4140 */
1618 MIPS_SYS(sys_getdents , 3)
1619 MIPS_SYS(sys_select , 5)
1620 MIPS_SYS(sys_flock , 2)
1621 MIPS_SYS(sys_msync , 3)
1622 MIPS_SYS(sys_readv , 3) /* 4145 */
1623 MIPS_SYS(sys_writev , 3)
1624 MIPS_SYS(sys_cacheflush , 3)
1625 MIPS_SYS(sys_cachectl , 3)
1626 MIPS_SYS(sys_sysmips , 4)
1627 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1628 MIPS_SYS(sys_getsid , 1)
1629 MIPS_SYS(sys_fdatasync , 0)
1630 MIPS_SYS(sys_sysctl , 1)
1631 MIPS_SYS(sys_mlock , 2)
1632 MIPS_SYS(sys_munlock , 2) /* 4155 */
1633 MIPS_SYS(sys_mlockall , 1)
1634 MIPS_SYS(sys_munlockall , 0)
1635 MIPS_SYS(sys_sched_setparam, 2)
1636 MIPS_SYS(sys_sched_getparam, 2)
1637 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1638 MIPS_SYS(sys_sched_getscheduler, 1)
1639 MIPS_SYS(sys_sched_yield , 0)
1640 MIPS_SYS(sys_sched_get_priority_max, 1)
1641 MIPS_SYS(sys_sched_get_priority_min, 1)
1642 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1643 MIPS_SYS(sys_nanosleep, 2)
1644 MIPS_SYS(sys_mremap , 4)
1645 MIPS_SYS(sys_accept , 3)
1646 MIPS_SYS(sys_bind , 3)
1647 MIPS_SYS(sys_connect , 3) /* 4170 */
1648 MIPS_SYS(sys_getpeername , 3)
1649 MIPS_SYS(sys_getsockname , 3)
1650 MIPS_SYS(sys_getsockopt , 5)
1651 MIPS_SYS(sys_listen , 2)
1652 MIPS_SYS(sys_recv , 4) /* 4175 */
1653 MIPS_SYS(sys_recvfrom , 6)
1654 MIPS_SYS(sys_recvmsg , 3)
1655 MIPS_SYS(sys_send , 4)
1656 MIPS_SYS(sys_sendmsg , 3)
1657 MIPS_SYS(sys_sendto , 6) /* 4180 */
1658 MIPS_SYS(sys_setsockopt , 5)
1659 MIPS_SYS(sys_shutdown , 2)
1660 MIPS_SYS(sys_socket , 3)
1661 MIPS_SYS(sys_socketpair , 4)
1662 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1663 MIPS_SYS(sys_getresuid , 3)
1664 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1665 MIPS_SYS(sys_poll , 3)
1666 MIPS_SYS(sys_nfsservctl , 3)
1667 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1668 MIPS_SYS(sys_getresgid , 3)
1669 MIPS_SYS(sys_prctl , 5)
1670 MIPS_SYS(sys_rt_sigreturn, 0)
1671 MIPS_SYS(sys_rt_sigaction, 4)
1672 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1673 MIPS_SYS(sys_rt_sigpending, 2)
1674 MIPS_SYS(sys_rt_sigtimedwait, 4)
1675 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1676 MIPS_SYS(sys_rt_sigsuspend, 0)
1677 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1678 MIPS_SYS(sys_pwrite64 , 6)
1679 MIPS_SYS(sys_chown , 3)
1680 MIPS_SYS(sys_getcwd , 2)
1681 MIPS_SYS(sys_capget , 2)
1682 MIPS_SYS(sys_capset , 2) /* 4205 */
1683 MIPS_SYS(sys_sigaltstack , 0)
1684 MIPS_SYS(sys_sendfile , 4)
1685 MIPS_SYS(sys_ni_syscall , 0)
1686 MIPS_SYS(sys_ni_syscall , 0)
1687 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1688 MIPS_SYS(sys_truncate64 , 4)
1689 MIPS_SYS(sys_ftruncate64 , 4)
1690 MIPS_SYS(sys_stat64 , 2)
1691 MIPS_SYS(sys_lstat64 , 2)
1692 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1693 MIPS_SYS(sys_pivot_root , 2)
1694 MIPS_SYS(sys_mincore , 3)
1695 MIPS_SYS(sys_madvise , 3)
1696 MIPS_SYS(sys_getdents64 , 3)
1697 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1698 MIPS_SYS(sys_ni_syscall , 0)
1699 MIPS_SYS(sys_gettid , 0)
1700 MIPS_SYS(sys_readahead , 5)
1701 MIPS_SYS(sys_setxattr , 5)
1702 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1703 MIPS_SYS(sys_fsetxattr , 5)
1704 MIPS_SYS(sys_getxattr , 4)
1705 MIPS_SYS(sys_lgetxattr , 4)
1706 MIPS_SYS(sys_fgetxattr , 4)
1707 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1708 MIPS_SYS(sys_llistxattr , 3)
1709 MIPS_SYS(sys_flistxattr , 3)
1710 MIPS_SYS(sys_removexattr , 2)
1711 MIPS_SYS(sys_lremovexattr, 2)
1712 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1713 MIPS_SYS(sys_tkill , 2)
1714 MIPS_SYS(sys_sendfile64 , 5)
1715 MIPS_SYS(sys_futex , 2)
1716 MIPS_SYS(sys_sched_setaffinity, 3)
1717 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1718 MIPS_SYS(sys_io_setup , 2)
1719 MIPS_SYS(sys_io_destroy , 1)
1720 MIPS_SYS(sys_io_getevents, 5)
1721 MIPS_SYS(sys_io_submit , 3)
1722 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1723 MIPS_SYS(sys_exit_group , 1)
1724 MIPS_SYS(sys_lookup_dcookie, 3)
1725 MIPS_SYS(sys_epoll_create, 1)
1726 MIPS_SYS(sys_epoll_ctl , 4)
1727 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1728 MIPS_SYS(sys_remap_file_pages, 5)
1729 MIPS_SYS(sys_set_tid_address, 1)
1730 MIPS_SYS(sys_restart_syscall, 0)
1731 MIPS_SYS(sys_fadvise64_64, 7)
1732 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1733 MIPS_SYS(sys_fstatfs64 , 2)
1734 MIPS_SYS(sys_timer_create, 3)
1735 MIPS_SYS(sys_timer_settime, 4)
1736 MIPS_SYS(sys_timer_gettime, 2)
1737 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1738 MIPS_SYS(sys_timer_delete, 1)
1739 MIPS_SYS(sys_clock_settime, 2)
1740 MIPS_SYS(sys_clock_gettime, 2)
1741 MIPS_SYS(sys_clock_getres, 2)
1742 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1743 MIPS_SYS(sys_tgkill , 3)
1744 MIPS_SYS(sys_utimes , 2)
1745 MIPS_SYS(sys_mbind , 4)
1746 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1747 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1748 MIPS_SYS(sys_mq_open , 4)
1749 MIPS_SYS(sys_mq_unlink , 1)
1750 MIPS_SYS(sys_mq_timedsend, 5)
1751 MIPS_SYS(sys_mq_timedreceive, 5)
1752 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1753 MIPS_SYS(sys_mq_getsetattr, 3)
1754 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1755 MIPS_SYS(sys_waitid , 4)
1756 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1757 MIPS_SYS(sys_add_key , 5)
1758 MIPS_SYS(sys_request_key, 4)
1759 MIPS_SYS(sys_keyctl , 5)
1760 MIPS_SYS(sys_set_thread_area, 1)
1761 MIPS_SYS(sys_inotify_init, 0)
1762 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1763 MIPS_SYS(sys_inotify_rm_watch, 2)
1764 MIPS_SYS(sys_migrate_pages, 4)
1765 MIPS_SYS(sys_openat, 4)
1766 MIPS_SYS(sys_mkdirat, 3)
1767 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1768 MIPS_SYS(sys_fchownat, 5)
1769 MIPS_SYS(sys_futimesat, 3)
1770 MIPS_SYS(sys_fstatat64, 4)
1771 MIPS_SYS(sys_unlinkat, 3)
1772 MIPS_SYS(sys_renameat, 4) /* 4295 */
1773 MIPS_SYS(sys_linkat, 5)
1774 MIPS_SYS(sys_symlinkat, 3)
1775 MIPS_SYS(sys_readlinkat, 4)
1776 MIPS_SYS(sys_fchmodat, 3)
1777 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1778 MIPS_SYS(sys_pselect6, 6)
1779 MIPS_SYS(sys_ppoll, 5)
1780 MIPS_SYS(sys_unshare, 1)
1781 MIPS_SYS(sys_splice, 4)
1782 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1783 MIPS_SYS(sys_tee, 4)
1784 MIPS_SYS(sys_vmsplice, 4)
1785 MIPS_SYS(sys_move_pages, 6)
1786 MIPS_SYS(sys_set_robust_list, 2)
1787 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1788 MIPS_SYS(sys_kexec_load, 4)
1789 MIPS_SYS(sys_getcpu, 3)
1790 MIPS_SYS(sys_epoll_pwait, 6)
1791 MIPS_SYS(sys_ioprio_set, 3)
1792 MIPS_SYS(sys_ioprio_get, 2)
1793 };
1794
1795 #undef MIPS_SYS
1796
1797 void cpu_loop(CPUMIPSState *env)
1798 {
1799 target_siginfo_t info;
1800 int trapnr, ret;
1801 unsigned int syscall_num;
1802
1803 for(;;) {
1804 trapnr = cpu_mips_exec(env);
1805 switch(trapnr) {
1806 case EXCP_SYSCALL:
1807 syscall_num = env->active_tc.gpr[2] - 4000;
1808 env->active_tc.PC += 4;
1809 if (syscall_num >= sizeof(mips_syscall_args)) {
1810 ret = -ENOSYS;
1811 } else {
1812 int nb_args;
1813 abi_ulong sp_reg;
1814 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1815
1816 nb_args = mips_syscall_args[syscall_num];
1817 sp_reg = env->active_tc.gpr[29];
1818 switch (nb_args) {
1819 /* these arguments are taken from the stack */
1820 /* FIXME - what to do if get_user() fails? */
1821 case 8: get_user_ual(arg8, sp_reg + 28);
1822 case 7: get_user_ual(arg7, sp_reg + 24);
1823 case 6: get_user_ual(arg6, sp_reg + 20);
1824 case 5: get_user_ual(arg5, sp_reg + 16);
1825 default:
1826 break;
1827 }
1828 ret = do_syscall(env, env->active_tc.gpr[2],
1829 env->active_tc.gpr[4],
1830 env->active_tc.gpr[5],
1831 env->active_tc.gpr[6],
1832 env->active_tc.gpr[7],
1833 arg5, arg6/*, arg7, arg8*/);
1834 }
1835 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1836 env->active_tc.gpr[7] = 1; /* error flag */
1837 ret = -ret;
1838 } else {
1839 env->active_tc.gpr[7] = 0; /* error flag */
1840 }
1841 env->active_tc.gpr[2] = ret;
1842 break;
1843 case EXCP_TLBL:
1844 case EXCP_TLBS:
1845 case EXCP_CpU:
1846 case EXCP_RI:
1847 info.si_signo = TARGET_SIGILL;
1848 info.si_errno = 0;
1849 info.si_code = 0;
1850 queue_signal(env, info.si_signo, &info);
1851 break;
1852 case EXCP_INTERRUPT:
1853 /* just indicate that signals should be handled asap */
1854 break;
1855 case EXCP_DEBUG:
1856 {
1857 int sig;
1858
1859 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1860 if (sig)
1861 {
1862 info.si_signo = sig;
1863 info.si_errno = 0;
1864 info.si_code = TARGET_TRAP_BRKPT;
1865 queue_signal(env, info.si_signo, &info);
1866 }
1867 }
1868 break;
1869 default:
1870 // error:
1871 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1872 trapnr);
1873 cpu_dump_state(env, stderr, fprintf, 0);
1874 abort();
1875 }
1876 process_pending_signals(env);
1877 }
1878 }
1879 #endif
1880
1881 #ifdef TARGET_SH4
1882 void cpu_loop (CPUState *env)
1883 {
1884 int trapnr, ret;
1885 target_siginfo_t info;
1886
1887 while (1) {
1888 trapnr = cpu_sh4_exec (env);
1889
1890 switch (trapnr) {
1891 case 0x160:
1892 env->pc += 2;
1893 ret = do_syscall(env,
1894 env->gregs[3],
1895 env->gregs[4],
1896 env->gregs[5],
1897 env->gregs[6],
1898 env->gregs[7],
1899 env->gregs[0],
1900 env->gregs[1]);
1901 env->gregs[0] = ret;
1902 break;
1903 case EXCP_INTERRUPT:
1904 /* just indicate that signals should be handled asap */
1905 break;
1906 case EXCP_DEBUG:
1907 {
1908 int sig;
1909
1910 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1911 if (sig)
1912 {
1913 info.si_signo = sig;
1914 info.si_errno = 0;
1915 info.si_code = TARGET_TRAP_BRKPT;
1916 queue_signal(env, info.si_signo, &info);
1917 }
1918 }
1919 break;
1920 case 0xa0:
1921 case 0xc0:
1922 info.si_signo = SIGSEGV;
1923 info.si_errno = 0;
1924 info.si_code = TARGET_SEGV_MAPERR;
1925 info._sifields._sigfault._addr = env->tea;
1926 queue_signal(env, info.si_signo, &info);
1927 break;
1928
1929 default:
1930 printf ("Unhandled trap: 0x%x\n", trapnr);
1931 cpu_dump_state(env, stderr, fprintf, 0);
1932 exit (1);
1933 }
1934 process_pending_signals (env);
1935 }
1936 }
1937 #endif
1938
1939 #ifdef TARGET_CRIS
1940 void cpu_loop (CPUState *env)
1941 {
1942 int trapnr, ret;
1943 target_siginfo_t info;
1944
1945 while (1) {
1946 trapnr = cpu_cris_exec (env);
1947 switch (trapnr) {
1948 case 0xaa:
1949 {
1950 info.si_signo = SIGSEGV;
1951 info.si_errno = 0;
1952 /* XXX: check env->error_code */
1953 info.si_code = TARGET_SEGV_MAPERR;
1954 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1955 queue_signal(env, info.si_signo, &info);
1956 }
1957 break;
1958 case EXCP_INTERRUPT:
1959 /* just indicate that signals should be handled asap */
1960 break;
1961 case EXCP_BREAK:
1962 ret = do_syscall(env,
1963 env->regs[9],
1964 env->regs[10],
1965 env->regs[11],
1966 env->regs[12],
1967 env->regs[13],
1968 env->pregs[7],
1969 env->pregs[11]);
1970 env->regs[10] = ret;
1971 break;
1972 case EXCP_DEBUG:
1973 {
1974 int sig;
1975
1976 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1977 if (sig)
1978 {
1979 info.si_signo = sig;
1980 info.si_errno = 0;
1981 info.si_code = TARGET_TRAP_BRKPT;
1982 queue_signal(env, info.si_signo, &info);
1983 }
1984 }
1985 break;
1986 default:
1987 printf ("Unhandled trap: 0x%x\n", trapnr);
1988 cpu_dump_state(env, stderr, fprintf, 0);
1989 exit (1);
1990 }
1991 process_pending_signals (env);
1992 }
1993 }
1994 #endif
1995
1996 #ifdef TARGET_M68K
1997
1998 void cpu_loop(CPUM68KState *env)
1999 {
2000 int trapnr;
2001 unsigned int n;
2002 target_siginfo_t info;
2003 TaskState *ts = env->opaque;
2004
2005 for(;;) {
2006 trapnr = cpu_m68k_exec(env);
2007 switch(trapnr) {
2008 case EXCP_ILLEGAL:
2009 {
2010 if (ts->sim_syscalls) {
2011 uint16_t nr;
2012 nr = lduw(env->pc + 2);
2013 env->pc += 4;
2014 do_m68k_simcall(env, nr);
2015 } else {
2016 goto do_sigill;
2017 }
2018 }
2019 break;
2020 case EXCP_HALT_INSN:
2021 /* Semihosing syscall. */
2022 env->pc += 4;
2023 do_m68k_semihosting(env, env->dregs[0]);
2024 break;
2025 case EXCP_LINEA:
2026 case EXCP_LINEF:
2027 case EXCP_UNSUPPORTED:
2028 do_sigill:
2029 info.si_signo = SIGILL;
2030 info.si_errno = 0;
2031 info.si_code = TARGET_ILL_ILLOPN;
2032 info._sifields._sigfault._addr = env->pc;
2033 queue_signal(env, info.si_signo, &info);
2034 break;
2035 case EXCP_TRAP0:
2036 {
2037 ts->sim_syscalls = 0;
2038 n = env->dregs[0];
2039 env->pc += 2;
2040 env->dregs[0] = do_syscall(env,
2041 n,
2042 env->dregs[1],
2043 env->dregs[2],
2044 env->dregs[3],
2045 env->dregs[4],
2046 env->dregs[5],
2047 env->aregs[0]);
2048 }
2049 break;
2050 case EXCP_INTERRUPT:
2051 /* just indicate that signals should be handled asap */
2052 break;
2053 case EXCP_ACCESS:
2054 {
2055 info.si_signo = SIGSEGV;
2056 info.si_errno = 0;
2057 /* XXX: check env->error_code */
2058 info.si_code = TARGET_SEGV_MAPERR;
2059 info._sifields._sigfault._addr = env->mmu.ar;
2060 queue_signal(env, info.si_signo, &info);
2061 }
2062 break;
2063 case EXCP_DEBUG:
2064 {
2065 int sig;
2066
2067 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2068 if (sig)
2069 {
2070 info.si_signo = sig;
2071 info.si_errno = 0;
2072 info.si_code = TARGET_TRAP_BRKPT;
2073 queue_signal(env, info.si_signo, &info);
2074 }
2075 }
2076 break;
2077 default:
2078 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2079 trapnr);
2080 cpu_dump_state(env, stderr, fprintf, 0);
2081 abort();
2082 }
2083 process_pending_signals(env);
2084 }
2085 }
2086 #endif /* TARGET_M68K */
2087
2088 #ifdef TARGET_ALPHA
2089 void cpu_loop (CPUState *env)
2090 {
2091 int trapnr;
2092 target_siginfo_t info;
2093
2094 while (1) {
2095 trapnr = cpu_alpha_exec (env);
2096
2097 switch (trapnr) {
2098 case EXCP_RESET:
2099 fprintf(stderr, "Reset requested. Exit\n");
2100 exit(1);
2101 break;
2102 case EXCP_MCHK:
2103 fprintf(stderr, "Machine check exception. Exit\n");
2104 exit(1);
2105 break;
2106 case EXCP_ARITH:
2107 fprintf(stderr, "Arithmetic trap.\n");
2108 exit(1);
2109 break;
2110 case EXCP_HW_INTERRUPT:
2111 fprintf(stderr, "External interrupt. Exit\n");
2112 exit(1);
2113 break;
2114 case EXCP_DFAULT:
2115 fprintf(stderr, "MMU data fault\n");
2116 exit(1);
2117 break;
2118 case EXCP_DTB_MISS_PAL:
2119 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2120 exit(1);
2121 break;
2122 case EXCP_ITB_MISS:
2123 fprintf(stderr, "MMU instruction TLB miss\n");
2124 exit(1);
2125 break;
2126 case EXCP_ITB_ACV:
2127 fprintf(stderr, "MMU instruction access violation\n");
2128 exit(1);
2129 break;
2130 case EXCP_DTB_MISS_NATIVE:
2131 fprintf(stderr, "MMU data TLB miss\n");
2132 exit(1);
2133 break;
2134 case EXCP_UNALIGN:
2135 fprintf(stderr, "Unaligned access\n");
2136 exit(1);
2137 break;
2138 case EXCP_OPCDEC:
2139 fprintf(stderr, "Invalid instruction\n");
2140 exit(1);
2141 break;
2142 case EXCP_FEN:
2143 fprintf(stderr, "Floating-point not allowed\n");
2144 exit(1);
2145 break;
2146 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2147 call_pal(env, (trapnr >> 6) | 0x80);
2148 break;
2149 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2150 fprintf(stderr, "Privileged call to PALcode\n");
2151 exit(1);
2152 break;
2153 case EXCP_DEBUG:
2154 {
2155 int sig;
2156
2157 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2158 if (sig)
2159 {
2160 info.si_signo = sig;
2161 info.si_errno = 0;
2162 info.si_code = TARGET_TRAP_BRKPT;
2163 queue_signal(env, info.si_signo, &info);
2164 }
2165 }
2166 break;
2167 default:
2168 printf ("Unhandled trap: 0x%x\n", trapnr);
2169 cpu_dump_state(env, stderr, fprintf, 0);
2170 exit (1);
2171 }
2172 process_pending_signals (env);
2173 }
2174 }
2175 #endif /* TARGET_ALPHA */
2176
2177 static void usage(void)
2178 {
2179 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2180 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2181 "Linux CPU emulator (compiled for %s emulation)\n"
2182 "\n"
2183 "Standard options:\n"
2184 "-h print this help\n"
2185 "-g port wait gdb connection to port\n"
2186 "-L path set the elf interpreter prefix (default=%s)\n"
2187 "-s size set the stack size in bytes (default=%ld)\n"
2188 "-cpu model select CPU (-cpu ? for list)\n"
2189 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2190 "\n"
2191 "Debug options:\n"
2192 "-d options activate log (logfile=%s)\n"
2193 "-p pagesize set the host page size to 'pagesize'\n"
2194 "-strace log system calls\n"
2195 "\n"
2196 "Environment variables:\n"
2197 "QEMU_STRACE Print system calls and arguments similar to the\n"
2198 " 'strace' program. Enable by setting to any value.\n"
2199 ,
2200 TARGET_ARCH,
2201 interp_prefix,
2202 x86_stack_size,
2203 DEBUG_LOGFILE);
2204 _exit(1);
2205 }
2206
2207 THREAD CPUState *thread_env;
2208
2209 /* Assumes contents are already zeroed. */
2210 void init_task_state(TaskState *ts)
2211 {
2212 int i;
2213
2214 ts->used = 1;
2215 ts->first_free = ts->sigqueue_table;
2216 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2217 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2218 }
2219 ts->sigqueue_table[i].next = NULL;
2220 }
2221
2222 int main(int argc, char **argv, char **envp)
2223 {
2224 const char *filename;
2225 const char *cpu_model;
2226 struct target_pt_regs regs1, *regs = &regs1;
2227 struct image_info info1, *info = &info1;
2228 TaskState ts1, *ts = &ts1;
2229 CPUState *env;
2230 int optind;
2231 const char *r;
2232 int gdbstub_port = 0;
2233 int drop_ld_preload = 0, environ_count = 0;
2234 char **target_environ, **wrk, **dst;
2235
2236 if (argc <= 1)
2237 usage();
2238
2239 qemu_cache_utils_init(envp);
2240
2241 /* init debug */
2242 cpu_set_log_filename(DEBUG_LOGFILE);
2243
2244 cpu_model = NULL;
2245 optind = 1;
2246 for(;;) {
2247 if (optind >= argc)
2248 break;
2249 r = argv[optind];
2250 if (r[0] != '-')
2251 break;
2252 optind++;
2253 r++;
2254 if (!strcmp(r, "-")) {
2255 break;
2256 } else if (!strcmp(r, "d")) {
2257 int mask;
2258 const CPULogItem *item;
2259
2260 if (optind >= argc)
2261 break;
2262
2263 r = argv[optind++];
2264 mask = cpu_str_to_log_mask(r);
2265 if (!mask) {
2266 printf("Log items (comma separated):\n");
2267 for(item = cpu_log_items; item->mask != 0; item++) {
2268 printf("%-10s %s\n", item->name, item->help);
2269 }
2270 exit(1);
2271 }
2272 cpu_set_log(mask);
2273 } else if (!strcmp(r, "s")) {
2274 r = argv[optind++];
2275 x86_stack_size = strtol(r, (char **)&r, 0);
2276 if (x86_stack_size <= 0)
2277 usage();
2278 if (*r == 'M')
2279 x86_stack_size *= 1024 * 1024;
2280 else if (*r == 'k' || *r == 'K')
2281 x86_stack_size *= 1024;
2282 } else if (!strcmp(r, "L")) {
2283 interp_prefix = argv[optind++];
2284 } else if (!strcmp(r, "p")) {
2285 qemu_host_page_size = atoi(argv[optind++]);
2286 if (qemu_host_page_size == 0 ||
2287 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2288 fprintf(stderr, "page size must be a power of two\n");
2289 exit(1);
2290 }
2291 } else if (!strcmp(r, "g")) {
2292 gdbstub_port = atoi(argv[optind++]);
2293 } else if (!strcmp(r, "r")) {
2294 qemu_uname_release = argv[optind++];
2295 } else if (!strcmp(r, "cpu")) {
2296 cpu_model = argv[optind++];
2297 if (strcmp(cpu_model, "?") == 0) {
2298 /* XXX: implement xxx_cpu_list for targets that still miss it */
2299 #if defined(cpu_list)
2300 cpu_list(stdout, &fprintf);
2301 #endif
2302 _exit(1);
2303 }
2304 } else if (!strcmp(r, "drop-ld-preload")) {
2305 drop_ld_preload = 1;
2306 } else if (!strcmp(r, "strace")) {
2307 do_strace = 1;
2308 } else
2309 {
2310 usage();
2311 }
2312 }
2313 if (optind >= argc)
2314 usage();
2315 filename = argv[optind];
2316
2317 /* Zero out regs */
2318 memset(regs, 0, sizeof(struct target_pt_regs));
2319
2320 /* Zero out image_info */
2321 memset(info, 0, sizeof(struct image_info));
2322
2323 /* Scan interp_prefix dir for replacement files. */
2324 init_paths(interp_prefix);
2325
2326 if (cpu_model == NULL) {
2327 #if defined(TARGET_I386)
2328 #ifdef TARGET_X86_64
2329 cpu_model = "qemu64";
2330 #else
2331 cpu_model = "qemu32";
2332 #endif
2333 #elif defined(TARGET_ARM)
2334 cpu_model = "arm926";
2335 #elif defined(TARGET_M68K)
2336 cpu_model = "any";
2337 #elif defined(TARGET_SPARC)
2338 #ifdef TARGET_SPARC64
2339 cpu_model = "TI UltraSparc II";
2340 #else
2341 cpu_model = "Fujitsu MB86904";
2342 #endif
2343 #elif defined(TARGET_MIPS)
2344 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2345 cpu_model = "20Kc";
2346 #else
2347 cpu_model = "24Kf";
2348 #endif
2349 #elif defined(TARGET_PPC)
2350 #ifdef TARGET_PPC64
2351 cpu_model = "970";
2352 #else
2353 cpu_model = "750";
2354 #endif
2355 #else
2356 cpu_model = "any";
2357 #endif
2358 }
2359 cpu_exec_init_all(0);
2360 /* NOTE: we need to init the CPU at this stage to get
2361 qemu_host_page_size */
2362 env = cpu_init(cpu_model);
2363 if (!env) {
2364 fprintf(stderr, "Unable to find CPU definition\n");
2365 exit(1);
2366 }
2367 thread_env = env;
2368
2369 if (getenv("QEMU_STRACE")) {
2370 do_strace = 1;
2371 }
2372
2373 wrk = environ;
2374 while (*(wrk++))
2375 environ_count++;
2376
2377 target_environ = malloc((environ_count + 1) * sizeof(char *));
2378 if (!target_environ)
2379 abort();
2380 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2381 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2382 continue;
2383 *(dst++) = strdup(*wrk);
2384 }
2385 *dst = NULL; /* NULL terminate target_environ */
2386
2387 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2388 printf("Error loading %s\n", filename);
2389 _exit(1);
2390 }
2391
2392 for (wrk = target_environ; *wrk; wrk++) {
2393 free(*wrk);
2394 }
2395
2396 free(target_environ);
2397
2398 if (loglevel) {
2399 page_dump(logfile);
2400
2401 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2402 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2403 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2404 info->start_code);
2405 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2406 info->start_data);
2407 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2408 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2409 info->start_stack);
2410 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2411 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2412 }
2413
2414 target_set_brk(info->brk);
2415 syscall_init();
2416 signal_init();
2417
2418 /* build Task State */
2419 memset(ts, 0, sizeof(TaskState));
2420 init_task_state(ts);
2421 ts->info = info;
2422 env->opaque = ts;
2423 env->user_mode_only = 1;
2424
2425 #if defined(TARGET_I386)
2426 cpu_x86_set_cpl(env, 3);
2427
2428 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2429 env->hflags |= HF_PE_MASK;
2430 if (env->cpuid_features & CPUID_SSE) {
2431 env->cr[4] |= CR4_OSFXSR_MASK;
2432 env->hflags |= HF_OSFXSR_MASK;
2433 }
2434 #ifndef TARGET_ABI32
2435 /* enable 64 bit mode if possible */
2436 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2437 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2438 exit(1);
2439 }
2440 env->cr[4] |= CR4_PAE_MASK;
2441 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2442 env->hflags |= HF_LMA_MASK;
2443 #endif
2444
2445 /* flags setup : we activate the IRQs by default as in user mode */
2446 env->eflags |= IF_MASK;
2447
2448 /* linux register setup */
2449 #ifndef TARGET_ABI32
2450 env->regs[R_EAX] = regs->rax;
2451 env->regs[R_EBX] = regs->rbx;
2452 env->regs[R_ECX] = regs->rcx;
2453 env->regs[R_EDX] = regs->rdx;
2454 env->regs[R_ESI] = regs->rsi;
2455 env->regs[R_EDI] = regs->rdi;
2456 env->regs[R_EBP] = regs->rbp;
2457 env->regs[R_ESP] = regs->rsp;
2458 env->eip = regs->rip;
2459 #else
2460 env->regs[R_EAX] = regs->eax;
2461 env->regs[R_EBX] = regs->ebx;
2462 env->regs[R_ECX] = regs->ecx;
2463 env->regs[R_EDX] = regs->edx;
2464 env->regs[R_ESI] = regs->esi;
2465 env->regs[R_EDI] = regs->edi;
2466 env->regs[R_EBP] = regs->ebp;
2467 env->regs[R_ESP] = regs->esp;
2468 env->eip = regs->eip;
2469 #endif
2470
2471 /* linux interrupt setup */
2472 #ifndef TARGET_ABI32
2473 env->idt.limit = 511;
2474 #else
2475 env->idt.limit = 255;
2476 #endif
2477 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2478 PROT_READ|PROT_WRITE,
2479 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2480 idt_table = g2h(env->idt.base);
2481 set_idt(0, 0);
2482 set_idt(1, 0);
2483 set_idt(2, 0);
2484 set_idt(3, 3);
2485 set_idt(4, 3);
2486 set_idt(5, 0);
2487 set_idt(6, 0);
2488 set_idt(7, 0);
2489 set_idt(8, 0);
2490 set_idt(9, 0);
2491 set_idt(10, 0);
2492 set_idt(11, 0);
2493 set_idt(12, 0);
2494 set_idt(13, 0);
2495 set_idt(14, 0);
2496 set_idt(15, 0);
2497 set_idt(16, 0);
2498 set_idt(17, 0);
2499 set_idt(18, 0);
2500 set_idt(19, 0);
2501 set_idt(0x80, 3);
2502
2503 /* linux segment setup */
2504 {
2505 uint64_t *gdt_table;
2506 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2507 PROT_READ|PROT_WRITE,
2508 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2509 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2510 gdt_table = g2h(env->gdt.base);
2511 #ifdef TARGET_ABI32
2512 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2513 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2514 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2515 #else
2516 /* 64 bit code segment */
2517 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2518 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2519 DESC_L_MASK |
2520 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2521 #endif
2522 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2523 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2524 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2525 }
2526 cpu_x86_load_seg(env, R_CS, __USER_CS);
2527 cpu_x86_load_seg(env, R_SS, __USER_DS);
2528 #ifdef TARGET_ABI32
2529 cpu_x86_load_seg(env, R_DS, __USER_DS);
2530 cpu_x86_load_seg(env, R_ES, __USER_DS);
2531 cpu_x86_load_seg(env, R_FS, __USER_DS);
2532 cpu_x86_load_seg(env, R_GS, __USER_DS);
2533 /* This hack makes Wine work... */
2534 env->segs[R_FS].selector = 0;
2535 #else
2536 cpu_x86_load_seg(env, R_DS, 0);
2537 cpu_x86_load_seg(env, R_ES, 0);
2538 cpu_x86_load_seg(env, R_FS, 0);
2539 cpu_x86_load_seg(env, R_GS, 0);
2540 #endif
2541 #elif defined(TARGET_ARM)
2542 {
2543 int i;
2544 cpsr_write(env, regs->uregs[16], 0xffffffff);
2545 for(i = 0; i < 16; i++) {
2546 env->regs[i] = regs->uregs[i];
2547 }
2548 }
2549 #elif defined(TARGET_SPARC)
2550 {
2551 int i;
2552 env->pc = regs->pc;
2553 env->npc = regs->npc;
2554 env->y = regs->y;
2555 for(i = 0; i < 8; i++)
2556 env->gregs[i] = regs->u_regs[i];
2557 for(i = 0; i < 8; i++)
2558 env->regwptr[i] = regs->u_regs[i + 8];
2559 }
2560 #elif defined(TARGET_PPC)
2561 {
2562 int i;
2563
2564 #if defined(TARGET_PPC64)
2565 #if defined(TARGET_ABI32)
2566 env->msr &= ~((target_ulong)1 << MSR_SF);
2567 #else
2568 env->msr |= (target_ulong)1 << MSR_SF;
2569 #endif
2570 #endif
2571 env->nip = regs->nip;
2572 for(i = 0; i < 32; i++) {
2573 env->gpr[i] = regs->gpr[i];
2574 }
2575 }
2576 #elif defined(TARGET_M68K)
2577 {
2578 env->pc = regs->pc;
2579 env->dregs[0] = regs->d0;
2580 env->dregs[1] = regs->d1;
2581 env->dregs[2] = regs->d2;
2582 env->dregs[3] = regs->d3;
2583 env->dregs[4] = regs->d4;
2584 env->dregs[5] = regs->d5;
2585 env->dregs[6] = regs->d6;
2586 env->dregs[7] = regs->d7;
2587 env->aregs[0] = regs->a0;
2588 env->aregs[1] = regs->a1;
2589 env->aregs[2] = regs->a2;
2590 env->aregs[3] = regs->a3;
2591 env->aregs[4] = regs->a4;
2592 env->aregs[5] = regs->a5;
2593 env->aregs[6] = regs->a6;
2594 env->aregs[7] = regs->usp;
2595 env->sr = regs->sr;
2596 ts->sim_syscalls = 1;
2597 }
2598 #elif defined(TARGET_MIPS)
2599 {
2600 int i;
2601
2602 for(i = 0; i < 32; i++) {
2603 env->active_tc.gpr[i] = regs->regs[i];
2604 }
2605 env->active_tc.PC = regs->cp0_epc;
2606 }
2607 #elif defined(TARGET_SH4)
2608 {
2609 int i;
2610
2611 for(i = 0; i < 16; i++) {
2612 env->gregs[i] = regs->regs[i];
2613 }
2614 env->pc = regs->pc;
2615 }
2616 #elif defined(TARGET_ALPHA)
2617 {
2618 int i;
2619
2620 for(i = 0; i < 28; i++) {
2621 env->ir[i] = ((abi_ulong *)regs)[i];
2622 }
2623 env->ipr[IPR_USP] = regs->usp;
2624 env->ir[30] = regs->usp;
2625 env->pc = regs->pc;
2626 env->unique = regs->unique;
2627 }
2628 #elif defined(TARGET_CRIS)
2629 {
2630 env->regs[0] = regs->r0;
2631 env->regs[1] = regs->r1;
2632 env->regs[2] = regs->r2;
2633 env->regs[3] = regs->r3;
2634 env->regs[4] = regs->r4;
2635 env->regs[5] = regs->r5;
2636 env->regs[6] = regs->r6;
2637 env->regs[7] = regs->r7;
2638 env->regs[8] = regs->r8;
2639 env->regs[9] = regs->r9;
2640 env->regs[10] = regs->r10;
2641 env->regs[11] = regs->r11;
2642 env->regs[12] = regs->r12;
2643 env->regs[13] = regs->r13;
2644 env->regs[14] = info->start_stack;
2645 env->regs[15] = regs->acr;
2646 env->pc = regs->erp;
2647 }
2648 #else
2649 #error unsupported target CPU
2650 #endif
2651
2652 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2653 ts->stack_base = info->start_stack;
2654 ts->heap_base = info->brk;
2655 /* This will be filled in on the first SYS_HEAPINFO call. */
2656 ts->heap_limit = 0;
2657 #endif
2658
2659 if (gdbstub_port) {
2660 gdbserver_start (gdbstub_port);
2661 gdb_handlesig(env, 0);
2662 }
2663 cpu_loop(env);
2664 /* never exits */
2665 return 0;
2666 }
jz4740 based target emulation