tcg/ppc64/tcg-target.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #define TCG_TARGET_PPC64 1
  25
  26 #define TCG_TARGET_REG_BITS 64
  27 #define TCG_TARGET_WORDS_BIGENDIAN
  28 #define TCG_TARGET_NB_REGS 32
  29
  30 enum {
  31     TCG_REG_R0 = 0,
  32     TCG_REG_R1,
  33     TCG_REG_R2,
  34     TCG_REG_R3,
  35     TCG_REG_R4,
  36     TCG_REG_R5,
  37     TCG_REG_R6,
  38     TCG_REG_R7,
  39     TCG_REG_R8,
  40     TCG_REG_R9,
  41     TCG_REG_R10,
  42     TCG_REG_R11,
  43     TCG_REG_R12,
  44     TCG_REG_R13,
  45     TCG_REG_R14,
  46     TCG_REG_R15,
  47     TCG_REG_R16,
  48     TCG_REG_R17,
  49     TCG_REG_R18,
  50     TCG_REG_R19,
  51     TCG_REG_R20,
  52     TCG_REG_R21,
  53     TCG_REG_R22,
  54     TCG_REG_R23,
  55     TCG_REG_R24,
  56     TCG_REG_R25,
  57     TCG_REG_R26,
  58     TCG_REG_R27,
  59     TCG_REG_R28,
  60     TCG_REG_R29,
  61     TCG_REG_R30,
  62     TCG_REG_R31
  63 };
  64
  65 /* used for function call generation */
  66 #define TCG_REG_CALL_STACK TCG_REG_R1
  67 #define TCG_TARGET_STACK_ALIGN 16
  68 #define TCG_TARGET_CALL_STACK_OFFSET 48
  69
  70 /* optional instructions */
  71 #define TCG_TARGET_HAS_neg_i32
  72 #define TCG_TARGET_HAS_div_i32
  73 #define TCG_TARGET_HAS_neg_i64
  74 #define TCG_TARGET_HAS_div_i64
  75 #define TCG_TARGET_HAS_ext8s_i32
  76 #define TCG_TARGET_HAS_ext16s_i32
  77 #define TCG_TARGET_HAS_ext8s_i64
  78 #define TCG_TARGET_HAS_ext16s_i64
  79 #define TCG_TARGET_HAS_ext32s_i64
  80
  81 #define TCG_AREG0 TCG_REG_R27
  82 #define TCG_AREG1 TCG_REG_R24
  83 #define TCG_AREG2 TCG_REG_R25
  84 #define TCG_AREG3 TCG_REG_R26
  85
  86 /* taken directly from tcg-dyngen.c */
  87 #define MIN_CACHE_LINE_SIZE 8 /* conservative value */
  88
  89 static inline void flush_icache_range(unsigned long start, unsigned long stop)
  90 {
  91     unsigned long p;
  92
  93     start &= ~(MIN_CACHE_LINE_SIZE - 1);
  94     stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);
  95
  96     for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
  97         asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
  98     }
  99     asm volatile ("sync" : : : "memory");
 100     for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
 101         asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
 102     }
 103     asm volatile ("sync" : : : "memory");
 104     asm volatile ("isync" : : : "memory");
 105 }