add debug information for emc
[qemu/qemu-JZ.git] / tests / cris / check_addcm.c
blob9ffea29bd926c7aa13e362a45d964348589a3f5e
1 #include <stdio.h>
2 #include <stdlib.h>
3 #include <stdint.h>
4 #include "sys.h"
5 #include "crisutils.h"
7 /* need to avoid acr as source here. */
8 extern inline int cris_addc_m(int a, const int *b) {
9 asm volatile ("addc [%1], %0\n" : "+r" (a) : "r" (b));
10 return a;
13 /* 'b' is a crisv32 constrain to avoid postinc with $acr. */
14 extern inline int cris_addc_pi_m(int a, int **b) {
15 asm volatile ("addc [%1+], %0\n" : "+r" (a), "+b" (*b));
16 return a;
19 #define verify_addc_m(a, b, res, n, z, v, c) \
20 { \
21 int r; \
22 r = cris_addc_m((a), (b)); \
23 cris_tst_cc((n), (z), (v), (c)); \
24 if (r != (res)) \
25 err(); \
28 #define verify_addc_pi_m(a, b, res, n, z, v, c) \
29 { \
30 int r; \
31 r = cris_addc_pi_m((a), (b)); \
32 cris_tst_cc((n), (z), (v), (c)); \
33 if (r != (res)) \
34 err(); \
37 int x[] = { 0, 0, 2, -1, 0xffff, -1, 0x5432f789};
39 int main(void)
41 int *p = (void *)&x[0];
42 #if 1
43 cris_tst_cc_init();
44 asm volatile ("clearf cz");
45 verify_addc_m(0, p, 0, 0, 0, 0, 0);
47 cris_tst_cc_init();
48 asm volatile ("setf z");
49 verify_addc_m(0, p, 0, 0, 1, 0, 0);
51 cris_tst_cc_init();
52 asm volatile ("setf c");
53 verify_addc_m(0, p, 1, 0, 0, 0, 0);
55 cris_tst_cc_init();
56 asm volatile ("clearf c");
57 verify_addc_pi_m(0, &p, 0, 0, 1, 0, 0);
59 p = &x[1];
60 cris_tst_cc_init();
61 asm volatile ("setf c");
62 verify_addc_pi_m(0, &p, 1, 0, 0, 0, 0);
64 if (p != &x[2])
65 err();
67 cris_tst_cc_init();
68 asm volatile ("clearf c");
69 verify_addc_pi_m(-1, &p, 1, 0, 0, 0, 1);
71 if (p != &x[3])
72 err();
73 #endif
74 p = &x[3];
75 /* TODO: investigate why this one fails. */
76 cris_tst_cc_init();
77 asm volatile ("setf c");
78 verify_addc_m(2, p, 2, 0, 0, 0, 1);
79 p += 4;
81 pass();
82 return 0;