Fixed unintentional reversion of floating point support configuration
[qemu/openrisc.git] / target-openrisc / cpu.h
blob3d2cea02127bb72210b2fd3842f37f7a326bfcfb
1 /*
2 * OpenRISC virtual CPU header
4 * Copyright (c) 2009 Stuart Brady <stuart.brady@gmail.com>
5 * Copyright (c) 2009 Laurent Desnogues
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Library General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Library General Public License for more details.
17 * You should have received a copy of the GNU Library General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
21 #ifndef CPU_OPENRISC_H
22 #define CPU_OPENRISC_H
24 #include "config.h"
26 #if defined (TARGET_OPENRISC64)
27 #define TARGET_LONG_BITS 64
28 #define ELF_MACHINE EM_NONE
29 #else
30 #define TARGET_LONG_BITS 32
31 #define ELF_MACHINE EM_OPENRISC
32 #endif
34 #define CPUState struct CPUOpenRISCState
36 #include "cpu-defs.h"
38 /* XXX: tempo */
39 #define NB_MMU_MODES 1
41 /* regs are the general-purpose registers */
43 struct openrisc_boot_info;
45 typedef struct CPUOpenRISCState {
46 target_ulong gpr[32];
48 target_ulong pc;
49 target_ulong npc;
51 CPU_COMMON
53 /* Fields after the common ones are preserved on reset. */
54 struct openrisc_boot_info *boot_info;
55 } CPUOpenRISCState;
57 CPUOpenRISCState *cpu_openrisc_init(const char *cpu_model);
58 void openrisc_translate_init(void);
59 int cpu_openrisc_exec(CPUOpenRISCState *s);
60 void do_interrupt(CPUOpenRISCState *);
62 void openrisc_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
64 #define TARGET_PAGE_BITS 13
66 #define cpu_init cpu_openrisc_init
67 #define cpu_exec cpu_openrisc_exec
68 #define cpu_gen_code cpu_openrisc_gen_code
69 #define cpu_signal_handler cpu_openrisc_signal_handler
70 #define cpu_list openrisc_cpu_list
72 /* XXX: tempo */
73 static inline int cpu_mmu_index (CPUState *env)
75 return 0;
78 #include "cpu-all.h"
79 #include "exec-all.h"
81 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
83 env->pc = tb->pc;
84 env->npc = tb->cflags;
87 static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
88 target_ulong *cs_base, int *flags)
90 *pc = env->pc;
91 *cs_base = env->npc;
92 /* XXX: tempo */
93 *flags = 0;
96 #endif