Fix the size of the property fields.
[qemu/navara.git] / target-ppc / kvm.c
blobb53d6e99aeffbf52750868d8cdc0cd20d320dcce
1 /*
2 * PowerPC implementation of KVM hooks
4 * Copyright IBM Corp. 2007
6 * Authors:
7 * Jerone Young <jyoung5@us.ibm.com>
8 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
9 * Hollis Blanchard <hollisb@us.ibm.com>
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
16 #include <sys/types.h>
17 #include <sys/ioctl.h>
18 #include <sys/mman.h>
20 #include <linux/kvm.h>
22 #include "qemu-common.h"
23 #include "qemu-timer.h"
24 #include "sysemu.h"
25 #include "kvm.h"
26 #include "kvm_ppc.h"
27 #include "cpu.h"
28 #include "device_tree.h"
30 //#define DEBUG_KVM
32 #ifdef DEBUG_KVM
33 #define dprintf(fmt, ...) \
34 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
35 #else
36 #define dprintf(fmt, ...) \
37 do { } while (0)
38 #endif
40 int kvm_arch_init(KVMState *s, int smp_cpus)
42 return 0;
45 int kvm_arch_init_vcpu(CPUState *cenv)
47 int ret = 0;
48 struct kvm_sregs sregs;
50 sregs.pvr = cenv->spr[SPR_PVR];
51 ret = kvm_vcpu_ioctl(cenv, KVM_SET_SREGS, &sregs);
53 return ret;
56 int kvm_arch_put_registers(CPUState *env)
58 struct kvm_regs regs;
59 int ret;
60 int i;
62 ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
63 if (ret < 0)
64 return ret;
66 regs.ctr = env->ctr;
67 regs.lr = env->lr;
68 regs.xer = env->xer;
69 regs.msr = env->msr;
70 regs.pc = env->nip;
72 regs.srr0 = env->spr[SPR_SRR0];
73 regs.srr1 = env->spr[SPR_SRR1];
75 regs.sprg0 = env->spr[SPR_SPRG0];
76 regs.sprg1 = env->spr[SPR_SPRG1];
77 regs.sprg2 = env->spr[SPR_SPRG2];
78 regs.sprg3 = env->spr[SPR_SPRG3];
79 regs.sprg4 = env->spr[SPR_SPRG4];
80 regs.sprg5 = env->spr[SPR_SPRG5];
81 regs.sprg6 = env->spr[SPR_SPRG6];
82 regs.sprg7 = env->spr[SPR_SPRG7];
84 for (i = 0;i < 32; i++)
85 regs.gpr[i] = env->gpr[i];
87 ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, &regs);
88 if (ret < 0)
89 return ret;
91 return ret;
94 int kvm_arch_get_registers(CPUState *env)
96 struct kvm_regs regs;
97 uint32_t i, ret;
99 ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
100 if (ret < 0)
101 return ret;
103 env->ctr = regs.ctr;
104 env->lr = regs.lr;
105 env->xer = regs.xer;
106 env->msr = regs.msr;
107 env->nip = regs.pc;
109 env->spr[SPR_SRR0] = regs.srr0;
110 env->spr[SPR_SRR1] = regs.srr1;
112 env->spr[SPR_SPRG0] = regs.sprg0;
113 env->spr[SPR_SPRG1] = regs.sprg1;
114 env->spr[SPR_SPRG2] = regs.sprg2;
115 env->spr[SPR_SPRG3] = regs.sprg3;
116 env->spr[SPR_SPRG4] = regs.sprg4;
117 env->spr[SPR_SPRG5] = regs.sprg5;
118 env->spr[SPR_SPRG6] = regs.sprg6;
119 env->spr[SPR_SPRG7] = regs.sprg7;
121 for (i = 0;i < 32; i++)
122 env->gpr[i] = regs.gpr[i];
124 return 0;
127 #if defined(TARGET_PPCEMB)
128 #define PPC_INPUT_INT PPC40x_INPUT_INT
129 #elif defined(TARGET_PPC64)
130 #define PPC_INPUT_INT PPC970_INPUT_INT
131 #else
132 #define PPC_INPUT_INT PPC6xx_INPUT_INT
133 #endif
135 int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
137 int r;
138 unsigned irq;
140 /* PowerPC Qemu tracks the various core input pins (interrupt, critical
141 * interrupt, reset, etc) in PPC-specific env->irq_input_state. */
142 if (run->ready_for_interrupt_injection &&
143 (env->interrupt_request & CPU_INTERRUPT_HARD) &&
144 (env->irq_input_state & (1<<PPC_INPUT_INT)))
146 /* For now KVM disregards the 'irq' argument. However, in the
147 * future KVM could cache it in-kernel to avoid a heavyweight exit
148 * when reading the UIC.
150 irq = -1U;
152 dprintf("injected interrupt %d\n", irq);
153 r = kvm_vcpu_ioctl(env, KVM_INTERRUPT, &irq);
154 if (r < 0)
155 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
158 /* We don't know if there are more interrupts pending after this. However,
159 * the guest will return to userspace in the course of handling this one
160 * anyways, so we will get a chance to deliver the rest. */
161 return 0;
164 int kvm_arch_post_run(CPUState *env, struct kvm_run *run)
166 return 0;
169 static int kvmppc_handle_halt(CPUState *env)
171 if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
172 env->halted = 1;
173 env->exception_index = EXCP_HLT;
176 return 1;
179 /* map dcr access to existing qemu dcr emulation */
180 static int kvmppc_handle_dcr_read(CPUState *env, uint32_t dcrn, uint32_t *data)
182 if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0)
183 fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn);
185 return 1;
188 static int kvmppc_handle_dcr_write(CPUState *env, uint32_t dcrn, uint32_t data)
190 if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0)
191 fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn);
193 return 1;
196 int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run)
198 int ret = 0;
200 switch (run->exit_reason) {
201 case KVM_EXIT_DCR:
202 if (run->dcr.is_write) {
203 dprintf("handle dcr write\n");
204 ret = kvmppc_handle_dcr_write(env, run->dcr.dcrn, run->dcr.data);
205 } else {
206 dprintf("handle dcr read\n");
207 ret = kvmppc_handle_dcr_read(env, run->dcr.dcrn, &run->dcr.data);
209 break;
210 case KVM_EXIT_HLT:
211 dprintf("handle halt\n");
212 ret = kvmppc_handle_halt(env);
213 break;
216 return ret;