hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "monitor.h"
  35 #include "fw_cfg.h"
  36 #include "virtio-blk.h"
  37 #include "virtio-balloon.h"
  38 #include "virtio-console.h"
  39 #include "hpet_emul.h"
  40 #include "smbios.h"
  41
  42 /* output Bochs bios info messages */
  43 //#define DEBUG_BIOS
  44
  45 #define BIOS_FILENAME "bios.bin"
  46 #define VGABIOS_FILENAME "vgabios.bin"
  47 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  48
  49 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  50
  51 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  52 #define ACPI_DATA_SIZE       0x10000
  53 #define BIOS_CFG_IOPORT 0x510
  54 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  55 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
  56
  57 #define MAX_IDE_BUS 2
  58
  59 static fdctrl_t *floppy_controller;
  60 static RTCState *rtc_state;
  61 static PITState *pit;
  62 static IOAPICState *ioapic;
  63 static PCIDevice *i440fx_state;
  64
  65 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  66 {
  67 }
  68
  69 /* MSDOS compatibility mode FPU exception support */
  70 static qemu_irq ferr_irq;
  71 /* XXX: add IGNNE support */
  72 void cpu_set_ferr(CPUX86State *s)
  73 {
  74     qemu_irq_raise(ferr_irq);
  75 }
  76
  77 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  78 {
  79     qemu_irq_lower(ferr_irq);
  80 }
  81
  82 /* TSC handling */
  83 uint64_t cpu_get_tsc(CPUX86State *env)
  84 {
  85     /* Note: when using kqemu, it is more logical to return the host TSC
  86        because kqemu does not trap the RDTSC instruction for
  87        performance reasons */
  88 #ifdef USE_KQEMU
  89     if (env->kqemu_enabled) {
  90         return cpu_get_real_ticks();
  91     } else
  92 #endif
  93     {
  94         return cpu_get_ticks();
  95     }
  96 }
  97
  98 /* SMM support */
  99 void cpu_smm_update(CPUState *env)
 100 {
 101     if (i440fx_state && env == first_cpu)
 102         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
 103 }
 104
 105
 106 /* IRQ handling */
 107 int cpu_get_pic_interrupt(CPUState *env)
 108 {
 109     int intno;
 110
 111     intno = apic_get_interrupt(env);
 112     if (intno >= 0) {
 113         /* set irq request if a PIC irq is still pending */
 114         /* XXX: improve that */
 115         pic_update_irq(isa_pic);
 116         return intno;
 117     }
 118     /* read the irq from the PIC */
 119     if (!apic_accept_pic_intr(env))
 120         return -1;
 121
 122     intno = pic_read_irq(isa_pic);
 123     return intno;
 124 }
 125
 126 static void pic_irq_request(void *opaque, int irq, int level)
 127 {
 128     CPUState *env = first_cpu;
 129
 130     if (env->apic_state) {
 131         while (env) {
 132             if (apic_accept_pic_intr(env))
 133                 apic_deliver_pic_intr(env, level);
 134             env = env->next_cpu;
 135         }
 136     } else {
 137         if (level)
 138             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 139         else
 140             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 141     }
 142 }
 143
 144 /* PC cmos mappings */
 145
 146 #define REG_EQUIPMENT_BYTE          0x14
 147
 148 static int cmos_get_fd_drive_type(int fd0)
 149 {
 150     int val;
 151
 152     switch (fd0) {
 153     case 0:
 154         /* 1.44 Mb 3"5 drive */
 155         val = 4;
 156         break;
 157     case 1:
 158         /* 2.88 Mb 3"5 drive */
 159         val = 5;
 160         break;
 161     case 2:
 162         /* 1.2 Mb 5"5 drive */
 163         val = 2;
 164         break;
 165     default:
 166         val = 0;
 167         break;
 168     }
 169     return val;
 170 }
 171
 172 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 173 {
 174     RTCState *s = rtc_state;
 175     int cylinders, heads, sectors;
 176     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 177     rtc_set_memory(s, type_ofs, 47);
 178     rtc_set_memory(s, info_ofs, cylinders);
 179     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 180     rtc_set_memory(s, info_ofs + 2, heads);
 181     rtc_set_memory(s, info_ofs + 3, 0xff);
 182     rtc_set_memory(s, info_ofs + 4, 0xff);
 183     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 184     rtc_set_memory(s, info_ofs + 6, cylinders);
 185     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 186     rtc_set_memory(s, info_ofs + 8, sectors);
 187 }
 188
 189 /* convert boot_device letter to something recognizable by the bios */
 190 static int boot_device2nibble(char boot_device)
 191 {
 192     switch(boot_device) {
 193     case 'a':
 194     case 'b':
 195         return 0x01; /* floppy boot */
 196     case 'c':
 197         return 0x02; /* hard drive boot */
 198     case 'd':
 199         return 0x03; /* CD-ROM boot */
 200     case 'n':
 201         return 0x04; /* Network boot */
 202     }
 203     return 0;
 204 }
 205
 206 /* copy/pasted from cmos_init, should be made a general function
 207  and used there as well */
 208 static int pc_boot_set(void *opaque, const char *boot_device)
 209 {
 210     Monitor *mon = cur_mon;
 211 #define PC_MAX_BOOT_DEVICES 3
 212     RTCState *s = (RTCState *)opaque;
 213     int nbds, bds[3] = { 0, };
 214     int i;
 215
 216     nbds = strlen(boot_device);
 217     if (nbds > PC_MAX_BOOT_DEVICES) {
 218         monitor_printf(mon, "Too many boot devices for PC\n");
 219         return(1);
 220     }
 221     for (i = 0; i < nbds; i++) {
 222         bds[i] = boot_device2nibble(boot_device[i]);
 223         if (bds[i] == 0) {
 224             monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
 225                            boot_device[i]);
 226             return(1);
 227         }
 228     }
 229     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 230     rtc_set_memory(s, 0x38, (bds[2] << 4));
 231     return(0);
 232 }
 233
 234 /* hd_table must contain 4 block drivers */
 235 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 236                       const char *boot_device, BlockDriverState **hd_table)
 237 {
 238     RTCState *s = rtc_state;
 239     int nbds, bds[3] = { 0, };
 240     int val;
 241     int fd0, fd1, nb;
 242     int i;
 243
 244     /* various important CMOS locations needed by PC/Bochs bios */
 245
 246     /* memory size */
 247     val = 640; /* base memory in K */
 248     rtc_set_memory(s, 0x15, val);
 249     rtc_set_memory(s, 0x16, val >> 8);
 250
 251     val = (ram_size / 1024) - 1024;
 252     if (val > 65535)
 253         val = 65535;
 254     rtc_set_memory(s, 0x17, val);
 255     rtc_set_memory(s, 0x18, val >> 8);
 256     rtc_set_memory(s, 0x30, val);
 257     rtc_set_memory(s, 0x31, val >> 8);
 258
 259     if (above_4g_mem_size) {
 260         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 261         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 262         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 263     }
 264
 265     if (ram_size > (16 * 1024 * 1024))
 266         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 267     else
 268         val = 0;
 269     if (val > 65535)
 270         val = 65535;
 271     rtc_set_memory(s, 0x34, val);
 272     rtc_set_memory(s, 0x35, val >> 8);
 273
 274     /* set the number of CPU */
 275     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 276
 277     /* set boot devices, and disable floppy signature check if requested */
 278 #define PC_MAX_BOOT_DEVICES 3
 279     nbds = strlen(boot_device);
 280     if (nbds > PC_MAX_BOOT_DEVICES) {
 281         fprintf(stderr, "Too many boot devices for PC\n");
 282         exit(1);
 283     }
 284     for (i = 0; i < nbds; i++) {
 285         bds[i] = boot_device2nibble(boot_device[i]);
 286         if (bds[i] == 0) {
 287             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 288                     boot_device[i]);
 289             exit(1);
 290         }
 291     }
 292     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 293     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 294
 295     /* floppy type */
 296
 297     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 298     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 299
 300     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 301     rtc_set_memory(s, 0x10, val);
 302
 303     val = 0;
 304     nb = 0;
 305     if (fd0 < 3)
 306         nb++;
 307     if (fd1 < 3)
 308         nb++;
 309     switch (nb) {
 310     case 0:
 311         break;
 312     case 1:
 313         val |= 0x01; /* 1 drive, ready for boot */
 314         break;
 315     case 2:
 316         val |= 0x41; /* 2 drives, ready for boot */
 317         break;
 318     }
 319     val |= 0x02; /* FPU is there */
 320     val |= 0x04; /* PS/2 mouse installed */
 321     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 322
 323     /* hard drives */
 324
 325     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 326     if (hd_table[0])
 327         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 328     if (hd_table[1])
 329         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 330
 331     val = 0;
 332     for (i = 0; i < 4; i++) {
 333         if (hd_table[i]) {
 334             int cylinders, heads, sectors, translation;
 335             /* NOTE: bdrv_get_geometry_hint() returns the physical
 336                 geometry.  It is always such that: 1 <= sects <= 63, 1
 337                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 338                 geometry can be different if a translation is done. */
 339             translation = bdrv_get_translation_hint(hd_table[i]);
 340             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 341                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 342                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 343                     /* No translation. */
 344                     translation = 0;
 345                 } else {
 346                     /* LBA translation. */
 347                     translation = 1;
 348                 }
 349             } else {
 350                 translation--;
 351             }
 352             val |= translation << (i * 2);
 353         }
 354     }
 355     rtc_set_memory(s, 0x39, val);
 356 }
 357
 358 void ioport_set_a20(int enable)
 359 {
 360     /* XXX: send to all CPUs ? */
 361     cpu_x86_set_a20(first_cpu, enable);
 362 }
 363
 364 int ioport_get_a20(void)
 365 {
 366     return ((first_cpu->a20_mask >> 20) & 1);
 367 }
 368
 369 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 370 {
 371     ioport_set_a20((val >> 1) & 1);
 372     /* XXX: bit 0 is fast reset */
 373 }
 374
 375 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 376 {
 377     return ioport_get_a20() << 1;
 378 }
 379
 380 /***********************************************************/
 381 /* Bochs BIOS debug ports */
 382
 383 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 384 {
 385     static const char shutdown_str[8] = "Shutdown";
 386     static int shutdown_index = 0;
 387
 388     switch(addr) {
 389         /* Bochs BIOS messages */
 390     case 0x400:
 391     case 0x401:
 392         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 393         exit(1);
 394     case 0x402:
 395     case 0x403:
 396 #ifdef DEBUG_BIOS
 397         fprintf(stderr, "%c", val);
 398 #endif
 399         break;
 400     case 0x8900:
 401         /* same as Bochs power off */
 402         if (val == shutdown_str[shutdown_index]) {
 403             shutdown_index++;
 404             if (shutdown_index == 8) {
 405                 shutdown_index = 0;
 406                 qemu_system_shutdown_request();
 407             }
 408         } else {
 409             shutdown_index = 0;
 410         }
 411         break;
 412
 413         /* LGPL'ed VGA BIOS messages */
 414     case 0x501:
 415     case 0x502:
 416         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 417         exit(1);
 418     case 0x500:
 419     case 0x503:
 420 #ifdef DEBUG_BIOS
 421         fprintf(stderr, "%c", val);
 422 #endif
 423         break;
 424     }
 425 }
 426
 427 static void bochs_bios_init(void)
 428 {
 429     void *fw_cfg;
 430     uint8_t *smbios_table;
 431     size_t smbios_len;
 432
 433     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 434     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 435     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 436     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 437     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 438
 439     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 440     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 441     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 442     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 443
 444     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 445     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 446     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 447     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
 448                      acpi_tables_len);
 449
 450     smbios_table = smbios_get_table(&smbios_len);
 451     if (smbios_table)
 452         fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
 453                          smbios_table, smbios_len);
 454 }
 455
 456 /* Generate an initial boot sector which sets state and jump to
 457    a specified vector */
 458 static void generate_bootsect(target_phys_addr_t option_rom,
 459                               uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 460 {
 461     uint8_t rom[512], *p, *reloc;
 462     uint8_t sum;
 463     int i;
 464
 465     memset(rom, 0, sizeof(rom));
 466
 467     p = rom;
 468     /* Make sure we have an option rom signature */
 469     *p++ = 0x55;
 470     *p++ = 0xaa;
 471
 472     /* ROM size in sectors*/
 473     *p++ = 1;
 474
 475     /* Hook int19 */
 476
 477     *p++ = 0x50;                /* push ax */
 478     *p++ = 0x1e;                /* push ds */
 479     *p++ = 0x31; *p++ = 0xc0;   /* xor ax, ax */
 480     *p++ = 0x8e; *p++ = 0xd8;   /* mov ax, ds */
 481
 482     *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
 483     *p++ = 0x64; *p++ = 0x00;
 484     reloc = p;
 485     *p++ = 0x00; *p++ = 0x00;
 486
 487     *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
 488     *p++ = 0x66; *p++ = 0x00;
 489
 490     *p++ = 0x1f;                /* pop ds */
 491     *p++ = 0x58;                /* pop ax */
 492     *p++ = 0xcb;                /* lret */
 493
 494     /* Actual code */
 495     *reloc = (p - rom);
 496
 497     *p++ = 0xfa;                /* CLI */
 498     *p++ = 0xfc;                /* CLD */
 499
 500     for (i = 0; i < 6; i++) {
 501         if (i == 1)             /* Skip CS */
 502             continue;
 503
 504         *p++ = 0xb8;            /* MOV AX,imm16 */
 505         *p++ = segs[i];
 506         *p++ = segs[i] >> 8;
 507         *p++ = 0x8e;            /* MOV <seg>,AX */
 508         *p++ = 0xc0 + (i << 3);
 509     }
 510
 511     for (i = 0; i < 8; i++) {
 512         *p++ = 0x66;            /* 32-bit operand size */
 513         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 514         *p++ = gpr[i];
 515         *p++ = gpr[i] >> 8;
 516         *p++ = gpr[i] >> 16;
 517         *p++ = gpr[i] >> 24;
 518     }
 519
 520     *p++ = 0xea;                /* JMP FAR */
 521     *p++ = ip;                  /* IP */
 522     *p++ = ip >> 8;
 523     *p++ = segs[1];             /* CS */
 524     *p++ = segs[1] >> 8;
 525
 526     /* sign rom */
 527     sum = 0;
 528     for (i = 0; i < (sizeof(rom) - 1); i++)
 529         sum += rom[i];
 530     rom[sizeof(rom) - 1] = -sum;
 531
 532     cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
 533 }
 534
 535 static long get_file_size(FILE *f)
 536 {
 537     long where, size;
 538
 539     /* XXX: on Unix systems, using fstat() probably makes more sense */
 540
 541     where = ftell(f);
 542     fseek(f, 0, SEEK_END);
 543     size = ftell(f);
 544     fseek(f, where, SEEK_SET);
 545
 546     return size;
 547 }
 548
 549 static void load_linux(target_phys_addr_t option_rom,
 550                        const char *kernel_filename,
 551                        const char *initrd_filename,
 552                        const char *kernel_cmdline)
 553 {
 554     uint16_t protocol;
 555     uint32_t gpr[8];
 556     uint16_t seg[6];
 557     uint16_t real_seg;
 558     int setup_size, kernel_size, initrd_size, cmdline_size;
 559     uint32_t initrd_max;
 560     uint8_t header[1024];
 561     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 562     FILE *f, *fi;
 563
 564     /* Align to 16 bytes as a paranoia measure */
 565     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 566
 567     /* load the kernel header */
 568     f = fopen(kernel_filename, "rb");
 569     if (!f || !(kernel_size = get_file_size(f)) ||
 570         fread(header, 1, 1024, f) != 1024) {
 571         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 572                 kernel_filename);
 573         exit(1);
 574     }
 575
 576     /* kernel protocol version */
 577 #if 0
 578     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 579 #endif
 580     if (ldl_p(header+0x202) == 0x53726448)
 581         protocol = lduw_p(header+0x206);
 582     else
 583         protocol = 0;
 584
 585     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 586         /* Low kernel */
 587         real_addr    = 0x90000;
 588         cmdline_addr = 0x9a000 - cmdline_size;
 589         prot_addr    = 0x10000;
 590     } else if (protocol < 0x202) {
 591         /* High but ancient kernel */
 592         real_addr    = 0x90000;
 593         cmdline_addr = 0x9a000 - cmdline_size;
 594         prot_addr    = 0x100000;
 595     } else {
 596         /* High and recent kernel */
 597         real_addr    = 0x10000;
 598         cmdline_addr = 0x20000;
 599         prot_addr    = 0x100000;
 600     }
 601
 602 #if 0
 603     fprintf(stderr,
 604             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 605             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 606             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 607             real_addr,
 608             cmdline_addr,
 609             prot_addr);
 610 #endif
 611
 612     /* highest address for loading the initrd */
 613     if (protocol >= 0x203)
 614         initrd_max = ldl_p(header+0x22c);
 615     else
 616         initrd_max = 0x37ffffff;
 617
 618     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 619         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 620
 621     /* kernel command line */
 622     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 623
 624     if (protocol >= 0x202) {
 625         stl_p(header+0x228, cmdline_addr);
 626     } else {
 627         stw_p(header+0x20, 0xA33F);
 628         stw_p(header+0x22, cmdline_addr-real_addr);
 629     }
 630
 631     /* loader type */
 632     /* High nybble = B reserved for Qemu; low nybble is revision number.
 633        If this code is substantially changed, you may want to consider
 634        incrementing the revision. */
 635     if (protocol >= 0x200)
 636         header[0x210] = 0xB0;
 637
 638     /* heap */
 639     if (protocol >= 0x201) {
 640         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 641         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 642     }
 643
 644     /* load initrd */
 645     if (initrd_filename) {
 646         if (protocol < 0x200) {
 647             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 648             exit(1);
 649         }
 650
 651         fi = fopen(initrd_filename, "rb");
 652         if (!fi) {
 653             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 654                     initrd_filename);
 655             exit(1);
 656         }
 657
 658         initrd_size = get_file_size(fi);
 659         initrd_addr = (initrd_max-initrd_size) & ~4095;
 660
 661         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 662                 "\n", initrd_size, initrd_addr);
 663
 664         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 665             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 666                     initrd_filename);
 667             exit(1);
 668         }
 669         fclose(fi);
 670
 671         stl_p(header+0x218, initrd_addr);
 672         stl_p(header+0x21c, initrd_size);
 673     }
 674
 675     /* store the finalized header and load the rest of the kernel */
 676     cpu_physical_memory_write(real_addr, header, 1024);
 677
 678     setup_size = header[0x1f1];
 679     if (setup_size == 0)
 680         setup_size = 4;
 681
 682     setup_size = (setup_size+1)*512;
 683     kernel_size -= setup_size;  /* Size of protected-mode code */
 684
 685     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 686         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 687         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 688                 kernel_filename);
 689         exit(1);
 690     }
 691     fclose(f);
 692
 693     /* generate bootsector to set up the initial register state */
 694     real_seg = real_addr >> 4;
 695     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 696     seg[1] = real_seg+0x20;     /* CS */
 697     memset(gpr, 0, sizeof gpr);
 698     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 699
 700     generate_bootsect(option_rom, gpr, seg, 0);
 701 }
 702
 703 static void main_cpu_reset(void *opaque)
 704 {
 705     CPUState *env = opaque;
 706     cpu_reset(env);
 707 }
 708
 709 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 710 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 711 static const int ide_irq[2] = { 14, 15 };
 712
 713 #define NE2000_NB_MAX 6
 714
 715 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 716 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 717
 718 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 719 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 720
 721 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 722 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 723
 724 #ifdef HAS_AUDIO
 725 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 726 {
 727     struct soundhw *c;
 728     int audio_enabled = 0;
 729
 730     for (c = soundhw; !audio_enabled && c->name; ++c) {
 731         audio_enabled = c->enabled;
 732     }
 733
 734     if (audio_enabled) {
 735         AudioState *s;
 736
 737         s = AUD_init ();
 738         if (s) {
 739             for (c = soundhw; c->name; ++c) {
 740                 if (c->enabled) {
 741                     if (c->isa) {
 742                         c->init.init_isa (s, pic);
 743                     }
 744                     else {
 745                         if (pci_bus) {
 746                             c->init.init_pci (pci_bus, s);
 747                         }
 748                     }
 749                 }
 750             }
 751         }
 752     }
 753 }
 754 #endif
 755
 756 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 757 {
 758     static int nb_ne2k = 0;
 759
 760     if (nb_ne2k == NE2000_NB_MAX)
 761         return;
 762     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 763     nb_ne2k++;
 764 }
 765
 766 static int load_option_rom(const char *oprom, target_phys_addr_t start,
 767                            target_phys_addr_t end)
 768 {
 769         int size;
 770
 771         size = get_image_size(oprom);
 772         if (size > 0 && start + size > end) {
 773             fprintf(stderr, "Not enough space to load option rom '%s'\n",
 774                     oprom);
 775             exit(1);
 776         }
 777         size = load_image_targphys(oprom, start, end - start);
 778         if (size < 0) {
 779             fprintf(stderr, "Could not load option rom '%s'\n", oprom);
 780             exit(1);
 781         }
 782         /* Round up optiom rom size to the next 2k boundary */
 783         size = (size + 2047) & ~2047;
 784         return size;
 785 }
 786
 787 /* PC hardware initialisation */
 788 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 789                      const char *boot_device,
 790                      const char *kernel_filename, const char *kernel_cmdline,
 791                      const char *initrd_filename,
 792                      int pci_enabled, const char *cpu_model)
 793 {
 794     char buf[1024];
 795     int ret, linux_boot, i;
 796     ram_addr_t ram_addr, bios_offset, option_rom_offset;
 797     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 798     int bios_size, isa_bios_size, oprom_area_size;
 799     PCIBus *pci_bus;
 800     int piix3_devfn = -1;
 801     CPUState *env;
 802     qemu_irq *cpu_irq;
 803     qemu_irq *i8259;
 804     int index;
 805     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 806     BlockDriverState *fd[MAX_FD];
 807     int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
 808
 809     if (ram_size >= 0xe0000000 ) {
 810         above_4g_mem_size = ram_size - 0xe0000000;
 811         below_4g_mem_size = 0xe0000000;
 812     } else {
 813         below_4g_mem_size = ram_size;
 814     }
 815
 816     linux_boot = (kernel_filename != NULL);
 817
 818     /* init CPUs */
 819     if (cpu_model == NULL) {
 820 #ifdef TARGET_X86_64
 821         cpu_model = "qemu64";
 822 #else
 823         cpu_model = "qemu32";
 824 #endif
 825     }
 826
 827     for(i = 0; i < smp_cpus; i++) {
 828         env = cpu_init(cpu_model);
 829         if (!env) {
 830             fprintf(stderr, "Unable to find x86 CPU definition\n");
 831             exit(1);
 832         }
 833         if (i != 0)
 834             env->halted = 1;
 835         if (smp_cpus > 1) {
 836             /* XXX: enable it in all cases */
 837             env->cpuid_features |= CPUID_APIC;
 838         }
 839         qemu_register_reset(main_cpu_reset, env);
 840         if (pci_enabled) {
 841             apic_init(env);
 842         }
 843     }
 844
 845     vmport_init();
 846
 847     /* allocate RAM */
 848     ram_addr = qemu_ram_alloc(0xa0000);
 849     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 850
 851     /* Allocate, even though we won't register, so we don't break the
 852      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 853      * and some bios areas, which will be registered later
 854      */
 855     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 856     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 857     cpu_register_physical_memory(0x100000,
 858                  below_4g_mem_size - 0x100000,
 859                  ram_addr);
 860
 861     /* above 4giga memory allocation */
 862     if (above_4g_mem_size > 0) {
 863         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 864         cpu_register_physical_memory(0x100000000ULL,
 865                                      above_4g_mem_size,
 866                                      ram_addr);
 867     }
 868
 869
 870     /* BIOS load */
 871     if (bios_name == NULL)
 872         bios_name = BIOS_FILENAME;
 873     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 874     bios_size = get_image_size(buf);
 875     if (bios_size <= 0 ||
 876         (bios_size % 65536) != 0) {
 877         goto bios_error;
 878     }
 879     bios_offset = qemu_ram_alloc(bios_size);
 880     ret = load_image(buf, qemu_get_ram_ptr(bios_offset));
 881     if (ret != bios_size) {
 882     bios_error:
 883         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 884         exit(1);
 885     }
 886     /* map the last 128KB of the BIOS in ISA space */
 887     isa_bios_size = bios_size;
 888     if (isa_bios_size > (128 * 1024))
 889         isa_bios_size = 128 * 1024;
 890     cpu_register_physical_memory(0x100000 - isa_bios_size,
 891                                  isa_bios_size,
 892                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 893
 894
 895
 896     option_rom_offset = qemu_ram_alloc(0x20000);
 897     oprom_area_size = 0;
 898     cpu_register_physical_memory(0xc0000, 0x20000,
 899                                  option_rom_offset | IO_MEM_ROM);
 900
 901     if (using_vga) {
 902         /* VGA BIOS load */
 903         if (cirrus_vga_enabled) {
 904             snprintf(buf, sizeof(buf), "%s/%s", bios_dir,
 905                      VGABIOS_CIRRUS_FILENAME);
 906         } else {
 907             snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 908         }
 909         oprom_area_size = load_option_rom(buf, 0xc0000, 0xe0000);
 910     }
 911     /* Although video roms can grow larger than 0x8000, the area between
 912      * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
 913      * for any other kind of option rom inside this area */
 914     if (oprom_area_size < 0x8000)
 915         oprom_area_size = 0x8000;
 916
 917     if (linux_boot) {
 918         load_linux(0xc0000 + oprom_area_size,
 919                    kernel_filename, initrd_filename, kernel_cmdline);
 920         oprom_area_size += 2048;
 921     }
 922
 923     for (i = 0; i < nb_option_roms; i++) {
 924         oprom_area_size += load_option_rom(option_rom[i],
 925                                            0xc0000 + oprom_area_size, 0xe0000);
 926     }
 927
 928     /* map all the bios at the top of memory */
 929     cpu_register_physical_memory((uint32_t)(-bios_size),
 930                                  bios_size, bios_offset | IO_MEM_ROM);
 931
 932     bochs_bios_init();
 933
 934     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 935     i8259 = i8259_init(cpu_irq[0]);
 936     ferr_irq = i8259[13];
 937
 938     if (pci_enabled) {
 939         pci_bus = i440fx_init(&i440fx_state, i8259);
 940         piix3_devfn = piix3_init(pci_bus, -1);
 941     } else {
 942         pci_bus = NULL;
 943     }
 944
 945     /* init basic PC hardware */
 946     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 947
 948     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 949
 950     if (cirrus_vga_enabled) {
 951         if (pci_enabled) {
 952             pci_cirrus_vga_init(pci_bus, vga_ram_size);
 953         } else {
 954             isa_cirrus_vga_init(vga_ram_size);
 955         }
 956     } else if (vmsvga_enabled) {
 957         if (pci_enabled)
 958             pci_vmsvga_init(pci_bus, vga_ram_size);
 959         else
 960             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 961     } else if (std_vga_enabled) {
 962         if (pci_enabled) {
 963             pci_vga_init(pci_bus, vga_ram_size, 0, 0);
 964         } else {
 965             isa_vga_init(vga_ram_size);
 966         }
 967     }
 968
 969     rtc_state = rtc_init(0x70, i8259[8], 2000);
 970
 971     qemu_register_boot_set(pc_boot_set, rtc_state);
 972
 973     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 974     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 975
 976     if (pci_enabled) {
 977         ioapic = ioapic_init();
 978     }
 979     pit = pit_init(0x40, i8259[0]);
 980     pcspk_init(pit);
 981     if (!no_hpet) {
 982         hpet_init(i8259);
 983     }
 984     if (pci_enabled) {
 985         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 986     }
 987
 988     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 989         if (serial_hds[i]) {
 990             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 991                         serial_hds[i]);
 992         }
 993     }
 994
 995     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 996         if (parallel_hds[i]) {
 997             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
 998                           parallel_hds[i]);
 999         }
1000     }
1001
1002     for(i = 0; i < nb_nics; i++) {
1003         NICInfo *nd = &nd_table[i];
1004
1005         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1006             pc_init_ne2k_isa(nd, i8259);
1007         else
1008             pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
1009     }
1010
1011     qemu_system_hot_add_init();
1012
1013     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1014         fprintf(stderr, "qemu: too many IDE bus\n");
1015         exit(1);
1016     }
1017
1018     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1019         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1020         if (index != -1)
1021             hd[i] = drives_table[index].bdrv;
1022         else
1023             hd[i] = NULL;
1024     }
1025
1026     if (pci_enabled) {
1027         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1028     } else {
1029         for(i = 0; i < MAX_IDE_BUS; i++) {
1030             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1031                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1032         }
1033     }
1034
1035     i8042_init(i8259[1], i8259[12], 0x60);
1036     DMA_init(0);
1037 #ifdef HAS_AUDIO
1038     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1039 #endif
1040
1041     for(i = 0; i < MAX_FD; i++) {
1042         index = drive_get_index(IF_FLOPPY, 0, i);
1043         if (index != -1)
1044             fd[i] = drives_table[index].bdrv;
1045         else
1046             fd[i] = NULL;
1047     }
1048     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1049
1050     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1051
1052     if (pci_enabled && usb_enabled) {
1053         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1054     }
1055
1056     if (pci_enabled && acpi_enabled) {
1057         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1058         i2c_bus *smbus;
1059
1060         /* TODO: Populate SPD eeprom data.  */
1061         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1062         for (i = 0; i < 8; i++) {
1063             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1064         }
1065     }
1066
1067     if (i440fx_state) {
1068         i440fx_init_memory_mappings(i440fx_state);
1069     }
1070
1071     if (pci_enabled) {
1072         int max_bus;
1073         int bus, unit;
1074         void *scsi;
1075
1076         max_bus = drive_get_max_bus(IF_SCSI);
1077
1078         for (bus = 0; bus <= max_bus; bus++) {
1079             scsi = lsi_scsi_init(pci_bus, -1);
1080             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1081                 index = drive_get_index(IF_SCSI, bus, unit);
1082                 if (index == -1)
1083                     continue;
1084                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1085             }
1086         }
1087     }
1088
1089     /* Add virtio block devices */
1090     if (pci_enabled) {
1091         int index;
1092         int unit_id = 0;
1093
1094         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1095             virtio_blk_init(pci_bus, drives_table[index].bdrv);
1096             unit_id++;
1097         }
1098     }
1099
1100     /* Add virtio balloon device */
1101     if (pci_enabled)
1102         virtio_balloon_init(pci_bus);
1103
1104     /* Add virtio console devices */
1105     if (pci_enabled) {
1106         for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1107             if (virtcon_hds[i])
1108                 virtio_console_init(pci_bus, virtcon_hds[i]);
1109         }
1110     }
1111 }
1112
1113 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1114                         const char *boot_device,
1115                         const char *kernel_filename,
1116                         const char *kernel_cmdline,
1117                         const char *initrd_filename,
1118                         const char *cpu_model)
1119 {
1120     pc_init1(ram_size, vga_ram_size, boot_device,
1121              kernel_filename, kernel_cmdline,
1122              initrd_filename, 1, cpu_model);
1123 }
1124
1125 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1126                         const char *boot_device,
1127                         const char *kernel_filename,
1128                         const char *kernel_cmdline,
1129                         const char *initrd_filename,
1130                         const char *cpu_model)
1131 {
1132     pc_init1(ram_size, vga_ram_size, boot_device,
1133              kernel_filename, kernel_cmdline,
1134              initrd_filename, 0, cpu_model);
1135 }
1136
1137 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1138    BIOS will read it and start S3 resume at POST Entry */
1139 void cmos_set_s3_resume(void)
1140 {
1141     if (rtc_state)
1142         rtc_set_memory(rtc_state, 0xF, 0xFE);
1143 }
1144
1145 QEMUMachine pc_machine = {
1146     .name = "pc",
1147     .desc = "Standard PC",
1148     .init = pc_init_pci,
1149     .max_cpus = 255,
1150 };
1151
1152 QEMUMachine isapc_machine = {
1153     .name = "isapc",
1154     .desc = "ISA-only PC",
1155     .init = pc_init_isa,
1156     .max_cpus = 1,
1157 };