hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "console.h"
  35 #include "fw_cfg.h"
  36 #include "virtio-blk.h"
  37 #include "virtio-balloon.h"
  38
  39 /* output Bochs bios info messages */
  40 //#define DEBUG_BIOS
  41
  42 #define BIOS_FILENAME "bios.bin"
  43 #define VGABIOS_FILENAME "vgabios.bin"
  44 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  45
  46 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  47
  48 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  49 #define ACPI_DATA_SIZE       0x10000
  50 #define BIOS_CFG_IOPORT 0x510
  51
  52 #define MAX_IDE_BUS 2
  53
  54 static fdctrl_t *floppy_controller;
  55 static RTCState *rtc_state;
  56 static PITState *pit;
  57 static IOAPICState *ioapic;
  58 static PCIDevice *i440fx_state;
  59
  60 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  61 {
  62 }
  63
  64 /* MSDOS compatibility mode FPU exception support */
  65 static qemu_irq ferr_irq;
  66 /* XXX: add IGNNE support */
  67 void cpu_set_ferr(CPUX86State *s)
  68 {
  69     qemu_irq_raise(ferr_irq);
  70 }
  71
  72 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  73 {
  74     qemu_irq_lower(ferr_irq);
  75 }
  76
  77 /* TSC handling */
  78 uint64_t cpu_get_tsc(CPUX86State *env)
  79 {
  80     /* Note: when using kqemu, it is more logical to return the host TSC
  81        because kqemu does not trap the RDTSC instruction for
  82        performance reasons */
  83 #ifdef USE_KQEMU
  84     if (env->kqemu_enabled) {
  85         return cpu_get_real_ticks();
  86     } else
  87 #endif
  88     {
  89         return cpu_get_ticks();
  90     }
  91 }
  92
  93 /* SMM support */
  94 void cpu_smm_update(CPUState *env)
  95 {
  96     if (i440fx_state && env == first_cpu)
  97         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
  98 }
  99
 100
 101 /* IRQ handling */
 102 int cpu_get_pic_interrupt(CPUState *env)
 103 {
 104     int intno;
 105
 106     intno = apic_get_interrupt(env);
 107     if (intno >= 0) {
 108         /* set irq request if a PIC irq is still pending */
 109         /* XXX: improve that */
 110         pic_update_irq(isa_pic);
 111         return intno;
 112     }
 113     /* read the irq from the PIC */
 114     if (!apic_accept_pic_intr(env))
 115         return -1;
 116
 117     intno = pic_read_irq(isa_pic);
 118     return intno;
 119 }
 120
 121 static void pic_irq_request(void *opaque, int irq, int level)
 122 {
 123     CPUState *env = first_cpu;
 124
 125     if (env->apic_state) {
 126         while (env) {
 127             if (apic_accept_pic_intr(env))
 128                 apic_deliver_pic_intr(env, level);
 129             env = env->next_cpu;
 130         }
 131     } else {
 132         if (level)
 133             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 134         else
 135             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 136     }
 137 }
 138
 139 /* PC cmos mappings */
 140
 141 #define REG_EQUIPMENT_BYTE          0x14
 142
 143 static int cmos_get_fd_drive_type(int fd0)
 144 {
 145     int val;
 146
 147     switch (fd0) {
 148     case 0:
 149         /* 1.44 Mb 3"5 drive */
 150         val = 4;
 151         break;
 152     case 1:
 153         /* 2.88 Mb 3"5 drive */
 154         val = 5;
 155         break;
 156     case 2:
 157         /* 1.2 Mb 5"5 drive */
 158         val = 2;
 159         break;
 160     default:
 161         val = 0;
 162         break;
 163     }
 164     return val;
 165 }
 166
 167 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 168 {
 169     RTCState *s = rtc_state;
 170     int cylinders, heads, sectors;
 171     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 172     rtc_set_memory(s, type_ofs, 47);
 173     rtc_set_memory(s, info_ofs, cylinders);
 174     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 175     rtc_set_memory(s, info_ofs + 2, heads);
 176     rtc_set_memory(s, info_ofs + 3, 0xff);
 177     rtc_set_memory(s, info_ofs + 4, 0xff);
 178     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 179     rtc_set_memory(s, info_ofs + 6, cylinders);
 180     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 181     rtc_set_memory(s, info_ofs + 8, sectors);
 182 }
 183
 184 /* convert boot_device letter to something recognizable by the bios */
 185 static int boot_device2nibble(char boot_device)
 186 {
 187     switch(boot_device) {
 188     case 'a':
 189     case 'b':
 190         return 0x01; /* floppy boot */
 191     case 'c':
 192         return 0x02; /* hard drive boot */
 193     case 'd':
 194         return 0x03; /* CD-ROM boot */
 195     case 'n':
 196         return 0x04; /* Network boot */
 197     }
 198     return 0;
 199 }
 200
 201 /* copy/pasted from cmos_init, should be made a general function
 202  and used there as well */
 203 static int pc_boot_set(void *opaque, const char *boot_device)
 204 {
 205 #define PC_MAX_BOOT_DEVICES 3
 206     RTCState *s = (RTCState *)opaque;
 207     int nbds, bds[3] = { 0, };
 208     int i;
 209
 210     nbds = strlen(boot_device);
 211     if (nbds > PC_MAX_BOOT_DEVICES) {
 212         term_printf("Too many boot devices for PC\n");
 213         return(1);
 214     }
 215     for (i = 0; i < nbds; i++) {
 216         bds[i] = boot_device2nibble(boot_device[i]);
 217         if (bds[i] == 0) {
 218             term_printf("Invalid boot device for PC: '%c'\n",
 219                     boot_device[i]);
 220             return(1);
 221         }
 222     }
 223     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 224     rtc_set_memory(s, 0x38, (bds[2] << 4));
 225     return(0);
 226 }
 227
 228 /* hd_table must contain 4 block drivers */
 229 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 230                       const char *boot_device, BlockDriverState **hd_table)
 231 {
 232     RTCState *s = rtc_state;
 233     int nbds, bds[3] = { 0, };
 234     int val;
 235     int fd0, fd1, nb;
 236     int i;
 237
 238     /* various important CMOS locations needed by PC/Bochs bios */
 239
 240     /* memory size */
 241     val = 640; /* base memory in K */
 242     rtc_set_memory(s, 0x15, val);
 243     rtc_set_memory(s, 0x16, val >> 8);
 244
 245     val = (ram_size / 1024) - 1024;
 246     if (val > 65535)
 247         val = 65535;
 248     rtc_set_memory(s, 0x17, val);
 249     rtc_set_memory(s, 0x18, val >> 8);
 250     rtc_set_memory(s, 0x30, val);
 251     rtc_set_memory(s, 0x31, val >> 8);
 252
 253     if (above_4g_mem_size) {
 254         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 255         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 256         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 257     }
 258
 259     if (ram_size > (16 * 1024 * 1024))
 260         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 261     else
 262         val = 0;
 263     if (val > 65535)
 264         val = 65535;
 265     rtc_set_memory(s, 0x34, val);
 266     rtc_set_memory(s, 0x35, val >> 8);
 267
 268     /* set the number of CPU */
 269     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 270
 271     /* set boot devices, and disable floppy signature check if requested */
 272 #define PC_MAX_BOOT_DEVICES 3
 273     nbds = strlen(boot_device);
 274     if (nbds > PC_MAX_BOOT_DEVICES) {
 275         fprintf(stderr, "Too many boot devices for PC\n");
 276         exit(1);
 277     }
 278     for (i = 0; i < nbds; i++) {
 279         bds[i] = boot_device2nibble(boot_device[i]);
 280         if (bds[i] == 0) {
 281             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 282                     boot_device[i]);
 283             exit(1);
 284         }
 285     }
 286     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 287     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 288
 289     /* floppy type */
 290
 291     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 292     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 293
 294     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 295     rtc_set_memory(s, 0x10, val);
 296
 297     val = 0;
 298     nb = 0;
 299     if (fd0 < 3)
 300         nb++;
 301     if (fd1 < 3)
 302         nb++;
 303     switch (nb) {
 304     case 0:
 305         break;
 306     case 1:
 307         val |= 0x01; /* 1 drive, ready for boot */
 308         break;
 309     case 2:
 310         val |= 0x41; /* 2 drives, ready for boot */
 311         break;
 312     }
 313     val |= 0x02; /* FPU is there */
 314     val |= 0x04; /* PS/2 mouse installed */
 315     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 316
 317     /* hard drives */
 318
 319     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 320     if (hd_table[0])
 321         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 322     if (hd_table[1])
 323         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 324
 325     val = 0;
 326     for (i = 0; i < 4; i++) {
 327         if (hd_table[i]) {
 328             int cylinders, heads, sectors, translation;
 329             /* NOTE: bdrv_get_geometry_hint() returns the physical
 330                 geometry.  It is always such that: 1 <= sects <= 63, 1
 331                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 332                 geometry can be different if a translation is done. */
 333             translation = bdrv_get_translation_hint(hd_table[i]);
 334             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 335                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 336                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 337                     /* No translation. */
 338                     translation = 0;
 339                 } else {
 340                     /* LBA translation. */
 341                     translation = 1;
 342                 }
 343             } else {
 344                 translation--;
 345             }
 346             val |= translation << (i * 2);
 347         }
 348     }
 349     rtc_set_memory(s, 0x39, val);
 350 }
 351
 352 void ioport_set_a20(int enable)
 353 {
 354     /* XXX: send to all CPUs ? */
 355     cpu_x86_set_a20(first_cpu, enable);
 356 }
 357
 358 int ioport_get_a20(void)
 359 {
 360     return ((first_cpu->a20_mask >> 20) & 1);
 361 }
 362
 363 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 364 {
 365     ioport_set_a20((val >> 1) & 1);
 366     /* XXX: bit 0 is fast reset */
 367 }
 368
 369 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 370 {
 371     return ioport_get_a20() << 1;
 372 }
 373
 374 /***********************************************************/
 375 /* Bochs BIOS debug ports */
 376
 377 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 378 {
 379     static const char shutdown_str[8] = "Shutdown";
 380     static int shutdown_index = 0;
 381
 382     switch(addr) {
 383         /* Bochs BIOS messages */
 384     case 0x400:
 385     case 0x401:
 386         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 387         exit(1);
 388     case 0x402:
 389     case 0x403:
 390 #ifdef DEBUG_BIOS
 391         fprintf(stderr, "%c", val);
 392 #endif
 393         break;
 394     case 0x8900:
 395         /* same as Bochs power off */
 396         if (val == shutdown_str[shutdown_index]) {
 397             shutdown_index++;
 398             if (shutdown_index == 8) {
 399                 shutdown_index = 0;
 400                 qemu_system_shutdown_request();
 401             }
 402         } else {
 403             shutdown_index = 0;
 404         }
 405         break;
 406
 407         /* LGPL'ed VGA BIOS messages */
 408     case 0x501:
 409     case 0x502:
 410         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 411         exit(1);
 412     case 0x500:
 413     case 0x503:
 414 #ifdef DEBUG_BIOS
 415         fprintf(stderr, "%c", val);
 416 #endif
 417         break;
 418     }
 419 }
 420
 421 static void bochs_bios_init(void)
 422 {
 423     void *fw_cfg;
 424
 425     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 426     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 427     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 428     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 429     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 430
 431     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 432     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 433     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 434     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 435
 436     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 437     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 438     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 439 }
 440
 441 /* Generate an initial boot sector which sets state and jump to
 442    a specified vector */
 443 static void generate_bootsect(uint8_t *option_rom,
 444                               uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 445 {
 446     uint8_t rom[512], *p, *reloc;
 447     uint8_t sum;
 448     int i;
 449
 450     memset(rom, 0, sizeof(rom));
 451
 452     p = rom;
 453     /* Make sure we have an option rom signature */
 454     *p++ = 0x55;
 455     *p++ = 0xaa;
 456
 457     /* ROM size in sectors*/
 458     *p++ = 1;
 459
 460     /* Hook int19 */
 461
 462     *p++ = 0x50;                /* push ax */
 463     *p++ = 0x1e;                /* push ds */
 464     *p++ = 0x31; *p++ = 0xc0;   /* xor ax, ax */
 465     *p++ = 0x8e; *p++ = 0xd8;   /* mov ax, ds */
 466
 467     *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
 468     *p++ = 0x64; *p++ = 0x00;
 469     reloc = p;
 470     *p++ = 0x00; *p++ = 0x00;
 471
 472     *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
 473     *p++ = 0x66; *p++ = 0x00;
 474
 475     *p++ = 0x1f;                /* pop ds */
 476     *p++ = 0x58;                /* pop ax */
 477     *p++ = 0xcb;                /* lret */
 478
 479     /* Actual code */
 480     *reloc = (p - rom);
 481
 482     *p++ = 0xfa;                /* CLI */
 483     *p++ = 0xfc;                /* CLD */
 484
 485     for (i = 0; i < 6; i++) {
 486         if (i == 1)             /* Skip CS */
 487             continue;
 488
 489         *p++ = 0xb8;            /* MOV AX,imm16 */
 490         *p++ = segs[i];
 491         *p++ = segs[i] >> 8;
 492         *p++ = 0x8e;            /* MOV <seg>,AX */
 493         *p++ = 0xc0 + (i << 3);
 494     }
 495
 496     for (i = 0; i < 8; i++) {
 497         *p++ = 0x66;            /* 32-bit operand size */
 498         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 499         *p++ = gpr[i];
 500         *p++ = gpr[i] >> 8;
 501         *p++ = gpr[i] >> 16;
 502         *p++ = gpr[i] >> 24;
 503     }
 504
 505     *p++ = 0xea;                /* JMP FAR */
 506     *p++ = ip;                  /* IP */
 507     *p++ = ip >> 8;
 508     *p++ = segs[1];             /* CS */
 509     *p++ = segs[1] >> 8;
 510
 511     /* sign rom */
 512     sum = 0;
 513     for (i = 0; i < (sizeof(rom) - 1); i++)
 514         sum += rom[i];
 515     rom[sizeof(rom) - 1] = -sum;
 516
 517     memcpy(option_rom, rom, sizeof(rom));
 518 }
 519
 520 static long get_file_size(FILE *f)
 521 {
 522     long where, size;
 523
 524     /* XXX: on Unix systems, using fstat() probably makes more sense */
 525
 526     where = ftell(f);
 527     fseek(f, 0, SEEK_END);
 528     size = ftell(f);
 529     fseek(f, where, SEEK_SET);
 530
 531     return size;
 532 }
 533
 534 static void load_linux(uint8_t *option_rom,
 535                        const char *kernel_filename,
 536                        const char *initrd_filename,
 537                        const char *kernel_cmdline)
 538 {
 539     uint16_t protocol;
 540     uint32_t gpr[8];
 541     uint16_t seg[6];
 542     uint16_t real_seg;
 543     int setup_size, kernel_size, initrd_size, cmdline_size;
 544     uint32_t initrd_max;
 545     uint8_t header[1024];
 546     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 547     FILE *f, *fi;
 548
 549     /* Align to 16 bytes as a paranoia measure */
 550     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 551
 552     /* load the kernel header */
 553     f = fopen(kernel_filename, "rb");
 554     if (!f || !(kernel_size = get_file_size(f)) ||
 555         fread(header, 1, 1024, f) != 1024) {
 556         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 557                 kernel_filename);
 558         exit(1);
 559     }
 560
 561     /* kernel protocol version */
 562 #if 0
 563     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 564 #endif
 565     if (ldl_p(header+0x202) == 0x53726448)
 566         protocol = lduw_p(header+0x206);
 567     else
 568         protocol = 0;
 569
 570     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 571         /* Low kernel */
 572         real_addr    = 0x90000;
 573         cmdline_addr = 0x9a000 - cmdline_size;
 574         prot_addr    = 0x10000;
 575     } else if (protocol < 0x202) {
 576         /* High but ancient kernel */
 577         real_addr    = 0x90000;
 578         cmdline_addr = 0x9a000 - cmdline_size;
 579         prot_addr    = 0x100000;
 580     } else {
 581         /* High and recent kernel */
 582         real_addr    = 0x10000;
 583         cmdline_addr = 0x20000;
 584         prot_addr    = 0x100000;
 585     }
 586
 587 #if 0
 588     fprintf(stderr,
 589             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 590             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 591             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 592             real_addr,
 593             cmdline_addr,
 594             prot_addr);
 595 #endif
 596
 597     /* highest address for loading the initrd */
 598     if (protocol >= 0x203)
 599         initrd_max = ldl_p(header+0x22c);
 600     else
 601         initrd_max = 0x37ffffff;
 602
 603     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 604         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 605
 606     /* kernel command line */
 607     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 608
 609     if (protocol >= 0x202) {
 610         stl_p(header+0x228, cmdline_addr);
 611     } else {
 612         stw_p(header+0x20, 0xA33F);
 613         stw_p(header+0x22, cmdline_addr-real_addr);
 614     }
 615
 616     /* loader type */
 617     /* High nybble = B reserved for Qemu; low nybble is revision number.
 618        If this code is substantially changed, you may want to consider
 619        incrementing the revision. */
 620     if (protocol >= 0x200)
 621         header[0x210] = 0xB0;
 622
 623     /* heap */
 624     if (protocol >= 0x201) {
 625         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 626         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 627     }
 628
 629     /* load initrd */
 630     if (initrd_filename) {
 631         if (protocol < 0x200) {
 632             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 633             exit(1);
 634         }
 635
 636         fi = fopen(initrd_filename, "rb");
 637         if (!fi) {
 638             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 639                     initrd_filename);
 640             exit(1);
 641         }
 642
 643         initrd_size = get_file_size(fi);
 644         initrd_addr = (initrd_max-initrd_size) & ~4095;
 645
 646         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 647                 "\n", initrd_size, initrd_addr);
 648
 649         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 650             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 651                     initrd_filename);
 652             exit(1);
 653         }
 654         fclose(fi);
 655
 656         stl_p(header+0x218, initrd_addr);
 657         stl_p(header+0x21c, initrd_size);
 658     }
 659
 660     /* store the finalized header and load the rest of the kernel */
 661     cpu_physical_memory_write(real_addr, header, 1024);
 662
 663     setup_size = header[0x1f1];
 664     if (setup_size == 0)
 665         setup_size = 4;
 666
 667     setup_size = (setup_size+1)*512;
 668     kernel_size -= setup_size;  /* Size of protected-mode code */
 669
 670     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 671         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 672         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 673                 kernel_filename);
 674         exit(1);
 675     }
 676     fclose(f);
 677
 678     /* generate bootsector to set up the initial register state */
 679     real_seg = real_addr >> 4;
 680     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 681     seg[1] = real_seg+0x20;     /* CS */
 682     memset(gpr, 0, sizeof gpr);
 683     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 684
 685     generate_bootsect(option_rom, gpr, seg, 0);
 686 }
 687
 688 static void main_cpu_reset(void *opaque)
 689 {
 690     CPUState *env = opaque;
 691     cpu_reset(env);
 692 }
 693
 694 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 695 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 696 static const int ide_irq[2] = { 14, 15 };
 697
 698 #define NE2000_NB_MAX 6
 699
 700 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 701 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 702
 703 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 704 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 705
 706 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 707 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 708
 709 #ifdef HAS_AUDIO
 710 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 711 {
 712     struct soundhw *c;
 713     int audio_enabled = 0;
 714
 715     for (c = soundhw; !audio_enabled && c->name; ++c) {
 716         audio_enabled = c->enabled;
 717     }
 718
 719     if (audio_enabled) {
 720         AudioState *s;
 721
 722         s = AUD_init ();
 723         if (s) {
 724             for (c = soundhw; c->name; ++c) {
 725                 if (c->enabled) {
 726                     if (c->isa) {
 727                         c->init.init_isa (s, pic);
 728                     }
 729                     else {
 730                         if (pci_bus) {
 731                             c->init.init_pci (pci_bus, s);
 732                         }
 733                     }
 734                 }
 735             }
 736         }
 737     }
 738 }
 739 #endif
 740
 741 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 742 {
 743     static int nb_ne2k = 0;
 744
 745     if (nb_ne2k == NE2000_NB_MAX)
 746         return;
 747     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 748     nb_ne2k++;
 749 }
 750
 751 /* PC hardware initialisation */
 752 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 753                      const char *boot_device, DisplayState *ds,
 754                      const char *kernel_filename, const char *kernel_cmdline,
 755                      const char *initrd_filename,
 756                      int pci_enabled, const char *cpu_model)
 757 {
 758     char buf[1024];
 759     int ret, linux_boot, i;
 760     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 761     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 762     int bios_size, isa_bios_size, vga_bios_size;
 763     PCIBus *pci_bus;
 764     int piix3_devfn = -1;
 765     CPUState *env;
 766     NICInfo *nd;
 767     qemu_irq *cpu_irq;
 768     qemu_irq *i8259;
 769     int index;
 770     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 771     BlockDriverState *fd[MAX_FD];
 772
 773     if (ram_size >= 0xe0000000 ) {
 774         above_4g_mem_size = ram_size - 0xe0000000;
 775         below_4g_mem_size = 0xe0000000;
 776     } else {
 777         below_4g_mem_size = ram_size;
 778     }
 779
 780     linux_boot = (kernel_filename != NULL);
 781
 782     /* init CPUs */
 783     if (cpu_model == NULL) {
 784 #ifdef TARGET_X86_64
 785         cpu_model = "qemu64";
 786 #else
 787         cpu_model = "qemu32";
 788 #endif
 789     }
 790
 791     for(i = 0; i < smp_cpus; i++) {
 792         env = cpu_init(cpu_model);
 793         if (!env) {
 794             fprintf(stderr, "Unable to find x86 CPU definition\n");
 795             exit(1);
 796         }
 797         if (i != 0)
 798             env->halted = 1;
 799         if (smp_cpus > 1) {
 800             /* XXX: enable it in all cases */
 801             env->cpuid_features |= CPUID_APIC;
 802         }
 803         qemu_register_reset(main_cpu_reset, env);
 804         if (pci_enabled) {
 805             apic_init(env);
 806         }
 807     }
 808
 809     vmport_init();
 810
 811     /* allocate RAM */
 812     ram_addr = qemu_ram_alloc(0xa0000);
 813     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 814
 815     /* Allocate, even though we won't register, so we don't break the
 816      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 817      * and some bios areas, which will be registered later
 818      */
 819     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 820     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 821     cpu_register_physical_memory(0x100000,
 822                  below_4g_mem_size - 0x100000,
 823                  ram_addr);
 824
 825     /* above 4giga memory allocation */
 826     if (above_4g_mem_size > 0) {
 827         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 828         cpu_register_physical_memory(0x100000000ULL,
 829                                      above_4g_mem_size,
 830                                      ram_addr);
 831     }
 832
 833
 834     /* allocate VGA RAM */
 835     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 836
 837     /* BIOS load */
 838     if (bios_name == NULL)
 839         bios_name = BIOS_FILENAME;
 840     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 841     bios_size = get_image_size(buf);
 842     if (bios_size <= 0 ||
 843         (bios_size % 65536) != 0) {
 844         goto bios_error;
 845     }
 846     bios_offset = qemu_ram_alloc(bios_size);
 847     ret = load_image(buf, phys_ram_base + bios_offset);
 848     if (ret != bios_size) {
 849     bios_error:
 850         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 851         exit(1);
 852     }
 853
 854     /* VGA BIOS load */
 855     if (cirrus_vga_enabled) {
 856         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 857     } else {
 858         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 859     }
 860     vga_bios_size = get_image_size(buf);
 861     if (vga_bios_size <= 0 || vga_bios_size > 65536)
 862         goto vga_bios_error;
 863     vga_bios_offset = qemu_ram_alloc(65536);
 864
 865     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 866     if (ret != vga_bios_size) {
 867     vga_bios_error:
 868         fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 869         exit(1);
 870     }
 871
 872     /* setup basic memory access */
 873     cpu_register_physical_memory(0xc0000, 0x10000,
 874                                  vga_bios_offset | IO_MEM_ROM);
 875
 876     /* map the last 128KB of the BIOS in ISA space */
 877     isa_bios_size = bios_size;
 878     if (isa_bios_size > (128 * 1024))
 879         isa_bios_size = 128 * 1024;
 880     cpu_register_physical_memory(0x100000 - isa_bios_size,
 881                                  isa_bios_size,
 882                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 883
 884     {
 885         ram_addr_t option_rom_offset;
 886         int size, offset;
 887
 888         offset = 0;
 889         if (linux_boot) {
 890             option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
 891             load_linux(phys_ram_base + option_rom_offset,
 892                        kernel_filename, initrd_filename, kernel_cmdline);
 893             cpu_register_physical_memory(0xd0000, TARGET_PAGE_SIZE,
 894                                          option_rom_offset | IO_MEM_ROM);
 895             offset = TARGET_PAGE_SIZE;
 896         }
 897
 898         for (i = 0; i < nb_option_roms; i++) {
 899             size = get_image_size(option_rom[i]);
 900             if (size < 0) {
 901                 fprintf(stderr, "Could not load option rom '%s'\n",
 902                         option_rom[i]);
 903                 exit(1);
 904             }
 905             if (size > (0x10000 - offset))
 906                 goto option_rom_error;
 907             option_rom_offset = qemu_ram_alloc(size);
 908             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 909             if (ret != size) {
 910             option_rom_error:
 911                 fprintf(stderr, "Too many option ROMS\n");
 912                 exit(1);
 913             }
 914             size = (size + 4095) & ~4095;
 915             cpu_register_physical_memory(0xd0000 + offset,
 916                                          size, option_rom_offset | IO_MEM_ROM);
 917             offset += size;
 918         }
 919     }
 920
 921     /* map all the bios at the top of memory */
 922     cpu_register_physical_memory((uint32_t)(-bios_size),
 923                                  bios_size, bios_offset | IO_MEM_ROM);
 924
 925     bochs_bios_init();
 926
 927     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 928     i8259 = i8259_init(cpu_irq[0]);
 929     ferr_irq = i8259[13];
 930
 931     if (pci_enabled) {
 932         pci_bus = i440fx_init(&i440fx_state, i8259);
 933         piix3_devfn = piix3_init(pci_bus, -1);
 934     } else {
 935         pci_bus = NULL;
 936     }
 937
 938     /* init basic PC hardware */
 939     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 940
 941     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 942
 943     if (cirrus_vga_enabled) {
 944         if (pci_enabled) {
 945             pci_cirrus_vga_init(pci_bus,
 946                                 ds, phys_ram_base + vga_ram_addr,
 947                                 vga_ram_addr, vga_ram_size);
 948         } else {
 949             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 950                                 vga_ram_addr, vga_ram_size);
 951         }
 952     } else if (vmsvga_enabled) {
 953         if (pci_enabled)
 954             pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 955                             vga_ram_addr, vga_ram_size);
 956         else
 957             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 958     } else {
 959         if (pci_enabled) {
 960             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 961                          vga_ram_addr, vga_ram_size, 0, 0);
 962         } else {
 963             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 964                          vga_ram_addr, vga_ram_size);
 965         }
 966     }
 967
 968     rtc_state = rtc_init(0x70, i8259[8]);
 969
 970     qemu_register_boot_set(pc_boot_set, rtc_state);
 971
 972     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 973     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 974
 975     if (pci_enabled) {
 976         ioapic = ioapic_init();
 977     }
 978     pit = pit_init(0x40, i8259[0]);
 979     pcspk_init(pit);
 980     if (pci_enabled) {
 981         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 982     }
 983
 984     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 985         if (serial_hds[i]) {
 986             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 987                         serial_hds[i]);
 988         }
 989     }
 990
 991     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 992         if (parallel_hds[i]) {
 993             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
 994                           parallel_hds[i]);
 995         }
 996     }
 997
 998     for(i = 0; i < nb_nics; i++) {
 999         nd = &nd_table[i];
1000         if (!nd->model) {
1001             if (pci_enabled) {
1002                 nd->model = "ne2k_pci";
1003             } else {
1004                 nd->model = "ne2k_isa";
1005             }
1006         }
1007         if (strcmp(nd->model, "ne2k_isa") == 0) {
1008             pc_init_ne2k_isa(nd, i8259);
1009         } else if (pci_enabled) {
1010             if (strcmp(nd->model, "?") == 0)
1011                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1012             pci_nic_init(pci_bus, nd, -1);
1013         } else if (strcmp(nd->model, "?") == 0) {
1014             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1015             exit(1);
1016         } else {
1017             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
1018             exit(1);
1019         }
1020     }
1021
1022     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1023         fprintf(stderr, "qemu: too many IDE bus\n");
1024         exit(1);
1025     }
1026
1027     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1028         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1029         if (index != -1)
1030             hd[i] = drives_table[index].bdrv;
1031         else
1032             hd[i] = NULL;
1033     }
1034
1035     if (pci_enabled) {
1036         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1037     } else {
1038         for(i = 0; i < MAX_IDE_BUS; i++) {
1039             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1040                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1041         }
1042     }
1043
1044     i8042_init(i8259[1], i8259[12], 0x60);
1045     DMA_init(0);
1046 #ifdef HAS_AUDIO
1047     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1048 #endif
1049
1050     for(i = 0; i < MAX_FD; i++) {
1051         index = drive_get_index(IF_FLOPPY, 0, i);
1052         if (index != -1)
1053             fd[i] = drives_table[index].bdrv;
1054         else
1055             fd[i] = NULL;
1056     }
1057     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1058
1059     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1060
1061     if (pci_enabled && usb_enabled) {
1062         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1063     }
1064
1065     if (pci_enabled && acpi_enabled) {
1066         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1067         i2c_bus *smbus;
1068
1069         /* TODO: Populate SPD eeprom data.  */
1070         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1071         for (i = 0; i < 8; i++) {
1072             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1073         }
1074     }
1075
1076     if (i440fx_state) {
1077         i440fx_init_memory_mappings(i440fx_state);
1078     }
1079
1080     if (pci_enabled) {
1081         int max_bus;
1082         int bus, unit;
1083         void *scsi;
1084
1085         max_bus = drive_get_max_bus(IF_SCSI);
1086
1087         for (bus = 0; bus <= max_bus; bus++) {
1088             scsi = lsi_scsi_init(pci_bus, -1);
1089             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1090                 index = drive_get_index(IF_SCSI, bus, unit);
1091                 if (index == -1)
1092                     continue;
1093                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1094             }
1095         }
1096     }
1097
1098     /* Add virtio block devices */
1099     if (pci_enabled) {
1100         int index;
1101         int unit_id = 0;
1102
1103         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1104             virtio_blk_init(pci_bus, drives_table[index].bdrv);
1105             unit_id++;
1106         }
1107     }
1108
1109     /* Add virtio balloon device */
1110     if (pci_enabled)
1111         virtio_balloon_init(pci_bus);
1112 }
1113
1114 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1115                         const char *boot_device, DisplayState *ds,
1116                         const char *kernel_filename,
1117                         const char *kernel_cmdline,
1118                         const char *initrd_filename,
1119                         const char *cpu_model)
1120 {
1121     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1122              kernel_filename, kernel_cmdline,
1123              initrd_filename, 1, cpu_model);
1124 }
1125
1126 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1127                         const char *boot_device, DisplayState *ds,
1128                         const char *kernel_filename,
1129                         const char *kernel_cmdline,
1130                         const char *initrd_filename,
1131                         const char *cpu_model)
1132 {
1133     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1134              kernel_filename, kernel_cmdline,
1135              initrd_filename, 0, cpu_model);
1136 }
1137
1138 QEMUMachine pc_machine = {
1139     .name = "pc",
1140     .desc = "Standard PC",
1141     .init = pc_init_pci,
1142     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1143     .max_cpus = 255,
1144 };
1145
1146 QEMUMachine isapc_machine = {
1147     .name = "isapc",
1148     .desc = "ISA-only PC",
1149     .init = pc_init_isa,
1150     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1151     .max_cpus = 1,
1152 };