tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "tcg.h"
  25
  26 int gen_new_label(void);
  27
  28 static inline void tcg_gen_op1_i32(int opc, TCGv_i32 arg1)
  29 {
  30     *gen_opc_ptr++ = opc;
  31     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  32 }
  33
  34 static inline void tcg_gen_op1_i64(int opc, TCGv_i64 arg1)
  35 {
  36     *gen_opc_ptr++ = opc;
  37     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  38 }
  39
  40 static inline void tcg_gen_op1i(int opc, TCGArg arg1)
  41 {
  42     *gen_opc_ptr++ = opc;
  43     *gen_opparam_ptr++ = arg1;
  44 }
  45
  46 static inline void tcg_gen_op2_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2)
  47 {
  48     *gen_opc_ptr++ = opc;
  49     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  50     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
  51 }
  52
  53 static inline void tcg_gen_op2_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2)
  54 {
  55     *gen_opc_ptr++ = opc;
  56     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  57     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
  58 }
  59
  60 static inline void tcg_gen_op2i_i32(int opc, TCGv_i32 arg1, TCGArg arg2)
  61 {
  62     *gen_opc_ptr++ = opc;
  63     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  64     *gen_opparam_ptr++ = arg2;
  65 }
  66
  67 static inline void tcg_gen_op2i_i64(int opc, TCGv_i64 arg1, TCGArg arg2)
  68 {
  69     *gen_opc_ptr++ = opc;
  70     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  71     *gen_opparam_ptr++ = arg2;
  72 }
  73
  74 static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2)
  75 {
  76     *gen_opc_ptr++ = opc;
  77     *gen_opparam_ptr++ = arg1;
  78     *gen_opparam_ptr++ = arg2;
  79 }
  80
  81 static inline void tcg_gen_op3_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
  82                                    TCGv_i32 arg3)
  83 {
  84     *gen_opc_ptr++ = opc;
  85     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
  86     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
  87     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
  88 }
  89
  90 static inline void tcg_gen_op3_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
  91                                    TCGv_i64 arg3)
  92 {
  93     *gen_opc_ptr++ = opc;
  94     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
  95     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
  96     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
  97 }
  98
  99 static inline void tcg_gen_op3i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 100                                     TCGArg arg3)
 101 {
 102     *gen_opc_ptr++ = opc;
 103     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 104     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 105     *gen_opparam_ptr++ = arg3;
 106 }
 107
 108 static inline void tcg_gen_op3i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 109                                     TCGArg arg3)
 110 {
 111     *gen_opc_ptr++ = opc;
 112     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 113     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 114     *gen_opparam_ptr++ = arg3;
 115 }
 116
 117 static inline void tcg_gen_ldst_op_i32(int opc, TCGv_i32 val, TCGv_ptr base,
 118                                        TCGArg offset)
 119 {
 120     *gen_opc_ptr++ = opc;
 121     *gen_opparam_ptr++ = GET_TCGV_I32(val);
 122     *gen_opparam_ptr++ = GET_TCGV_PTR(base);
 123     *gen_opparam_ptr++ = offset;
 124 }
 125
 126 static inline void tcg_gen_ldst_op_i64(int opc, TCGv_i64 val, TCGv_ptr base,
 127                                        TCGArg offset)
 128 {
 129     *gen_opc_ptr++ = opc;
 130     *gen_opparam_ptr++ = GET_TCGV_I64(val);
 131     *gen_opparam_ptr++ = GET_TCGV_PTR(base);
 132     *gen_opparam_ptr++ = offset;
 133 }
 134
 135 static inline void tcg_gen_qemu_ldst_op_i64_i32(int opc, TCGv_i64 val, TCGv_i32 addr,
 136                                                 TCGArg mem_index)
 137 {
 138     *gen_opc_ptr++ = opc;
 139     *gen_opparam_ptr++ = GET_TCGV_I64(val);
 140     *gen_opparam_ptr++ = GET_TCGV_I32(addr);
 141     *gen_opparam_ptr++ = mem_index;
 142 }
 143
 144 static inline void tcg_gen_qemu_ldst_op_i64_i64(int opc, TCGv_i64 val, TCGv_i64 addr,
 145                                                 TCGArg mem_index)
 146 {
 147     *gen_opc_ptr++ = opc;
 148     *gen_opparam_ptr++ = GET_TCGV_I64(val);
 149     *gen_opparam_ptr++ = GET_TCGV_I64(addr);
 150     *gen_opparam_ptr++ = mem_index;
 151 }
 152
 153 static inline void tcg_gen_op4_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 154                                    TCGv_i32 arg3, TCGv_i32 arg4)
 155 {
 156     *gen_opc_ptr++ = opc;
 157     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 158     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 159     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 160     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 161 }
 162
 163 static inline void tcg_gen_op4_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 164                                    TCGv_i64 arg3, TCGv_i64 arg4)
 165 {
 166     *gen_opc_ptr++ = opc;
 167     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 168     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 169     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 170     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 171 }
 172
 173 static inline void tcg_gen_op4i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 174                                     TCGv_i32 arg3, TCGArg arg4)
 175 {
 176     *gen_opc_ptr++ = opc;
 177     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 178     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 179     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 180     *gen_opparam_ptr++ = arg4;
 181 }
 182
 183 static inline void tcg_gen_op4i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 184                                     TCGv_i64 arg3, TCGArg arg4)
 185 {
 186     *gen_opc_ptr++ = opc;
 187     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 188     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 189     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 190     *gen_opparam_ptr++ = arg4;
 191 }
 192
 193 static inline void tcg_gen_op4ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 194                                      TCGArg arg3, TCGArg arg4)
 195 {
 196     *gen_opc_ptr++ = opc;
 197     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 198     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 199     *gen_opparam_ptr++ = arg3;
 200     *gen_opparam_ptr++ = arg4;
 201 }
 202
 203 static inline void tcg_gen_op4ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 204                                      TCGArg arg3, TCGArg arg4)
 205 {
 206     *gen_opc_ptr++ = opc;
 207     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 208     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 209     *gen_opparam_ptr++ = arg3;
 210     *gen_opparam_ptr++ = arg4;
 211 }
 212
 213 static inline void tcg_gen_op5_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 214                                    TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5)
 215 {
 216     *gen_opc_ptr++ = opc;
 217     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 218     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 219     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 220     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 221     *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
 222 }
 223
 224 static inline void tcg_gen_op5_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 225                                    TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5)
 226 {
 227     *gen_opc_ptr++ = opc;
 228     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 229     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 230     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 231     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 232     *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
 233 }
 234
 235 static inline void tcg_gen_op5i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 236                                     TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5)
 237 {
 238     *gen_opc_ptr++ = opc;
 239     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 240     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 241     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 242     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 243     *gen_opparam_ptr++ = arg5;
 244 }
 245
 246 static inline void tcg_gen_op5i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 247                                     TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5)
 248 {
 249     *gen_opc_ptr++ = opc;
 250     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 251     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 252     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 253     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 254     *gen_opparam_ptr++ = arg5;
 255 }
 256
 257 static inline void tcg_gen_op6_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 258                                    TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5,
 259                                    TCGv_i32 arg6)
 260 {
 261     *gen_opc_ptr++ = opc;
 262     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 263     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 264     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 265     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 266     *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
 267     *gen_opparam_ptr++ = GET_TCGV_I32(arg6);
 268 }
 269
 270 static inline void tcg_gen_op6_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 271                                    TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5,
 272                                    TCGv_i64 arg6)
 273 {
 274     *gen_opc_ptr++ = opc;
 275     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 276     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 277     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 278     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 279     *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
 280     *gen_opparam_ptr++ = GET_TCGV_I64(arg6);
 281 }
 282
 283 static inline void tcg_gen_op6ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
 284                                      TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5,
 285                                      TCGArg arg6)
 286 {
 287     *gen_opc_ptr++ = opc;
 288     *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
 289     *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
 290     *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
 291     *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
 292     *gen_opparam_ptr++ = arg5;
 293     *gen_opparam_ptr++ = arg6;
 294 }
 295
 296 static inline void tcg_gen_op6ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
 297                                      TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5,
 298                                      TCGArg arg6)
 299 {
 300     *gen_opc_ptr++ = opc;
 301     *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
 302     *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
 303     *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
 304     *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
 305     *gen_opparam_ptr++ = arg5;
 306     *gen_opparam_ptr++ = arg6;
 307 }
 308
 309 static inline void gen_set_label(int n)
 310 {
 311     tcg_gen_op1i(INDEX_op_set_label, n);
 312 }
 313
 314 static inline void tcg_gen_br(int label)
 315 {
 316     tcg_gen_op1i(INDEX_op_br, label);
 317 }
 318
 319 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 320 {
 321     if (GET_TCGV_I32(ret) != GET_TCGV_I32(arg))
 322         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 323 }
 324
 325 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 326 {
 327     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 328 }
 329
 330 /* helper calls */
 331 static inline void tcg_gen_helperN(void *func, int flags, int sizemask,
 332                                    TCGArg ret, int nargs, TCGArg *args)
 333 {
 334     TCGv_ptr fn;
 335     fn = tcg_const_ptr((tcg_target_long)func);
 336     tcg_gen_callN(&tcg_ctx, fn, flags, sizemask, ret,
 337                   nargs, args);
 338     tcg_temp_free_ptr(fn);
 339 }
 340
 341 /* FIXME: Should this be pure?  */
 342 static inline void tcg_gen_helper64(void *func, TCGv_i64 ret,
 343                                     TCGv_i64 a, TCGv_i64 b)
 344 {
 345     TCGv_ptr fn;
 346     TCGArg args[2];
 347     fn = tcg_const_ptr((tcg_target_long)func);
 348     args[0] = GET_TCGV_I64(a);
 349     args[1] = GET_TCGV_I64(b);
 350     tcg_gen_callN(&tcg_ctx, fn, 0, 7, GET_TCGV_I64(ret), 2, args);
 351     tcg_temp_free_ptr(fn);
 352 }
 353
 354 /* 32 bit ops */
 355
 356 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 357 {
 358     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 359 }
 360
 361 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 362 {
 363     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 364 }
 365
 366 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 367 {
 368     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 369 }
 370
 371 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 372 {
 373     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 374 }
 375
 376 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
 377 {
 378     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 379 }
 380
 381 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
 382 {
 383     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 384 }
 385
 386 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
 387 {
 388     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 389 }
 390
 391 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
 392 {
 393     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 394 }
 395
 396 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 397 {
 398     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 399 }
 400
 401 static inline void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 402 {
 403     /* some cases can be optimized here */
 404     if (arg2 == 0) {
 405         tcg_gen_mov_i32(ret, arg1);
 406     } else {
 407         TCGv_i32 t0 = tcg_const_i32(arg2);
 408         tcg_gen_add_i32(ret, arg1, t0);
 409         tcg_temp_free_i32(t0);
 410     }
 411 }
 412
 413 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 414 {
 415     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 416 }
 417
 418 static inline void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2)
 419 {
 420     TCGv_i32 t0 = tcg_const_i32(arg1);
 421     tcg_gen_sub_i32(ret, t0, arg2);
 422     tcg_temp_free_i32(t0);
 423 }
 424
 425 static inline void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 426 {
 427     /* some cases can be optimized here */
 428     if (arg2 == 0) {
 429         tcg_gen_mov_i32(ret, arg1);
 430     } else {
 431         TCGv_i32 t0 = tcg_const_i32(arg2);
 432         tcg_gen_sub_i32(ret, arg1, t0);
 433         tcg_temp_free_i32(t0);
 434     }
 435 }
 436
 437 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 438 {
 439     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 440 }
 441
 442 static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 443 {
 444     /* some cases can be optimized here */
 445     if (arg2 == 0) {
 446         tcg_gen_movi_i32(ret, 0);
 447     } else if (arg2 == 0xffffffff) {
 448         tcg_gen_mov_i32(ret, arg1);
 449     } else {
 450         TCGv_i32 t0 = tcg_const_i32(arg2);
 451         tcg_gen_and_i32(ret, arg1, t0);
 452         tcg_temp_free_i32(t0);
 453     }
 454 }
 455
 456 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 457 {
 458     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 459 }
 460
 461 static inline void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 462 {
 463     /* some cases can be optimized here */
 464     if (arg2 == 0xffffffff) {
 465         tcg_gen_movi_i32(ret, 0xffffffff);
 466     } else if (arg2 == 0) {
 467         tcg_gen_mov_i32(ret, arg1);
 468     } else {
 469         TCGv_i32 t0 = tcg_const_i32(arg2);
 470         tcg_gen_or_i32(ret, arg1, t0);
 471         tcg_temp_free_i32(t0);
 472     }
 473 }
 474
 475 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 476 {
 477     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 478 }
 479
 480 static inline void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 481 {
 482     /* some cases can be optimized here */
 483     if (arg2 == 0) {
 484         tcg_gen_mov_i32(ret, arg1);
 485     } else {
 486         TCGv_i32 t0 = tcg_const_i32(arg2);
 487         tcg_gen_xor_i32(ret, arg1, t0);
 488         tcg_temp_free_i32(t0);
 489     }
 490 }
 491
 492 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 493 {
 494     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 495 }
 496
 497 static inline void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 498 {
 499     if (arg2 == 0) {
 500         tcg_gen_mov_i32(ret, arg1);
 501     } else {
 502         TCGv_i32 t0 = tcg_const_i32(arg2);
 503         tcg_gen_shl_i32(ret, arg1, t0);
 504         tcg_temp_free_i32(t0);
 505     }
 506 }
 507
 508 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 509 {
 510     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 511 }
 512
 513 static inline void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 514 {
 515     if (arg2 == 0) {
 516         tcg_gen_mov_i32(ret, arg1);
 517     } else {
 518         TCGv_i32 t0 = tcg_const_i32(arg2);
 519         tcg_gen_shr_i32(ret, arg1, t0);
 520         tcg_temp_free_i32(t0);
 521     }
 522 }
 523
 524 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 525 {
 526     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 527 }
 528
 529 static inline void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 530 {
 531     if (arg2 == 0) {
 532         tcg_gen_mov_i32(ret, arg1);
 533     } else {
 534         TCGv_i32 t0 = tcg_const_i32(arg2);
 535         tcg_gen_sar_i32(ret, arg1, t0);
 536         tcg_temp_free_i32(t0);
 537     }
 538 }
 539
 540 static inline void tcg_gen_brcond_i32(int cond, TCGv_i32 arg1, TCGv_i32 arg2,
 541                                       int label_index)
 542 {
 543     tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
 544 }
 545
 546 static inline void tcg_gen_brcondi_i32(int cond, TCGv_i32 arg1, int32_t arg2,
 547                                        int label_index)
 548 {
 549     TCGv_i32 t0 = tcg_const_i32(arg2);
 550     tcg_gen_brcond_i32(cond, arg1, t0, label_index);
 551     tcg_temp_free_i32(t0);
 552 }
 553
 554 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 555 {
 556     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 557 }
 558
 559 static inline void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
 560 {
 561     TCGv_i32 t0 = tcg_const_i32(arg2);
 562     tcg_gen_mul_i32(ret, arg1, t0);
 563     tcg_temp_free_i32(t0);
 564 }
 565
 566 #ifdef TCG_TARGET_HAS_div_i32
 567 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 568 {
 569     tcg_gen_op3_i32(INDEX_op_div_i32, ret, arg1, arg2);
 570 }
 571
 572 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 573 {
 574     tcg_gen_op3_i32(INDEX_op_rem_i32, ret, arg1, arg2);
 575 }
 576
 577 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 578 {
 579     tcg_gen_op3_i32(INDEX_op_divu_i32, ret, arg1, arg2);
 580 }
 581
 582 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 583 {
 584     tcg_gen_op3_i32(INDEX_op_remu_i32, ret, arg1, arg2);
 585 }
 586 #else
 587 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 588 {
 589     TCGv_i32 t0;
 590     t0 = tcg_temp_new_i32();
 591     tcg_gen_sari_i32(t0, arg1, 31);
 592     tcg_gen_op5_i32(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
 593     tcg_temp_free_i32(t0);
 594 }
 595
 596 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 597 {
 598     TCGv_i32 t0;
 599     t0 = tcg_temp_new_i32();
 600     tcg_gen_sari_i32(t0, arg1, 31);
 601     tcg_gen_op5_i32(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
 602     tcg_temp_free_i32(t0);
 603 }
 604
 605 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 606 {
 607     TCGv_i32 t0;
 608     t0 = tcg_temp_new_i32();
 609     tcg_gen_movi_i32(t0, 0);
 610     tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
 611     tcg_temp_free_i32(t0);
 612 }
 613
 614 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 615 {
 616     TCGv_i32 t0;
 617     t0 = tcg_temp_new_i32();
 618     tcg_gen_movi_i32(t0, 0);
 619     tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
 620     tcg_temp_free_i32(t0);
 621 }
 622 #endif
 623
 624 #if TCG_TARGET_REG_BITS == 32
 625
 626 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 627 {
 628     if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg)) {
 629         tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
 630         tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
 631     }
 632 }
 633
 634 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 635 {
 636     tcg_gen_movi_i32(TCGV_LOW(ret), arg);
 637     tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
 638 }
 639
 640 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 641                                     tcg_target_long offset)
 642 {
 643     tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset);
 644     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
 645 }
 646
 647 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 648                                     tcg_target_long offset)
 649 {
 650     tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
 651     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31);
 652 }
 653
 654 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 655                                      tcg_target_long offset)
 656 {
 657     tcg_gen_ld16u_i32(TCGV_LOW(ret), TCGV_LOW(arg2), offset);
 658     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
 659 }
 660
 661 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 662                                      tcg_target_long offset)
 663 {
 664     tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset);
 665     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
 666 }
 667
 668 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 669                                      tcg_target_long offset)
 670 {
 671     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
 672     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
 673 }
 674
 675 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 676                                      tcg_target_long offset)
 677 {
 678     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
 679     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
 680 }
 681
 682 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 683                                   tcg_target_long offset)
 684 {
 685     /* since arg2 and ret have different types, they cannot be the
 686        same temporary */
 687 #ifdef TCG_TARGET_WORDS_BIGENDIAN
 688     tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
 689     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
 690 #else
 691     tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
 692     tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
 693 #endif
 694 }
 695
 696 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 697                                    tcg_target_long offset)
 698 {
 699     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 700 }
 701
 702 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 703                                     tcg_target_long offset)
 704 {
 705     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 706 }
 707
 708 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 709                                     tcg_target_long offset)
 710 {
 711     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 712 }
 713
 714 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 715                                   tcg_target_long offset)
 716 {
 717 #ifdef TCG_TARGET_WORDS_BIGENDIAN
 718     tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
 719     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4);
 720 #else
 721     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 722     tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
 723 #endif
 724 }
 725
 726 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 727 {
 728     tcg_gen_op6_i32(INDEX_op_add2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
 729                     TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
 730                     TCGV_HIGH(arg2));
 731 }
 732
 733 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 734 {
 735     tcg_gen_op6_i32(INDEX_op_sub2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
 736                     TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
 737                     TCGV_HIGH(arg2));
 738 }
 739
 740 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 741 {
 742     tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
 743     tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
 744 }
 745
 746 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 747 {
 748     tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
 749     tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
 750 }
 751
 752 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 753 {
 754     tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
 755     tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
 756 }
 757
 758 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 759 {
 760     tcg_gen_ori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
 761     tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
 762 }
 763
 764 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 765 {
 766     tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
 767     tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
 768 }
 769
 770 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 771 {
 772     tcg_gen_xori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
 773     tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
 774 }
 775
 776 /* XXX: use generic code when basic block handling is OK or CPU
 777    specific code (x86) */
 778 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 779 {
 780     tcg_gen_helper64(tcg_helper_shl_i64, ret, arg1, arg2);
 781 }
 782
 783 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 784 {
 785     tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0);
 786 }
 787
 788 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 789 {
 790     tcg_gen_helper64(tcg_helper_shr_i64, ret, arg1, arg2);
 791 }
 792
 793 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 794 {
 795     tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0);
 796 }
 797
 798 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 799 {
 800     tcg_gen_helper64(tcg_helper_sar_i64, ret, arg1, arg2);
 801 }
 802
 803 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 804 {
 805     tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1);
 806 }
 807
 808 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
 809                                       int label_index)
 810 {
 811     tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
 812                       TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
 813                       TCGV_HIGH(arg2), cond, label_index);
 814 }
 815
 816 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 817 {
 818     TCGv_i64 t0;
 819     TCGv_i32 t1;
 820
 821     t0 = tcg_temp_new_i64();
 822     t1 = tcg_temp_new_i32();
 823
 824     tcg_gen_op4_i32(INDEX_op_mulu2_i32, TCGV_LOW(t0), TCGV_HIGH(t0),
 825                     TCGV_LOW(arg1), TCGV_LOW(arg2));
 826
 827     tcg_gen_mul_i32(t1, TCGV_LOW(arg1), TCGV_HIGH(arg2));
 828     tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
 829     tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), TCGV_LOW(arg2));
 830     tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
 831
 832     tcg_gen_mov_i64(ret, t0);
 833     tcg_temp_free_i64(t0);
 834     tcg_temp_free_i32(t1);
 835 }
 836
 837 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 838 {
 839     tcg_gen_helper64(tcg_helper_div_i64, ret, arg1, arg2);
 840 }
 841
 842 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 843 {
 844     tcg_gen_helper64(tcg_helper_rem_i64, ret, arg1, arg2);
 845 }
 846
 847 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 848 {
 849     tcg_gen_helper64(tcg_helper_divu_i64, ret, arg1, arg2);
 850 }
 851
 852 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 853 {
 854     tcg_gen_helper64(tcg_helper_remu_i64, ret, arg1, arg2);
 855 }
 856
 857 #else
 858
 859 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 860 {
 861     if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg))
 862         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 863 }
 864
 865 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 866 {
 867     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 868 }
 869
 870 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_i64 arg2,
 871                                     tcg_target_long offset)
 872 {
 873     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 874 }
 875
 876 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_i64 arg2,
 877                                     tcg_target_long offset)
 878 {
 879     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 880 }
 881
 882 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_i64 arg2,
 883                                      tcg_target_long offset)
 884 {
 885     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 886 }
 887
 888 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_i64 arg2,
 889                                      tcg_target_long offset)
 890 {
 891     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 892 }
 893
 894 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_i64 arg2,
 895                                      tcg_target_long offset)
 896 {
 897     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 898 }
 899
 900 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_i64 arg2,
 901                                      tcg_target_long offset)
 902 {
 903     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 904 }
 905
 906 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_i64 arg2, tcg_target_long offset)
 907 {
 908     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
 909 }
 910
 911 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_i64 arg2,
 912                                    tcg_target_long offset)
 913 {
 914     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
 915 }
 916
 917 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_i64 arg2,
 918                                     tcg_target_long offset)
 919 {
 920     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
 921 }
 922
 923 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_i64 arg2,
 924                                     tcg_target_long offset)
 925 {
 926     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
 927 }
 928
 929 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_i64 arg2, tcg_target_long offset)
 930 {
 931     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
 932 }
 933
 934 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 935 {
 936     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
 937 }
 938
 939 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 940 {
 941     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
 942 }
 943
 944 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 945 {
 946     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
 947 }
 948
 949 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 950 {
 951     TCGv_i64 t0 = tcg_const_i64(arg2);
 952     tcg_gen_and_i64(ret, arg1, t0);
 953     tcg_temp_free_i64(t0);
 954 }
 955
 956 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 957 {
 958     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
 959 }
 960
 961 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 962 {
 963     TCGv_i64 t0 = tcg_const_i64(arg2);
 964     tcg_gen_or_i64(ret, arg1, t0);
 965     tcg_temp_free_i64(t0);
 966 }
 967
 968 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 969 {
 970     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
 971 }
 972
 973 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 974 {
 975     TCGv_i64 t0 = tcg_const_i64(arg2);
 976     tcg_gen_xor_i64(ret, arg1, t0);
 977     tcg_temp_free_i64(t0);
 978 }
 979
 980 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 981 {
 982     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
 983 }
 984
 985 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
 986 {
 987     if (arg2 == 0) {
 988         tcg_gen_mov_i64(ret, arg1);
 989     } else {
 990         TCGv_i64 t0 = tcg_const_i64(arg2);
 991         tcg_gen_shl_i64(ret, arg1, t0);
 992         tcg_temp_free_i64(t0);
 993     }
 994 }
 995
 996 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 997 {
 998     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
 999 }
1000
1001 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1002 {
1003     if (arg2 == 0) {
1004         tcg_gen_mov_i64(ret, arg1);
1005     } else {
1006         TCGv_i64 t0 = tcg_const_i64(arg2);
1007         tcg_gen_shr_i64(ret, arg1, t0);
1008         tcg_temp_free_i64(t0);
1009     }
1010 }
1011
1012 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1013 {
1014     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
1015 }
1016
1017 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1018 {
1019     if (arg2 == 0) {
1020         tcg_gen_mov_i64(ret, arg1);
1021     } else {
1022         TCGv_i64 t0 = tcg_const_i64(arg2);
1023         tcg_gen_sar_i64(ret, arg1, t0);
1024         tcg_temp_free_i64(t0);
1025     }
1026 }
1027
1028 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
1029                                       int label_index)
1030 {
1031     tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
1032 }
1033
1034 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1035 {
1036     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
1037 }
1038
1039 #ifdef TCG_TARGET_HAS_div_i64
1040 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1041 {
1042     tcg_gen_op3_i64(INDEX_op_div_i64, ret, arg1, arg2);
1043 }
1044
1045 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1046 {
1047     tcg_gen_op3_i64(INDEX_op_rem_i64, ret, arg1, arg2);
1048 }
1049
1050 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1051 {
1052     tcg_gen_op3_i64(INDEX_op_divu_i64, ret, arg1, arg2);
1053 }
1054
1055 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1056 {
1057     tcg_gen_op3_i64(INDEX_op_remu_i64, ret, arg1, arg2);
1058 }
1059 #else
1060 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1061 {
1062     TCGv_i64 t0;
1063     t0 = tcg_temp_new_i64();
1064     tcg_gen_sari_i64(t0, arg1, 63);
1065     tcg_gen_op5_i64(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2);
1066     tcg_temp_free_i64(t0);
1067 }
1068
1069 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1070 {
1071     TCGv_i64 t0;
1072     t0 = tcg_temp_new_i64();
1073     tcg_gen_sari_i64(t0, arg1, 63);
1074     tcg_gen_op5_i64(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2);
1075     tcg_temp_free_i64(t0);
1076 }
1077
1078 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1079 {
1080     TCGv_i64 t0;
1081     t0 = tcg_temp_new_i64();
1082     tcg_gen_movi_i64(t0, 0);
1083     tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2);
1084     tcg_temp_free_i64(t0);
1085 }
1086
1087 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1088 {
1089     TCGv_i64 t0;
1090     t0 = tcg_temp_new_i64();
1091     tcg_gen_movi_i64(t0, 0);
1092     tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2);
1093     tcg_temp_free_i64(t0);
1094 }
1095 #endif
1096
1097 #endif
1098
1099 static inline void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1100 {
1101     /* some cases can be optimized here */
1102     if (arg2 == 0) {
1103         tcg_gen_mov_i64(ret, arg1);
1104     } else {
1105         TCGv_i64 t0 = tcg_const_i64(arg2);
1106         tcg_gen_add_i64(ret, arg1, t0);
1107         tcg_temp_free_i64(t0);
1108     }
1109 }
1110
1111 static inline void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2)
1112 {
1113     TCGv_i64 t0 = tcg_const_i64(arg1);
1114     tcg_gen_sub_i64(ret, t0, arg2);
1115     tcg_temp_free_i64(t0);
1116 }
1117
1118 static inline void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1119 {
1120     /* some cases can be optimized here */
1121     if (arg2 == 0) {
1122         tcg_gen_mov_i64(ret, arg1);
1123     } else {
1124         TCGv_i64 t0 = tcg_const_i64(arg2);
1125         tcg_gen_sub_i64(ret, arg1, t0);
1126         tcg_temp_free_i64(t0);
1127     }
1128 }
1129 static inline void tcg_gen_brcondi_i64(int cond, TCGv_i64 arg1, int64_t arg2,
1130                                        int label_index)
1131 {
1132     TCGv_i64 t0 = tcg_const_i64(arg2);
1133     tcg_gen_brcond_i64(cond, arg1, t0, label_index);
1134     tcg_temp_free_i64(t0);
1135 }
1136
1137 static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1138 {
1139     TCGv_i64 t0 = tcg_const_i64(arg2);
1140     tcg_gen_mul_i64(ret, arg1, t0);
1141     tcg_temp_free_i64(t0);
1142 }
1143
1144
1145 /***************************************/
1146 /* optional operations */
1147
1148 static inline void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg)
1149 {
1150 #ifdef TCG_TARGET_HAS_ext8s_i32
1151     tcg_gen_op2_i32(INDEX_op_ext8s_i32, ret, arg);
1152 #else
1153     tcg_gen_shli_i32(ret, arg, 24);
1154     tcg_gen_sari_i32(ret, ret, 24);
1155 #endif
1156 }
1157
1158 static inline void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg)
1159 {
1160 #ifdef TCG_TARGET_HAS_ext16s_i32
1161     tcg_gen_op2_i32(INDEX_op_ext16s_i32, ret, arg);
1162 #else
1163     tcg_gen_shli_i32(ret, arg, 16);
1164     tcg_gen_sari_i32(ret, ret, 16);
1165 #endif
1166 }
1167
1168 /* These are currently just for convenience.
1169    We assume a target will recognise these automatically .  */
1170 static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg)
1171 {
1172     tcg_gen_andi_i32(ret, arg, 0xffu);
1173 }
1174
1175 static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
1176 {
1177     tcg_gen_andi_i32(ret, arg, 0xffffu);
1178 }
1179
1180 /* Note: we assume the two high bytes are set to zero */
1181 static inline void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg)
1182 {
1183 #ifdef TCG_TARGET_HAS_bswap16_i32
1184     tcg_gen_op2_i32(INDEX_op_bswap16_i32, ret, arg);
1185 #else
1186     TCGv_i32 t0, t1;
1187     t0 = tcg_temp_new_i32();
1188     t1 = tcg_temp_new_i32();
1189
1190     tcg_gen_shri_i32(t0, arg, 8);
1191     tcg_gen_andi_i32(t1, arg, 0x000000ff);
1192     tcg_gen_shli_i32(t1, t1, 8);
1193     tcg_gen_or_i32(ret, t0, t1);
1194     tcg_temp_free_i32(t0);
1195     tcg_temp_free_i32(t1);
1196 #endif
1197 }
1198
1199 static inline void tcg_gen_bswap_i32(TCGv_i32 ret, TCGv_i32 arg)
1200 {
1201 #ifdef TCG_TARGET_HAS_bswap_i32
1202     tcg_gen_op2_i32(INDEX_op_bswap_i32, ret, arg);
1203 #else
1204     TCGv_i32 t0, t1;
1205     t0 = tcg_temp_new_i32();
1206     t1 = tcg_temp_new_i32();
1207
1208     tcg_gen_shli_i32(t0, arg, 24);
1209
1210     tcg_gen_andi_i32(t1, arg, 0x0000ff00);
1211     tcg_gen_shli_i32(t1, t1, 8);
1212     tcg_gen_or_i32(t0, t0, t1);
1213
1214     tcg_gen_shri_i32(t1, arg, 8);
1215     tcg_gen_andi_i32(t1, t1, 0x0000ff00);
1216     tcg_gen_or_i32(t0, t0, t1);
1217
1218     tcg_gen_shri_i32(t1, arg, 24);
1219     tcg_gen_or_i32(ret, t0, t1);
1220     tcg_temp_free_i32(t0);
1221     tcg_temp_free_i32(t1);
1222 #endif
1223 }
1224
1225 #if TCG_TARGET_REG_BITS == 32
1226 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
1227 {
1228     tcg_gen_ext8s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1229     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1230 }
1231
1232 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
1233 {
1234     tcg_gen_ext16s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1235     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1236 }
1237
1238 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
1239 {
1240     tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1241     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1242 }
1243
1244 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
1245 {
1246     tcg_gen_ext8u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1247     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1248 }
1249
1250 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
1251 {
1252     tcg_gen_ext16u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1253     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1254 }
1255
1256 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
1257 {
1258     tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1259     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1260 }
1261
1262 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
1263 {
1264     tcg_gen_mov_i32(ret, TCGV_LOW(arg));
1265 }
1266
1267 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1268 {
1269     tcg_gen_mov_i32(TCGV_LOW(ret), arg);
1270     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1271 }
1272
1273 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1274 {
1275     tcg_gen_mov_i32(TCGV_LOW(ret), arg);
1276     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1277 }
1278
1279 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg)
1280 {
1281     TCGv_i32 t0, t1;
1282     t0 = tcg_temp_new_i32();
1283     t1 = tcg_temp_new_i32();
1284
1285     tcg_gen_bswap_i32(t0, TCGV_LOW(arg));
1286     tcg_gen_bswap_i32(t1, TCGV_HIGH(arg));
1287     tcg_gen_mov_i32(TCGV_LOW(ret), t1);
1288     tcg_gen_mov_i32(TCGV_HIGH(ret), t0);
1289     tcg_temp_free_i32(t0);
1290     tcg_temp_free_i32(t1);
1291 }
1292 #else
1293
1294 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
1295 {
1296 #ifdef TCG_TARGET_HAS_ext8s_i64
1297     tcg_gen_op2_i64(INDEX_op_ext8s_i64, ret, arg);
1298 #else
1299     tcg_gen_shli_i64(ret, arg, 56);
1300     tcg_gen_sari_i64(ret, ret, 56);
1301 #endif
1302 }
1303
1304 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
1305 {
1306 #ifdef TCG_TARGET_HAS_ext16s_i64
1307     tcg_gen_op2_i64(INDEX_op_ext16s_i64, ret, arg);
1308 #else
1309     tcg_gen_shli_i64(ret, arg, 48);
1310     tcg_gen_sari_i64(ret, ret, 48);
1311 #endif
1312 }
1313
1314 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
1315 {
1316 #ifdef TCG_TARGET_HAS_ext32s_i64
1317     tcg_gen_op2_i64(INDEX_op_ext32s_i64, ret, arg);
1318 #else
1319     tcg_gen_shli_i64(ret, arg, 32);
1320     tcg_gen_sari_i64(ret, ret, 32);
1321 #endif
1322 }
1323
1324 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
1325 {
1326     tcg_gen_andi_i64(ret, arg, 0xffu);
1327 }
1328
1329 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
1330 {
1331     tcg_gen_andi_i64(ret, arg, 0xffffu);
1332 }
1333
1334 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
1335 {
1336     tcg_gen_andi_i64(ret, arg, 0xffffffffu);
1337 }
1338
1339 /* Note: we assume the target supports move between 32 and 64 bit
1340    registers.  This will probably break MIPS64 targets.  */
1341 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
1342 {
1343     tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
1344 }
1345
1346 /* Note: we assume the target supports move between 32 and 64 bit
1347    registers */
1348 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1349 {
1350     tcg_gen_andi_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)), 0xffffffffu);
1351 }
1352
1353 /* Note: we assume the target supports move between 32 and 64 bit
1354    registers */
1355 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1356 {
1357     tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
1358 }
1359
1360 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg)
1361 {
1362 #ifdef TCG_TARGET_HAS_bswap_i64
1363     tcg_gen_op2_i64(INDEX_op_bswap_i64, ret, arg);
1364 #else
1365     TCGv_i32 t0, t1;
1366     t0 = tcg_temp_new_i32();
1367     t1 = tcg_temp_new_i32();
1368
1369     tcg_gen_shli_i64(t0, arg, 56);
1370
1371     tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1372     tcg_gen_shli_i64(t1, t1, 40);
1373     tcg_gen_or_i64(t0, t0, t1);
1374
1375     tcg_gen_andi_i64(t1, arg, 0x00ff0000);
1376     tcg_gen_shli_i64(t1, t1, 24);
1377     tcg_gen_or_i64(t0, t0, t1);
1378
1379     tcg_gen_andi_i64(t1, arg, 0xff000000);
1380     tcg_gen_shli_i64(t1, t1, 8);
1381     tcg_gen_or_i64(t0, t0, t1);
1382
1383     tcg_gen_shri_i64(t1, arg, 8);
1384     tcg_gen_andi_i64(t1, t1, 0xff000000);
1385     tcg_gen_or_i64(t0, t0, t1);
1386
1387     tcg_gen_shri_i64(t1, arg, 24);
1388     tcg_gen_andi_i64(t1, t1, 0x00ff0000);
1389     tcg_gen_or_i64(t0, t0, t1);
1390
1391     tcg_gen_shri_i64(t1, arg, 40);
1392     tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1393     tcg_gen_or_i64(t0, t0, t1);
1394
1395     tcg_gen_shri_i64(t1, arg, 56);
1396     tcg_gen_or_i64(ret, t0, t1);
1397     tcg_temp_free_i32(t0);
1398     tcg_temp_free_i32(t1);
1399 #endif
1400 }
1401
1402 #endif
1403
1404 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
1405 {
1406 #ifdef TCG_TARGET_HAS_neg_i32
1407     tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
1408 #else
1409     TCGv_i32 t0 = tcg_const_i32(0);
1410     tcg_gen_sub_i32(ret, t0, arg);
1411     tcg_temp_free_i32(t0);
1412 #endif
1413 }
1414
1415 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
1416 {
1417 #ifdef TCG_TARGET_HAS_neg_i64
1418     tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
1419 #else
1420     TCGv_i64 t0 = tcg_const_i64(0);
1421     tcg_gen_sub_i64(ret, t0, arg);
1422     tcg_temp_free_i64(t0);
1423 #endif
1424 }
1425
1426 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
1427 {
1428     tcg_gen_xori_i32(ret, arg, -1);
1429 }
1430
1431 static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
1432 {
1433     tcg_gen_xori_i64(ret, arg, -1);
1434 }
1435
1436 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
1437 {
1438     tcg_gen_op1_i32(INDEX_op_discard, arg);
1439 }
1440
1441 #if TCG_TARGET_REG_BITS == 32
1442 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
1443 {
1444     tcg_gen_discard_i32(TCGV_LOW(arg));
1445     tcg_gen_discard_i32(TCGV_HIGH(arg));
1446 }
1447 #else
1448 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
1449 {
1450     tcg_gen_op1_i64(INDEX_op_discard, arg);
1451 }
1452 #endif
1453
1454 static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high)
1455 {
1456 #if TCG_TARGET_REG_BITS == 32
1457     tcg_gen_mov_i32(TCGV_LOW(dest), low);
1458     tcg_gen_mov_i32(TCGV_HIGH(dest), high);
1459 #else
1460     TCGv_i64 tmp = tcg_temp_new_i64();
1461     /* This extension is only needed for type correctness.
1462        We may be able to do better given target specific information.  */
1463     tcg_gen_extu_i32_i64(tmp, high);
1464     tcg_gen_shli_i64(tmp, tmp, 32);
1465     tcg_gen_extu_i32_i64(dest, low);
1466     tcg_gen_or_i64(dest, dest, tmp);
1467     tcg_temp_free_i64(tmp);
1468 #endif
1469 }
1470
1471 static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64 high)
1472 {
1473 #if TCG_TARGET_REG_BITS == 32
1474     tcg_gen_concat_i32_i64(dest, TCGV_LOW(low), TCGV_LOW(high));
1475 #else
1476     TCGv_i64 tmp = tcg_temp_new_i64();
1477     tcg_gen_ext32u_i64(dest, low);
1478     tcg_gen_shli_i64(tmp, high, 32);
1479     tcg_gen_or_i64(dest, dest, tmp);
1480     tcg_temp_free_i64(tmp);
1481 #endif
1482 }
1483
1484 static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1485 {
1486     TCGv_i32 t0;
1487     t0 = tcg_temp_new_i32();
1488     tcg_gen_not_i32(t0, arg2);
1489     tcg_gen_and_i32(ret, arg1, t0);
1490     tcg_temp_free_i32(t0);
1491 }
1492
1493 static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1494 {
1495     TCGv_i64 t0;
1496     t0 = tcg_temp_new_i64();
1497     tcg_gen_not_i64(t0, arg2);
1498     tcg_gen_and_i64(ret, arg1, t0);
1499     tcg_temp_free_i64(t0);
1500 }
1501
1502 static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1503 {
1504     TCGv_i32 t0;
1505     t0 = tcg_temp_new_i32();
1506     tcg_gen_xor_i32(t0, arg1, arg2);
1507     tcg_gen_not_i32(ret, t0);
1508     tcg_temp_free_i32(t0);
1509 }
1510
1511 static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1512 {
1513     TCGv_i64 t0;
1514     t0 = tcg_temp_new_i64();
1515     tcg_gen_xor_i64(t0, arg1, arg2);
1516     tcg_gen_not_i64(ret, t0);
1517     tcg_temp_free_i64(t0);
1518 }
1519
1520 static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1521 {
1522     TCGv_i32 t0;
1523     t0 = tcg_temp_new_i32();
1524     tcg_gen_and_i32(t0, arg1, arg2);
1525     tcg_gen_not_i32(ret, t0);
1526     tcg_temp_free_i32(t0);
1527 }
1528
1529 static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1530 {
1531     TCGv_i64 t0;
1532     t0 = tcg_temp_new_i64();
1533     tcg_gen_and_i64(t0, arg1, arg2);
1534     tcg_gen_not_i64(ret, t0);
1535     tcg_temp_free_i64(t0);
1536 }
1537
1538 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1539 {
1540     TCGv_i32 t0;
1541     t0 = tcg_temp_new_i32();
1542     tcg_gen_or_i32(t0, arg1, arg2);
1543     tcg_gen_not_i32(ret, t0);
1544     tcg_temp_free_i32(t0);
1545 }
1546
1547 static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1548 {
1549     TCGv_i64 t0;
1550     t0 = tcg_temp_new_i64();
1551     tcg_gen_or_i64(t0, arg1, arg2);
1552     tcg_gen_not_i64(ret, t0);
1553     tcg_temp_free_i64(t0);
1554 }
1555
1556 static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1557 {
1558     TCGv_i32 t0;
1559     t0 = tcg_temp_new_i32();
1560     tcg_gen_not_i32(t0, arg2);
1561     tcg_gen_or_i32(ret, arg1, t0);
1562     tcg_temp_free_i32(t0);
1563 }
1564
1565 static inline void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1566 {
1567     TCGv_i64 t0;
1568     t0 = tcg_temp_new_i64();
1569     tcg_gen_not_i64(t0, arg2);
1570     tcg_gen_or_i64(ret, arg1, t0);
1571     tcg_temp_free_i64(t0);
1572 }
1573
1574 static inline void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1575 {
1576     TCGv_i32 t0, t1;
1577
1578     t0 = tcg_temp_new_i32();
1579     t1 = tcg_temp_new_i32();
1580     tcg_gen_shl_i32(t0, arg1, arg2);
1581     tcg_gen_subfi_i32(t1, 32, arg2);
1582     tcg_gen_shr_i32(t1, arg1, t1);
1583     tcg_gen_or_i32(ret, t0, t1);
1584     tcg_temp_free_i32(t0);
1585     tcg_temp_free_i32(t1);
1586 }
1587
1588 static inline void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1589 {
1590     TCGv_i64 t0, t1;
1591
1592     t0 = tcg_temp_new_i64();
1593     t1 = tcg_temp_new_i64();
1594     tcg_gen_shl_i64(t0, arg1, arg2);
1595     tcg_gen_subfi_i64(t1, 64, arg2);
1596     tcg_gen_shr_i64(t1, arg1, t1);
1597     tcg_gen_or_i64(ret, t0, t1);
1598     tcg_temp_free_i64(t0);
1599     tcg_temp_free_i64(t1);
1600 }
1601
1602 static inline void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
1603 {
1604     /* some cases can be optimized here */
1605     if (arg2 == 0) {
1606         tcg_gen_mov_i32(ret, arg1);
1607     } else {
1608         TCGv_i32 t0, t1;
1609         t0 = tcg_temp_new_i32();
1610         t1 = tcg_temp_new_i32();
1611         tcg_gen_shli_i32(t0, arg1, arg2);
1612         tcg_gen_shri_i32(t1, arg1, 32 - arg2);
1613         tcg_gen_or_i32(ret, t0, t1);
1614         tcg_temp_free_i32(t0);
1615         tcg_temp_free_i32(t1);
1616     }
1617 }
1618
1619 static inline void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1620 {
1621     /* some cases can be optimized here */
1622     if (arg2 == 0) {
1623         tcg_gen_mov_i64(ret, arg1);
1624     } else {
1625         TCGv_i64 t0, t1;
1626         t0 = tcg_temp_new_i64();
1627         t1 = tcg_temp_new_i64();
1628         tcg_gen_shli_i64(t0, arg1, arg2);
1629         tcg_gen_shri_i64(t1, arg1, 64 - arg2);
1630         tcg_gen_or_i64(ret, t0, t1);
1631         tcg_temp_free_i64(t0);
1632         tcg_temp_free_i64(t1);
1633     }
1634 }
1635
1636 static inline void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1637 {
1638     TCGv_i32 t0, t1;
1639
1640     t0 = tcg_temp_new_i32();
1641     t1 = tcg_temp_new_i32();
1642     tcg_gen_shr_i32(t0, arg1, arg2);
1643     tcg_gen_subfi_i32(t1, 32, arg2);
1644     tcg_gen_shl_i32(t1, arg1, t1);
1645     tcg_gen_or_i32(ret, t0, t1);
1646     tcg_temp_free_i32(t0);
1647     tcg_temp_free_i32(t1);
1648 }
1649
1650 static inline void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1651 {
1652     TCGv_i64 t0, t1;
1653
1654     t0 = tcg_temp_new_i64();
1655     t1 = tcg_temp_new_i64();
1656     tcg_gen_shl_i64(t0, arg1, arg2);
1657     tcg_gen_subfi_i64(t1, 64, arg2);
1658     tcg_gen_shl_i64(t1, arg1, t1);
1659     tcg_gen_or_i64(ret, t0, t1);
1660     tcg_temp_free_i64(t0);
1661     tcg_temp_free_i64(t1);
1662 }
1663
1664 static inline void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
1665 {
1666     /* some cases can be optimized here */
1667     if (arg2 == 0) {
1668         tcg_gen_mov_i32(ret, arg1);
1669     } else {
1670         tcg_gen_rotli_i32(ret, arg1, 32 - arg2);
1671     }
1672 }
1673
1674 static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1675 {
1676     /* some cases can be optimized here */
1677     if (arg2 == 0) {
1678         tcg_gen_mov_i64(ret, arg1);
1679     } else {
1680         tcg_gen_rotli_i64(ret, arg1, 64 - arg2);
1681     }
1682 }
1683
1684 /***************************************/
1685 /* QEMU specific operations. Their type depend on the QEMU CPU
1686    type. */
1687 #ifndef TARGET_LONG_BITS
1688 #error must include QEMU headers
1689 #endif
1690
1691 #if TARGET_LONG_BITS == 32
1692 #define TCGv TCGv_i32
1693 #define tcg_temp_new() tcg_temp_new_i32()
1694 #define tcg_global_reg_new tcg_global_reg_new_i32
1695 #define tcg_global_mem_new tcg_global_mem_new_i32
1696 #define tcg_temp_local_new() tcg_temp_local_new_i32()
1697 #define tcg_temp_free tcg_temp_free_i32
1698 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
1699 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
1700 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
1701 #define TCGV_EQUAL(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
1702 #else
1703 #define TCGv TCGv_i64
1704 #define tcg_temp_new() tcg_temp_new_i64()
1705 #define tcg_global_reg_new tcg_global_reg_new_i64
1706 #define tcg_global_mem_new tcg_global_mem_new_i64
1707 #define tcg_temp_local_new() tcg_temp_local_new_i64()
1708 #define tcg_temp_free tcg_temp_free_i64
1709 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
1710 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
1711 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
1712 #define TCGV_EQUAL(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
1713 #endif
1714
1715 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1716 static inline void tcg_gen_debug_insn_start(uint64_t pc)
1717 {
1718     /* XXX: must really use a 32 bit size for TCGArg in all cases */
1719 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1720     tcg_gen_op2ii(INDEX_op_debug_insn_start,
1721                   (uint32_t)(pc), (uint32_t)(pc >> 32));
1722 #else
1723     tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
1724 #endif
1725 }
1726
1727 static inline void tcg_gen_exit_tb(tcg_target_long val)
1728 {
1729     tcg_gen_op1i(INDEX_op_exit_tb, val);
1730 }
1731
1732 static inline void tcg_gen_goto_tb(int idx)
1733 {
1734     tcg_gen_op1i(INDEX_op_goto_tb, idx);
1735 }
1736
1737 #if TCG_TARGET_REG_BITS == 32
1738 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1739 {
1740 #if TARGET_LONG_BITS == 32
1741     tcg_gen_op3i_i32(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1742 #else
1743     tcg_gen_op4i_i32(INDEX_op_qemu_ld8u, TCGV_LOW(ret), TCGV_LOW(addr),
1744                      TCGV_HIGH(addr), mem_index);
1745     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1746 #endif
1747 }
1748
1749 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1750 {
1751 #if TARGET_LONG_BITS == 32
1752     tcg_gen_op3i_i32(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1753 #else
1754     tcg_gen_op4i_i32(INDEX_op_qemu_ld8s, TCGV_LOW(ret), TCGV_LOW(addr),
1755                      TCGV_HIGH(addr), mem_index);
1756     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1757 #endif
1758 }
1759
1760 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1761 {
1762 #if TARGET_LONG_BITS == 32
1763     tcg_gen_op3i_i32(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1764 #else
1765     tcg_gen_op4i_i32(INDEX_op_qemu_ld16u, TCGV_LOW(ret), TCGV_LOW(addr),
1766                      TCGV_HIGH(addr), mem_index);
1767     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1768 #endif
1769 }
1770
1771 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1772 {
1773 #if TARGET_LONG_BITS == 32
1774     tcg_gen_op3i_i32(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1775 #else
1776     tcg_gen_op4i_i32(INDEX_op_qemu_ld16s, TCGV_LOW(ret), TCGV_LOW(addr),
1777                      TCGV_HIGH(addr), mem_index);
1778     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1779 #endif
1780 }
1781
1782 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1783 {
1784 #if TARGET_LONG_BITS == 32
1785     tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1786 #else
1787     tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
1788                      TCGV_HIGH(addr), mem_index);
1789     tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1790 #endif
1791 }
1792
1793 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1794 {
1795 #if TARGET_LONG_BITS == 32
1796     tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1797 #else
1798     tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
1799                      TCGV_HIGH(addr), mem_index);
1800     tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1801 #endif
1802 }
1803
1804 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
1805 {
1806 #if TARGET_LONG_BITS == 32
1807     tcg_gen_op4i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret), addr, mem_index);
1808 #else
1809     tcg_gen_op5i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret),
1810                      TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
1811 #endif
1812 }
1813
1814 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1815 {
1816 #if TARGET_LONG_BITS == 32
1817     tcg_gen_op3i_i32(INDEX_op_qemu_st8, arg, addr, mem_index);
1818 #else
1819     tcg_gen_op4i_i32(INDEX_op_qemu_st8, TCGV_LOW(arg), TCGV_LOW(addr),
1820                      TCGV_HIGH(addr), mem_index);
1821 #endif
1822 }
1823
1824 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1825 {
1826 #if TARGET_LONG_BITS == 32
1827     tcg_gen_op3i_i32(INDEX_op_qemu_st16, arg, addr, mem_index);
1828 #else
1829     tcg_gen_op4i_i32(INDEX_op_qemu_st16, TCGV_LOW(arg), TCGV_LOW(addr),
1830                      TCGV_HIGH(addr), mem_index);
1831 #endif
1832 }
1833
1834 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1835 {
1836 #if TARGET_LONG_BITS == 32
1837     tcg_gen_op3i_i32(INDEX_op_qemu_st32, arg, addr, mem_index);
1838 #else
1839     tcg_gen_op4i_i32(INDEX_op_qemu_st32, TCGV_LOW(arg), TCGV_LOW(addr),
1840                      TCGV_HIGH(addr), mem_index);
1841 #endif
1842 }
1843
1844 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
1845 {
1846 #if TARGET_LONG_BITS == 32
1847     tcg_gen_op4i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg), addr,
1848                      mem_index);
1849 #else
1850     tcg_gen_op5i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg),
1851                      TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
1852 #endif
1853 }
1854
1855 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1856 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1857
1858 #else /* TCG_TARGET_REG_BITS == 32 */
1859
1860 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1861 {
1862     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1863 }
1864
1865 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1866 {
1867     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1868 }
1869
1870 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1871 {
1872     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1873 }
1874
1875 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1876 {
1877     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1878 }
1879
1880 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1881 {
1882     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1883 }
1884
1885 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1886 {
1887     tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index);
1888 }
1889
1890 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
1891 {
1892     tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_ld64, ret, addr, mem_index);
1893 }
1894
1895 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1896 {
1897     tcg_gen_qemu_ldst_op(INDEX_op_qemu_st8, arg, addr, mem_index);
1898 }
1899
1900 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1901 {
1902     tcg_gen_qemu_ldst_op(INDEX_op_qemu_st16, arg, addr, mem_index);
1903 }
1904
1905 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1906 {
1907     tcg_gen_qemu_ldst_op(INDEX_op_qemu_st32, arg, addr, mem_index);
1908 }
1909
1910 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
1911 {
1912     tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64, arg, addr, mem_index);
1913 }
1914
1915 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1916 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1917
1918 #endif /* TCG_TARGET_REG_BITS != 32 */
1919
1920 #if TARGET_LONG_BITS == 64
1921 #define TCG_TYPE_TL TCG_TYPE_I64
1922 #define tcg_gen_movi_tl tcg_gen_movi_i64
1923 #define tcg_gen_mov_tl tcg_gen_mov_i64
1924 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1925 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1926 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1927 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1928 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1929 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1930 #define tcg_gen_ld_tl tcg_gen_ld_i64
1931 #define tcg_gen_st8_tl tcg_gen_st8_i64
1932 #define tcg_gen_st16_tl tcg_gen_st16_i64
1933 #define tcg_gen_st32_tl tcg_gen_st32_i64
1934 #define tcg_gen_st_tl tcg_gen_st_i64
1935 #define tcg_gen_add_tl tcg_gen_add_i64
1936 #define tcg_gen_addi_tl tcg_gen_addi_i64
1937 #define tcg_gen_sub_tl tcg_gen_sub_i64
1938 #define tcg_gen_neg_tl tcg_gen_neg_i64
1939 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
1940 #define tcg_gen_subi_tl tcg_gen_subi_i64
1941 #define tcg_gen_and_tl tcg_gen_and_i64
1942 #define tcg_gen_andi_tl tcg_gen_andi_i64
1943 #define tcg_gen_or_tl tcg_gen_or_i64
1944 #define tcg_gen_ori_tl tcg_gen_ori_i64
1945 #define tcg_gen_xor_tl tcg_gen_xor_i64
1946 #define tcg_gen_xori_tl tcg_gen_xori_i64
1947 #define tcg_gen_not_tl tcg_gen_not_i64
1948 #define tcg_gen_shl_tl tcg_gen_shl_i64
1949 #define tcg_gen_shli_tl tcg_gen_shli_i64
1950 #define tcg_gen_shr_tl tcg_gen_shr_i64
1951 #define tcg_gen_shri_tl tcg_gen_shri_i64
1952 #define tcg_gen_sar_tl tcg_gen_sar_i64
1953 #define tcg_gen_sari_tl tcg_gen_sari_i64
1954 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1955 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1956 #define tcg_gen_mul_tl tcg_gen_mul_i64
1957 #define tcg_gen_muli_tl tcg_gen_muli_i64
1958 #define tcg_gen_discard_tl tcg_gen_discard_i64
1959 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1960 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1961 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1962 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1963 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1964 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1965 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1966 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1967 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1968 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1969 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1970 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1971 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1972 #define tcg_gen_andc_tl tcg_gen_andc_i64
1973 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
1974 #define tcg_gen_nand_tl tcg_gen_nand_i64
1975 #define tcg_gen_nor_tl tcg_gen_nor_i64
1976 #define tcg_gen_orc_tl tcg_gen_orc_i64
1977 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
1978 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
1979 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
1980 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
1981 #define tcg_const_tl tcg_const_i64
1982 #define tcg_const_local_tl tcg_const_local_i64
1983 #else
1984 #define TCG_TYPE_TL TCG_TYPE_I32
1985 #define tcg_gen_movi_tl tcg_gen_movi_i32
1986 #define tcg_gen_mov_tl tcg_gen_mov_i32
1987 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1988 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1989 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1990 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1991 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1992 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1993 #define tcg_gen_ld_tl tcg_gen_ld_i32
1994 #define tcg_gen_st8_tl tcg_gen_st8_i32
1995 #define tcg_gen_st16_tl tcg_gen_st16_i32
1996 #define tcg_gen_st32_tl tcg_gen_st_i32
1997 #define tcg_gen_st_tl tcg_gen_st_i32
1998 #define tcg_gen_add_tl tcg_gen_add_i32
1999 #define tcg_gen_addi_tl tcg_gen_addi_i32
2000 #define tcg_gen_sub_tl tcg_gen_sub_i32
2001 #define tcg_gen_neg_tl tcg_gen_neg_i32
2002 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
2003 #define tcg_gen_subi_tl tcg_gen_subi_i32
2004 #define tcg_gen_and_tl tcg_gen_and_i32
2005 #define tcg_gen_andi_tl tcg_gen_andi_i32
2006 #define tcg_gen_or_tl tcg_gen_or_i32
2007 #define tcg_gen_ori_tl tcg_gen_ori_i32
2008 #define tcg_gen_xor_tl tcg_gen_xor_i32
2009 #define tcg_gen_xori_tl tcg_gen_xori_i32
2010 #define tcg_gen_not_tl tcg_gen_not_i32
2011 #define tcg_gen_shl_tl tcg_gen_shl_i32
2012 #define tcg_gen_shli_tl tcg_gen_shli_i32
2013 #define tcg_gen_shr_tl tcg_gen_shr_i32
2014 #define tcg_gen_shri_tl tcg_gen_shri_i32
2015 #define tcg_gen_sar_tl tcg_gen_sar_i32
2016 #define tcg_gen_sari_tl tcg_gen_sari_i32
2017 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
2018 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
2019 #define tcg_gen_mul_tl tcg_gen_mul_i32
2020 #define tcg_gen_muli_tl tcg_gen_muli_i32
2021 #define tcg_gen_discard_tl tcg_gen_discard_i32
2022 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
2023 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
2024 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
2025 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
2026 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
2027 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
2028 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
2029 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
2030 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
2031 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
2032 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
2033 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
2034 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
2035 #define tcg_gen_andc_tl tcg_gen_andc_i32
2036 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
2037 #define tcg_gen_nand_tl tcg_gen_nand_i32
2038 #define tcg_gen_nor_tl tcg_gen_nor_i32
2039 #define tcg_gen_orc_tl tcg_gen_orc_i32
2040 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
2041 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
2042 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
2043 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
2044 #define tcg_const_tl tcg_const_i32
2045 #define tcg_const_local_tl tcg_const_local_i32
2046 #endif
2047
2048 #if TCG_TARGET_REG_BITS == 32
2049 #define tcg_gen_add_ptr tcg_gen_add_i32
2050 #define tcg_gen_addi_ptr tcg_gen_addi_i32
2051 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
2052 #else /* TCG_TARGET_REG_BITS == 32 */
2053 #define tcg_gen_add_ptr tcg_gen_add_i64
2054 #define tcg_gen_addi_ptr tcg_gen_addi_i64
2055 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
2056 #endif /* TCG_TARGET_REG_BITS != 32 */