2 * Luminary Micro Stellaris Ethernet Controller
4 * Copyright (c) 2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GPL.
14 //#define DEBUG_STELLARIS_ENET 1
16 #ifdef DEBUG_STELLARIS_ENET
17 #define DPRINTF(fmt, args...) \
18 do { printf("stellaris_enet: " fmt , ##args); } while (0)
19 #define BADF(fmt, args...) \
20 do { fprintf(stderr, "stellaris_enet: error: " fmt , ##args); exit(1);} while (0)
22 #define DPRINTF(fmt, args...) do {} while(0)
23 #define BADF(fmt, args...) \
24 do { fprintf(stderr, "stellaris_enet: error: " fmt , ##args);} while (0)
27 #define SE_INT_RX 0x01
28 #define SE_INT_TXER 0x02
29 #define SE_INT_TXEMP 0x04
30 #define SE_INT_FOV 0x08
31 #define SE_INT_RXER 0x10
32 #define SE_INT_MD 0x20
33 #define SE_INT_PHY 0x40
35 #define SE_RCTL_RXEN 0x01
36 #define SE_RCTL_AMUL 0x02
37 #define SE_RCTL_PRMS 0x04
38 #define SE_RCTL_BADCRC 0x08
39 #define SE_RCTL_RSTFIFO 0x10
41 #define SE_TCTL_TXEN 0x01
42 #define SE_TCTL_PADEN 0x02
43 #define SE_TCTL_CRC 0x04
44 #define SE_TCTL_DUPLEX 0x08
59 uint8_t tx_fifo
[2048];
60 /* Real hardware has a 2k fifo, which works out to be at most 31 packets.
61 We implement a full 31 packet fifo. */
72 } stellaris_enet_state
;
74 static void stellaris_enet_update(stellaris_enet_state
*s
)
76 qemu_set_irq(s
->irq
, (s
->ris
& s
->im
) != 0);
79 /* TODO: Implement MAC address filtering. */
80 static void stellaris_enet_receive(void *opaque
, const uint8_t *buf
, int size
)
82 stellaris_enet_state
*s
= (stellaris_enet_state
*)opaque
;
87 if ((s
->rctl
& SE_RCTL_RXEN
) == 0)
90 DPRINTF("Packet dropped\n");
94 DPRINTF("Received packet len=%d\n", size
);
95 n
= s
->next_packet
+ s
->np
;
100 s
->rx
[n
].len
= size
+ 6;
103 *(p
++) = (size
+ 6) >> 8;
104 memcpy (p
, buf
, size
);
106 crc
= crc32(~0, buf
, size
);
111 /* Clear the remaining bytes in the last word. */
112 if ((size
& 3) != 2) {
113 memset(p
, 0, (6 - size
) & 3);
117 stellaris_enet_update(s
);
120 static int stellaris_enet_can_receive(void *opaque
)
122 stellaris_enet_state
*s
= (stellaris_enet_state
*)opaque
;
124 if ((s
->rctl
& SE_RCTL_RXEN
) == 0)
130 static uint32_t stellaris_enet_read(void *opaque
, target_phys_addr_t offset
)
132 stellaris_enet_state
*s
= (stellaris_enet_state
*)opaque
;
137 DPRINTF("IRQ status %02x\n", s
->ris
);
141 case 0x08: /* RCTL */
143 case 0x0c: /* TCTL */
145 case 0x10: /* DATA */
146 if (s
->rx_fifo_len
== 0) {
148 BADF("RX underflow\n");
151 s
->rx_fifo_len
= s
->rx
[s
->next_packet
].len
;
152 s
->rx_fifo
= s
->rx
[s
->next_packet
].data
;
153 DPRINTF("RX FIFO start packet len=%d\n", s
->rx_fifo_len
);
155 val
= s
->rx_fifo
[0] | (s
->rx_fifo
[1] << 8) | (s
->rx_fifo
[2] << 16)
156 | (s
->rx_fifo
[3] << 24);
159 if (s
->rx_fifo_len
<= 0) {
162 if (s
->next_packet
>= 31)
165 DPRINTF("RX done np=%d\n", s
->np
);
169 return s
->macaddr
[0] | (s
->macaddr
[1] << 8)
170 | (s
->macaddr
[2] << 16) | (s
->macaddr
[3] << 24);
172 return s
->macaddr
[4] | (s
->macaddr
[5] << 8);
175 case 0x20: /* MCTL */
179 case 0x28: /* MADD */
181 case 0x2c: /* MTXD */
183 case 0x30: /* MRXD */
189 case 0x3c: /* Undocuented: Timestamp? */
192 cpu_abort (cpu_single_env
, "stellaris_enet_read: Bad offset %x\n",
198 static void stellaris_enet_write(void *opaque
, target_phys_addr_t offset
,
201 stellaris_enet_state
*s
= (stellaris_enet_state
*)opaque
;
204 case 0x00: /* IACK */
206 DPRINTF("IRQ ack %02x/%02x\n", value
, s
->ris
);
207 stellaris_enet_update(s
);
208 /* Clearing TXER also resets the TX fifo. */
209 if (value
& SE_INT_TXER
)
210 s
->tx_frame_len
= -1;
213 DPRINTF("IRQ mask %02x/%02x\n", value
, s
->ris
);
215 stellaris_enet_update(s
);
217 case 0x08: /* RCTL */
219 if (value
& SE_RCTL_RSTFIFO
) {
222 stellaris_enet_update(s
);
225 case 0x0c: /* TCTL */
228 case 0x10: /* DATA */
229 if (s
->tx_frame_len
== -1) {
230 s
->tx_frame_len
= value
& 0xffff;
231 if (s
->tx_frame_len
> 2032) {
232 DPRINTF("TX frame too long (%d)\n", s
->tx_frame_len
);
234 s
->ris
|= SE_INT_TXER
;
235 stellaris_enet_update(s
);
237 DPRINTF("Start TX frame len=%d\n", s
->tx_frame_len
);
238 /* The value written does not include the ethernet header. */
239 s
->tx_frame_len
+= 14;
240 if ((s
->tctl
& SE_TCTL_CRC
) == 0)
241 s
->tx_frame_len
+= 4;
243 s
->tx_fifo
[s
->tx_fifo_len
++] = value
>> 16;
244 s
->tx_fifo
[s
->tx_fifo_len
++] = value
>> 24;
247 s
->tx_fifo
[s
->tx_fifo_len
++] = value
;
248 s
->tx_fifo
[s
->tx_fifo_len
++] = value
>> 8;
249 s
->tx_fifo
[s
->tx_fifo_len
++] = value
>> 16;
250 s
->tx_fifo
[s
->tx_fifo_len
++] = value
>> 24;
251 if (s
->tx_fifo_len
>= s
->tx_frame_len
) {
252 /* We don't implement explicit CRC, so just chop it off. */
253 if ((s
->tctl
& SE_TCTL_CRC
) == 0)
254 s
->tx_frame_len
-= 4;
255 if ((s
->tctl
& SE_TCTL_PADEN
) && s
->tx_frame_len
< 60) {
256 memset(&s
->tx_fifo
[s
->tx_frame_len
], 0, 60 - s
->tx_frame_len
);
259 qemu_send_packet(s
->vc
, s
->tx_fifo
, s
->tx_frame_len
);
260 s
->tx_frame_len
= -1;
261 s
->ris
|= SE_INT_TXEMP
;
262 stellaris_enet_update(s
);
263 DPRINTF("Done TX\n");
268 s
->macaddr
[0] = value
;
269 s
->macaddr
[1] = value
>> 8;
270 s
->macaddr
[2] = value
>> 16;
271 s
->macaddr
[3] = value
>> 24;
274 s
->macaddr
[4] = value
;
275 s
->macaddr
[5] = value
>> 8;
280 case 0x20: /* MCTL */
286 case 0x28: /* MADD */
289 case 0x2c: /* MTXD */
290 s
->mtxd
= value
& 0xff;
292 case 0x30: /* MRXD */
296 case 0x3c: /* Undocuented: Timestamp? */
300 cpu_abort (cpu_single_env
, "stellaris_enet_write: Bad offset %x\n",
305 static CPUReadMemoryFunc
*stellaris_enet_readfn
[] = {
311 static CPUWriteMemoryFunc
*stellaris_enet_writefn
[] = {
312 stellaris_enet_write
,
313 stellaris_enet_write
,
316 static void stellaris_enet_reset(stellaris_enet_state
*s
)
319 s
->rctl
= SE_RCTL_BADCRC
;
320 s
->im
= SE_INT_PHY
| SE_INT_MD
| SE_INT_RXER
| SE_INT_FOV
| SE_INT_TXEMP
321 | SE_INT_TXER
| SE_INT_RX
;
323 s
->tx_frame_len
= -1;
326 static void stellaris_enet_save(QEMUFile
*f
, void *opaque
)
328 stellaris_enet_state
*s
= (stellaris_enet_state
*)opaque
;
331 qemu_put_be32(f
, s
->ris
);
332 qemu_put_be32(f
, s
->im
);
333 qemu_put_be32(f
, s
->rctl
);
334 qemu_put_be32(f
, s
->tctl
);
335 qemu_put_be32(f
, s
->thr
);
336 qemu_put_be32(f
, s
->mctl
);
337 qemu_put_be32(f
, s
->mdv
);
338 qemu_put_be32(f
, s
->mtxd
);
339 qemu_put_be32(f
, s
->mrxd
);
340 qemu_put_be32(f
, s
->np
);
341 qemu_put_be32(f
, s
->tx_frame_len
);
342 qemu_put_be32(f
, s
->tx_fifo_len
);
343 qemu_put_buffer(f
, s
->tx_fifo
, sizeof(s
->tx_fifo
));
344 for (i
= 0; i
< 31; i
++) {
345 qemu_put_be32(f
, s
->rx
[i
].len
);
346 qemu_put_buffer(f
, s
->rx
[i
].data
, sizeof(s
->rx
[i
].data
));
349 qemu_put_be32(f
, s
->next_packet
);
350 qemu_put_be32(f
, s
->rx_fifo
- s
->rx
[s
->next_packet
].data
);
351 qemu_put_be32(f
, s
->rx_fifo_len
);
354 static int stellaris_enet_load(QEMUFile
*f
, void *opaque
, int version_id
)
356 stellaris_enet_state
*s
= (stellaris_enet_state
*)opaque
;
362 s
->ris
= qemu_get_be32(f
);
363 s
->im
= qemu_get_be32(f
);
364 s
->rctl
= qemu_get_be32(f
);
365 s
->tctl
= qemu_get_be32(f
);
366 s
->thr
= qemu_get_be32(f
);
367 s
->mctl
= qemu_get_be32(f
);
368 s
->mdv
= qemu_get_be32(f
);
369 s
->mtxd
= qemu_get_be32(f
);
370 s
->mrxd
= qemu_get_be32(f
);
371 s
->np
= qemu_get_be32(f
);
372 s
->tx_frame_len
= qemu_get_be32(f
);
373 s
->tx_fifo_len
= qemu_get_be32(f
);
374 qemu_get_buffer(f
, s
->tx_fifo
, sizeof(s
->tx_fifo
));
375 for (i
= 0; i
< 31; i
++) {
376 s
->rx
[i
].len
= qemu_get_be32(f
);
377 qemu_get_buffer(f
, s
->rx
[i
].data
, sizeof(s
->rx
[i
].data
));
380 s
->next_packet
= qemu_get_be32(f
);
381 s
->rx_fifo
= s
->rx
[s
->next_packet
].data
+ qemu_get_be32(f
);
382 s
->rx_fifo_len
= qemu_get_be32(f
);
387 void stellaris_enet_init(NICInfo
*nd
, uint32_t base
, qemu_irq irq
)
389 stellaris_enet_state
*s
;
392 qemu_check_nic_model(nd
, "stellaris");
394 s
= (stellaris_enet_state
*)qemu_mallocz(sizeof(stellaris_enet_state
));
395 iomemtype
= cpu_register_io_memory(0, stellaris_enet_readfn
,
396 stellaris_enet_writefn
, s
);
397 cpu_register_physical_memory(base
, 0x00001000, iomemtype
);
399 memcpy(s
->macaddr
, nd
->macaddr
, 6);
402 s
->vc
= qemu_new_vlan_client(nd
->vlan
, nd
->model
, nd
->name
,
403 stellaris_enet_receive
, stellaris_enet_can_receive
, s
);
404 qemu_format_nic_info_str(s
->vc
, s
->macaddr
);
407 stellaris_enet_reset(s
);
408 register_savevm("stellaris_enet", -1, 1,
409 stellaris_enet_save
, stellaris_enet_load
, s
);