PPC405EP: fix fpga write function
[qemu/mini2440/sniper_sniper_test.git] / target-arm / exec.h
blob88f08862d66a0f508770260e644647b13c922d23
1 /*
2 * ARM execution defines
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #include "dyngen-exec.h"
23 register struct CPUARMState *env asm(AREG0);
24 register uint32_t T0 asm(AREG1);
25 register uint32_t T1 asm(AREG2);
27 #define M0 env->iwmmxt.val
29 #include "cpu.h"
30 #include "exec-all.h"
32 static inline void env_to_regs(void)
36 static inline void regs_to_env(void)
40 int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
41 int mmu_idx, int is_softmmu);
43 static inline int cpu_halted(CPUState *env) {
44 if (!env->halted)
45 return 0;
46 /* An interrupt wakes the CPU even if the I and F CPSR bits are
47 set. We use EXITTB to silently wake CPU without causing an
48 actual interrupt. */
49 if (env->interrupt_request &
50 (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)) {
51 env->halted = 0;
52 return 0;
54 return EXCP_HALTED;
57 #if !defined(CONFIG_USER_ONLY)
58 #include "softmmu_exec.h"
59 #endif
61 void raise_exception(int);