hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3 /* PC-style peripherals (also used by other machines).  */
   4
   5 /* serial.c */
   6
   7 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
   8                          CharDriverState *chr);
   9 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
  10                              qemu_irq irq, int baudbase,
  11                              CharDriverState *chr, int ioregister);
  12 uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr);
  13 void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value);
  14 uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr);
  15 void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value);
  16 uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr);
  17 void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value);
  18
  19 /* parallel.c */
  20
  21 typedef struct ParallelState ParallelState;
  22 ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
  23 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
  24
  25 /* i8259.c */
  26
  27 typedef struct PicState2 PicState2;
  28 extern PicState2 *isa_pic;
  29 void pic_set_irq(int irq, int level);
  30 void pic_set_irq_new(void *opaque, int irq, int level);
  31 qemu_irq *i8259_init(qemu_irq parent_irq);
  32 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
  33                           void *alt_irq_opaque);
  34 int pic_read_irq(PicState2 *s);
  35 void pic_update_irq(PicState2 *s);
  36 uint32_t pic_intack_read(PicState2 *s);
  37 void pic_info(void);
  38 void irq_info(void);
  39
  40 /* APIC */
  41 typedef struct IOAPICState IOAPICState;
  42
  43 int apic_init(CPUState *env);
  44 int apic_accept_pic_intr(CPUState *env);
  45 void apic_deliver_pic_intr(CPUState *env, int level);
  46 int apic_get_interrupt(CPUState *env);
  47 IOAPICState *ioapic_init(void);
  48 void ioapic_set_irq(void *opaque, int vector, int level);
  49
  50 /* i8254.c */
  51
  52 #define PIT_FREQ 1193182
  53
  54 typedef struct PITState PITState;
  55
  56 PITState *pit_init(int base, qemu_irq irq);
  57 void pit_set_gate(PITState *pit, int channel, int val);
  58 int pit_get_gate(PITState *pit, int channel);
  59 int pit_get_initial_count(PITState *pit, int channel);
  60 int pit_get_mode(PITState *pit, int channel);
  61 int pit_get_out(PITState *pit, int channel, int64_t current_time);
  62
  63 void hpet_pit_disable(void);
  64 void hpet_pit_enable(void);
  65
  66 /* vmport.c */
  67 void vmport_init(void);
  68 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  69
  70 /* vmmouse.c */
  71 void *vmmouse_init(void *m);
  72
  73 /* pckbd.c */
  74
  75 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  76 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  77                    target_phys_addr_t base, ram_addr_t size,
  78                    target_phys_addr_t mask);
  79
  80 /* mc146818rtc.c */
  81
  82 typedef struct RTCState RTCState;
  83
  84 RTCState *rtc_init(int base, qemu_irq irq);
  85 RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq);
  86 void rtc_set_memory(RTCState *s, int addr, int val);
  87 void rtc_set_date(RTCState *s, const struct tm *tm);
  88 void cmos_set_s3_resume(void);
  89
  90 /* pc.c */
  91 extern int fd_bootchk;
  92
  93 void ioport_set_a20(int enable);
  94 int ioport_get_a20(void);
  95
  96 /* acpi.c */
  97 extern int acpi_enabled;
  98 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
  99                        qemu_irq sci_irq);
 100 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 101 void acpi_bios_init(void);
 102
 103 /* hpet.c */
 104 extern int no_hpet;
 105
 106 /* pcspk.c */
 107 void pcspk_init(PITState *);
 108 int pcspk_audio_init(AudioState *, qemu_irq *pic);
 109
 110 /* piix_pci.c */
 111 PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic);
 112 void i440fx_set_smm(PCIDevice *d, int val);
 113 int piix3_init(PCIBus *bus, int devfn);
 114 void i440fx_init_memory_mappings(PCIDevice *d);
 115
 116 extern PCIDevice *piix4_dev;
 117 int piix4_init(PCIBus *bus, int devfn);
 118
 119 /* vga.c */
 120 enum vga_retrace_method {
 121     VGA_RETRACE_DUMB,
 122     VGA_RETRACE_PRECISE
 123 };
 124
 125 extern enum vga_retrace_method vga_retrace_method;
 126
 127 #ifndef TARGET_SPARC
 128 #define VGA_RAM_SIZE (8192 * 1024)
 129 #else
 130 #define VGA_RAM_SIZE (9 * 1024 * 1024)
 131 #endif
 132
 133 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
 134                  unsigned long vga_ram_offset, int vga_ram_size);
 135 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
 136                  unsigned long vga_ram_offset, int vga_ram_size,
 137                  unsigned long vga_bios_offset, int vga_bios_size);
 138 int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
 139                     unsigned long vga_ram_offset, int vga_ram_size,
 140                     target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
 141                     int it_shift);
 142
 143 /* cirrus_vga.c */
 144 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
 145                          ram_addr_t vga_ram_offset, int vga_ram_size);
 146 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
 147                          ram_addr_t vga_ram_offset, int vga_ram_size);
 148
 149 /* ide.c */
 150 void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
 151                   BlockDriverState *hd0, BlockDriverState *hd1);
 152 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
 153                          int secondary_ide_enabled);
 154 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 155                         qemu_irq *pic);
 156 void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
 157                         qemu_irq *pic);
 158
 159 /* ne2000.c */
 160
 161 void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd);
 162
 163 #endif