Add Atom (x86) cpu identification.
[qemu/mini2440/sniper_sniper_test.git] / qemu-char.h
blob05d6899f5a630490bc9913da71e0c081b99bdb1a
1 #ifndef QEMU_CHAR_H
2 #define QEMU_CHAR_H
4 /* character device */
6 #define CHR_EVENT_BREAK 0 /* serial break char */
7 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
8 #define CHR_EVENT_RESET 2 /* new connection established */
11 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
12 typedef struct {
13 int speed;
14 int parity;
15 int data_bits;
16 int stop_bits;
17 } QEMUSerialSetParams;
19 #define CHR_IOCTL_SERIAL_SET_BREAK 2
21 #define CHR_IOCTL_PP_READ_DATA 3
22 #define CHR_IOCTL_PP_WRITE_DATA 4
23 #define CHR_IOCTL_PP_READ_CONTROL 5
24 #define CHR_IOCTL_PP_WRITE_CONTROL 6
25 #define CHR_IOCTL_PP_READ_STATUS 7
26 #define CHR_IOCTL_PP_EPP_READ_ADDR 8
27 #define CHR_IOCTL_PP_EPP_READ 9
28 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
29 #define CHR_IOCTL_PP_EPP_WRITE 11
30 #define CHR_IOCTL_PP_DATA_DIR 12
32 #define CHR_IOCTL_SERIAL_SET_TIOCM 13
33 #define CHR_IOCTL_SERIAL_GET_TIOCM 14
35 #define CHR_TIOCM_CTS 0x020
36 #define CHR_TIOCM_CAR 0x040
37 #define CHR_TIOCM_DSR 0x100
38 #define CHR_TIOCM_RI 0x080
39 #define CHR_TIOCM_DTR 0x002
40 #define CHR_TIOCM_RTS 0x004
42 typedef void IOEventHandler(void *opaque, int event);
44 struct CharDriverState {
45 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
46 void (*chr_update_read_handler)(struct CharDriverState *s);
47 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
48 IOEventHandler *chr_event;
49 IOCanRWHandler *chr_can_read;
50 IOReadHandler *chr_read;
51 void *handler_opaque;
52 void (*chr_send_event)(struct CharDriverState *chr, int event);
53 void (*chr_close)(struct CharDriverState *chr);
54 void (*chr_accept_input)(struct CharDriverState *chr);
55 void *opaque;
56 int focus;
57 QEMUBH *bh;
60 CharDriverState *qemu_chr_open(const char *filename);
61 void qemu_chr_close(CharDriverState *chr);
62 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
63 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
64 void qemu_chr_send_event(CharDriverState *s, int event);
65 void qemu_chr_add_handlers(CharDriverState *s,
66 IOCanRWHandler *fd_can_read,
67 IOReadHandler *fd_read,
68 IOEventHandler *fd_event,
69 void *opaque);
70 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
71 void qemu_chr_reset(CharDriverState *s);
72 int qemu_chr_can_read(CharDriverState *s);
73 void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
74 void qemu_chr_accept_input(CharDriverState *s);
76 /* async I/O support */
78 int qemu_set_fd_handler2(int fd,
79 IOCanRWHandler *fd_read_poll,
80 IOHandler *fd_read,
81 IOHandler *fd_write,
82 void *opaque);
83 int qemu_set_fd_handler(int fd,
84 IOHandler *fd_read,
85 IOHandler *fd_write,
86 void *opaque);
88 #endif