hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  33
  34 #define KERNEL_LOAD_ADDR     0x00100000
  35 #define INITRD_LOAD_ADDR     0x00400000
  36 #define KERNEL_PARAMS_ADDR   0x00090000
  37 #define KERNEL_CMDLINE_ADDR  0x00099000
  38
  39 int speaker_data_on;
  40 int dummy_refresh_clock;
  41 static fdctrl_t *floppy_controller;
  42 static RTCState *rtc_state;
  43 static PITState *pit;
  44 static IOAPICState *ioapic;
  45 static USBPort *usb_root_ports[2];
  46
  47 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  48 {
  49 }
  50
  51 /* MSDOS compatibility mode FPU exception support */
  52 /* XXX: add IGNNE support */
  53 void cpu_set_ferr(CPUX86State *s)
  54 {
  55     pic_set_irq(13, 1);
  56 }
  57
  58 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  59 {
  60     pic_set_irq(13, 0);
  61 }
  62
  63 /* TSC handling */
  64
  65 uint64_t cpu_get_tsc(CPUX86State *env)
  66 {
  67     return qemu_get_clock(vm_clock);
  68 }
  69
  70 /* IRQ handling */
  71 int cpu_get_pic_interrupt(CPUState *env)
  72 {
  73     int intno;
  74
  75     intno = apic_get_interrupt(env);
  76     if (intno >= 0) {
  77         /* set irq request if a PIC irq is still pending */
  78         /* XXX: improve that */
  79         pic_update_irq(isa_pic);
  80         return intno;
  81     }
  82     /* read the irq from the PIC */
  83     intno = pic_read_irq(isa_pic);
  84     return intno;
  85 }
  86
  87 static void pic_irq_request(void *opaque, int level)
  88 {
  89     CPUState *env = opaque;
  90     if (level)
  91         cpu_interrupt(env, CPU_INTERRUPT_HARD);
  92     else
  93         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
  94 }
  95
  96 /* PC cmos mappings */
  97
  98 #define REG_EQUIPMENT_BYTE          0x14
  99 #define REG_IBM_CENTURY_BYTE        0x32
 100 #define REG_IBM_PS2_CENTURY_BYTE    0x37
 101
 102
 103 static inline int to_bcd(RTCState *s, int a)
 104 {
 105     return ((a / 10) << 4) | (a % 10);
 106 }
 107
 108 static int cmos_get_fd_drive_type(int fd0)
 109 {
 110     int val;
 111
 112     switch (fd0) {
 113     case 0:
 114         /* 1.44 Mb 3"5 drive */
 115         val = 4;
 116         break;
 117     case 1:
 118         /* 2.88 Mb 3"5 drive */
 119         val = 5;
 120         break;
 121     case 2:
 122         /* 1.2 Mb 5"5 drive */
 123         val = 2;
 124         break;
 125     default:
 126         val = 0;
 127         break;
 128     }
 129     return val;
 130 }
 131
 132 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 133 {
 134     RTCState *s = rtc_state;
 135     int cylinders, heads, sectors;
 136     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 137     rtc_set_memory(s, type_ofs, 47);
 138     rtc_set_memory(s, info_ofs, cylinders);
 139     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 140     rtc_set_memory(s, info_ofs + 2, heads);
 141     rtc_set_memory(s, info_ofs + 3, 0xff);
 142     rtc_set_memory(s, info_ofs + 4, 0xff);
 143     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 144     rtc_set_memory(s, info_ofs + 6, cylinders);
 145     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 146     rtc_set_memory(s, info_ofs + 8, sectors);
 147 }
 148
 149 /* hd_table must contain 4 block drivers */
 150 static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
 151 {
 152     RTCState *s = rtc_state;
 153     int val;
 154     int fd0, fd1, nb;
 155     time_t ti;
 156     struct tm *tm;
 157     int i;
 158
 159     /* set the CMOS date */
 160     time(&ti);
 161     if (rtc_utc)
 162         tm = gmtime(&ti);
 163     else
 164         tm = localtime(&ti);
 165     rtc_set_date(s, tm);
 166
 167     val = to_bcd(s, (tm->tm_year / 100) + 19);
 168     rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
 169     rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
 170
 171     /* various important CMOS locations needed by PC/Bochs bios */
 172
 173     /* memory size */
 174     val = 640; /* base memory in K */
 175     rtc_set_memory(s, 0x15, val);
 176     rtc_set_memory(s, 0x16, val >> 8);
 177
 178     val = (ram_size / 1024) - 1024;
 179     if (val > 65535)
 180         val = 65535;
 181     rtc_set_memory(s, 0x17, val);
 182     rtc_set_memory(s, 0x18, val >> 8);
 183     rtc_set_memory(s, 0x30, val);
 184     rtc_set_memory(s, 0x31, val >> 8);
 185
 186     if (ram_size > (16 * 1024 * 1024))
 187         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 188     else
 189         val = 0;
 190     if (val > 65535)
 191         val = 65535;
 192     rtc_set_memory(s, 0x34, val);
 193     rtc_set_memory(s, 0x35, val >> 8);
 194
 195     switch(boot_device) {
 196     case 'a':
 197     case 'b':
 198         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 199         break;
 200     default:
 201     case 'c':
 202         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 203         break;
 204     case 'd':
 205         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 206         break;
 207     }
 208
 209     /* floppy type */
 210
 211     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 212     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 213
 214     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 215     rtc_set_memory(s, 0x10, val);
 216
 217     val = 0;
 218     nb = 0;
 219     if (fd0 < 3)
 220         nb++;
 221     if (fd1 < 3)
 222         nb++;
 223     switch (nb) {
 224     case 0:
 225         break;
 226     case 1:
 227         val |= 0x01; /* 1 drive, ready for boot */
 228         break;
 229     case 2:
 230         val |= 0x41; /* 2 drives, ready for boot */
 231         break;
 232     }
 233     val |= 0x02; /* FPU is there */
 234     val |= 0x04; /* PS/2 mouse installed */
 235     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 236
 237     /* hard drives */
 238
 239     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 240     if (hd_table[0])
 241         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 242     if (hd_table[1])
 243         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 244
 245     val = 0;
 246     for (i = 0; i < 4; i++) {
 247         if (hd_table[i]) {
 248             int cylinders, heads, sectors, translation;
 249             /* NOTE: bdrv_get_geometry_hint() returns the physical
 250                 geometry.  It is always such that: 1 <= sects <= 63, 1
 251                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 252                 geometry can be different if a translation is done. */
 253             translation = bdrv_get_translation_hint(hd_table[i]);
 254             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 255                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 256                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 257                     /* No translation. */
 258                     translation = 0;
 259                 } else {
 260                     /* LBA translation. */
 261                     translation = 1;
 262                 }
 263             } else {
 264                 translation--;
 265             }
 266             val |= translation << (i * 2);
 267         }
 268     }
 269     rtc_set_memory(s, 0x39, val);
 270
 271     /* Disable check of 0x55AA signature on the last two bytes of
 272        first sector of disk. XXX: make it the default ? */
 273     //    rtc_set_memory(s, 0x38, 1);
 274 }
 275
 276 static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 277 {
 278     speaker_data_on = (val >> 1) & 1;
 279     pit_set_gate(pit, 2, val & 1);
 280 }
 281
 282 static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
 283 {
 284     int out;
 285     out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
 286     dummy_refresh_clock ^= 1;
 287     return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
 288       (dummy_refresh_clock << 4);
 289 }
 290
 291 void ioport_set_a20(int enable)
 292 {
 293     /* XXX: send to all CPUs ? */
 294     cpu_x86_set_a20(first_cpu, enable);
 295 }
 296
 297 int ioport_get_a20(void)
 298 {
 299     return ((first_cpu->a20_mask >> 20) & 1);
 300 }
 301
 302 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 303 {
 304     ioport_set_a20((val >> 1) & 1);
 305     /* XXX: bit 0 is fast reset */
 306 }
 307
 308 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 309 {
 310     return ioport_get_a20() << 1;
 311 }
 312
 313 /***********************************************************/
 314 /* Bochs BIOS debug ports */
 315
 316 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 317 {
 318     static const char shutdown_str[8] = "Shutdown";
 319     static int shutdown_index = 0;
 320
 321     switch(addr) {
 322         /* Bochs BIOS messages */
 323     case 0x400:
 324     case 0x401:
 325         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 326         exit(1);
 327     case 0x402:
 328     case 0x403:
 329 #ifdef DEBUG_BIOS
 330         fprintf(stderr, "%c", val);
 331 #endif
 332         break;
 333     case 0x8900:
 334         /* same as Bochs power off */
 335         if (val == shutdown_str[shutdown_index]) {
 336             shutdown_index++;
 337             if (shutdown_index == 8) {
 338                 shutdown_index = 0;
 339                 qemu_system_shutdown_request();
 340             }
 341         } else {
 342             shutdown_index = 0;
 343         }
 344         break;
 345
 346         /* LGPL'ed VGA BIOS messages */
 347     case 0x501:
 348     case 0x502:
 349         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 350         exit(1);
 351     case 0x500:
 352     case 0x503:
 353 #ifdef DEBUG_BIOS
 354         fprintf(stderr, "%c", val);
 355 #endif
 356         break;
 357     }
 358 }
 359
 360 void bochs_bios_init(void)
 361 {
 362     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 363     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 364     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 365     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 366     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 367
 368     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 369     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 370     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 371     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 372 }
 373
 374
 375 int load_kernel(const char *filename, uint8_t *addr,
 376                 uint8_t *real_addr)
 377 {
 378     int fd, size;
 379     int setup_sects;
 380
 381     fd = open(filename, O_RDONLY | O_BINARY);
 382     if (fd < 0)
 383         return -1;
 384
 385     /* load 16 bit code */
 386     if (read(fd, real_addr, 512) != 512)
 387         goto fail;
 388     setup_sects = real_addr[0x1F1];
 389     if (!setup_sects)
 390         setup_sects = 4;
 391     if (read(fd, real_addr + 512, setup_sects * 512) !=
 392         setup_sects * 512)
 393         goto fail;
 394
 395     /* load 32 bit code */
 396     size = read(fd, addr, 16 * 1024 * 1024);
 397     if (size < 0)
 398         goto fail;
 399     close(fd);
 400     return size;
 401  fail:
 402     close(fd);
 403     return -1;
 404 }
 405
 406 static void main_cpu_reset(void *opaque)
 407 {
 408     CPUState *env = opaque;
 409     cpu_reset(env);
 410 }
 411
 412 /*************************************************/
 413
 414 static void putb(uint8_t **pp, int val)
 415 {
 416     uint8_t *q;
 417     q = *pp;
 418     *q++ = val;
 419     *pp = q;
 420 }
 421
 422 static void putstr(uint8_t **pp, const char *str)
 423 {
 424     uint8_t *q;
 425     q = *pp;
 426     while (*str)
 427         *q++ = *str++;
 428     *pp = q;
 429 }
 430
 431 static void putle16(uint8_t **pp, int val)
 432 {
 433     uint8_t *q;
 434     q = *pp;
 435     *q++ = val;
 436     *q++ = val >> 8;
 437     *pp = q;
 438 }
 439
 440 static void putle32(uint8_t **pp, int val)
 441 {
 442     uint8_t *q;
 443     q = *pp;
 444     *q++ = val;
 445     *q++ = val >> 8;
 446     *q++ = val >> 16;
 447     *q++ = val >> 24;
 448     *pp = q;
 449 }
 450
 451 static int mpf_checksum(const uint8_t *data, int len)
 452 {
 453     int sum, i;
 454     sum = 0;
 455     for(i = 0; i < len; i++)
 456         sum += data[i];
 457     return sum & 0xff;
 458 }
 459
 460 /* Build the Multi Processor table in the BIOS. Same values as Bochs. */
 461 static void bios_add_mptable(uint8_t *bios_data)
 462 {
 463     uint8_t *mp_config_table, *q, *float_pointer_struct;
 464     int ioapic_id, offset, i, len;
 465
 466     if (smp_cpus <= 1)
 467         return;
 468
 469     mp_config_table = bios_data + 0xb000;
 470     q = mp_config_table;
 471     putstr(&q, "PCMP"); /* "PCMP signature */
 472     putle16(&q, 0); /* table length (patched later) */
 473     putb(&q, 4); /* spec rev */
 474     putb(&q, 0); /* checksum (patched later) */
 475     putstr(&q, "QEMUCPU "); /* OEM id */
 476     putstr(&q, "0.1         "); /* vendor id */
 477     putle32(&q, 0); /* OEM table ptr */
 478     putle16(&q, 0); /* OEM table size */
 479     putle16(&q, 20); /* entry count */
 480     putle32(&q, 0xfee00000); /* local APIC addr */
 481     putle16(&q, 0); /* ext table length */
 482     putb(&q, 0); /* ext table checksum */
 483     putb(&q, 0); /* reserved */
 484
 485     for(i = 0; i < smp_cpus; i++) {
 486         putb(&q, 0); /* entry type = processor */
 487         putb(&q, i); /* APIC id */
 488         putb(&q, 0x11); /* local APIC version number */
 489         if (i == 0)
 490             putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
 491         else
 492             putb(&q, 1); /* cpu flags: enabled */
 493         putb(&q, 0); /* cpu signature */
 494         putb(&q, 6);
 495         putb(&q, 0);
 496         putb(&q, 0);
 497         putle16(&q, 0x201); /* feature flags */
 498         putle16(&q, 0);
 499
 500         putle16(&q, 0); /* reserved */
 501         putle16(&q, 0);
 502         putle16(&q, 0);
 503         putle16(&q, 0);
 504     }
 505
 506     /* isa bus */
 507     putb(&q, 1); /* entry type = bus */
 508     putb(&q, 0); /* bus ID */
 509     putstr(&q, "ISA   ");
 510
 511     /* ioapic */
 512     ioapic_id = smp_cpus;
 513     putb(&q, 2); /* entry type = I/O APIC */
 514     putb(&q, ioapic_id); /* apic ID */
 515     putb(&q, 0x11); /* I/O APIC version number */
 516     putb(&q, 1); /* enable */
 517     putle32(&q, 0xfec00000); /* I/O APIC addr */
 518
 519     /* irqs */
 520     for(i = 0; i < 16; i++) {
 521         putb(&q, 3); /* entry type = I/O interrupt */
 522         putb(&q, 0); /* interrupt type = vectored interrupt */
 523         putb(&q, 0); /* flags: po=0, el=0 */
 524         putb(&q, 0);
 525         putb(&q, 0); /* source bus ID = ISA */
 526         putb(&q, i); /* source bus IRQ */
 527         putb(&q, ioapic_id); /* dest I/O APIC ID */
 528         putb(&q, i); /* dest I/O APIC interrupt in */
 529     }
 530     /* patch length */
 531     len = q - mp_config_table;
 532     mp_config_table[4] = len;
 533     mp_config_table[5] = len >> 8;
 534
 535     mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
 536
 537     /* align to 16 */
 538     offset = q - bios_data;
 539     offset = (offset + 15) & ~15;
 540     float_pointer_struct = bios_data + offset;
 541
 542     /* floating pointer structure */
 543     q = float_pointer_struct;
 544     putstr(&q, "_MP_");
 545     /* pointer to MP config table */
 546     putle32(&q, mp_config_table - bios_data + 0x000f0000);
 547
 548     putb(&q, 1); /* length in 16 byte units */
 549     putb(&q, 4); /* MP spec revision */
 550     putb(&q, 0); /* checksum (patched later) */
 551     putb(&q, 0); /* MP feature byte 1 */
 552
 553     putb(&q, 0);
 554     putb(&q, 0);
 555     putb(&q, 0);
 556     putb(&q, 0);
 557     float_pointer_struct[10] =
 558         -mpf_checksum(float_pointer_struct, q - float_pointer_struct);
 559 }
 560
 561
 562 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 563 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 564 static const int ide_irq[2] = { 14, 15 };
 565
 566 #define NE2000_NB_MAX 6
 567
 568 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 569 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 570
 571 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 572 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 573
 574 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 575 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 576
 577 #ifdef HAS_AUDIO
 578 static void audio_init (PCIBus *pci_bus)
 579 {
 580     struct soundhw *c;
 581     int audio_enabled = 0;
 582
 583     for (c = soundhw; !audio_enabled && c->name; ++c) {
 584         audio_enabled = c->enabled;
 585     }
 586
 587     if (audio_enabled) {
 588         AudioState *s;
 589
 590         s = AUD_init ();
 591         if (s) {
 592             for (c = soundhw; c->name; ++c) {
 593                 if (c->enabled) {
 594                     if (c->isa) {
 595                         c->init.init_isa (s);
 596                     }
 597                     else {
 598                         if (pci_bus) {
 599                             c->init.init_pci (pci_bus, s);
 600                         }
 601                     }
 602                 }
 603             }
 604         }
 605     }
 606 }
 607 #endif
 608
 609 static void pc_init_ne2k_isa(NICInfo *nd)
 610 {
 611     static int nb_ne2k = 0;
 612
 613     if (nb_ne2k == NE2000_NB_MAX)
 614         return;
 615     isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
 616     nb_ne2k++;
 617 }
 618
 619 /* PC hardware initialisation */
 620 static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
 621                      DisplayState *ds, const char **fd_filename, int snapshot,
 622                      const char *kernel_filename, const char *kernel_cmdline,
 623                      const char *initrd_filename,
 624                      int pci_enabled)
 625 {
 626     char buf[1024];
 627     int ret, linux_boot, initrd_size, i;
 628     unsigned long bios_offset, vga_bios_offset;
 629     int bios_size, isa_bios_size;
 630     PCIBus *pci_bus;
 631     CPUState *env;
 632     NICInfo *nd;
 633
 634     linux_boot = (kernel_filename != NULL);
 635
 636     /* init CPUs */
 637     for(i = 0; i < smp_cpus; i++) {
 638         env = cpu_init();
 639         if (i != 0)
 640             env->hflags |= HF_HALTED_MASK;
 641         if (smp_cpus > 1) {
 642             /* XXX: enable it in all cases */
 643             env->cpuid_features |= CPUID_APIC;
 644         }
 645         register_savevm("cpu", i, 3, cpu_save, cpu_load, env);
 646         qemu_register_reset(main_cpu_reset, env);
 647         if (pci_enabled) {
 648             apic_init(env);
 649         }
 650     }
 651
 652     /* allocate RAM */
 653     cpu_register_physical_memory(0, ram_size, 0);
 654
 655     /* BIOS load */
 656     bios_offset = ram_size + vga_ram_size;
 657     vga_bios_offset = bios_offset + 256 * 1024;
 658
 659     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 660     bios_size = get_image_size(buf);
 661     if (bios_size <= 0 ||
 662         (bios_size % 65536) != 0 ||
 663         bios_size > (256 * 1024)) {
 664         goto bios_error;
 665     }
 666     ret = load_image(buf, phys_ram_base + bios_offset);
 667     if (ret != bios_size) {
 668     bios_error:
 669         fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
 670         exit(1);
 671     }
 672     if (bios_size == 65536) {
 673         bios_add_mptable(phys_ram_base + bios_offset);
 674     }
 675
 676     /* VGA BIOS load */
 677     if (cirrus_vga_enabled) {
 678         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 679     } else {
 680         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 681     }
 682     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 683
 684     /* setup basic memory access */
 685     cpu_register_physical_memory(0xc0000, 0x10000,
 686                                  vga_bios_offset | IO_MEM_ROM);
 687
 688     /* map the last 128KB of the BIOS in ISA space */
 689     isa_bios_size = bios_size;
 690     if (isa_bios_size > (128 * 1024))
 691         isa_bios_size = 128 * 1024;
 692     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 693                                  IO_MEM_UNASSIGNED);
 694     cpu_register_physical_memory(0x100000 - isa_bios_size,
 695                                  isa_bios_size,
 696                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 697     /* map all the bios at the top of memory */
 698     cpu_register_physical_memory((uint32_t)(-bios_size),
 699                                  bios_size, bios_offset | IO_MEM_ROM);
 700
 701     bochs_bios_init();
 702
 703     if (linux_boot) {
 704         uint8_t bootsect[512];
 705         uint8_t old_bootsect[512];
 706
 707         if (bs_table[0] == NULL) {
 708             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 709             exit(1);
 710         }
 711         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 712         ret = load_image(buf, bootsect);
 713         if (ret != sizeof(bootsect)) {
 714             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 715                     buf);
 716             exit(1);
 717         }
 718
 719         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 720             /* copy the MSDOS partition table */
 721             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 722         }
 723
 724         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 725
 726         /* now we can load the kernel */
 727         ret = load_kernel(kernel_filename,
 728                           phys_ram_base + KERNEL_LOAD_ADDR,
 729                           phys_ram_base + KERNEL_PARAMS_ADDR);
 730         if (ret < 0) {
 731             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 732                     kernel_filename);
 733             exit(1);
 734         }
 735
 736         /* load initrd */
 737         initrd_size = 0;
 738         if (initrd_filename) {
 739             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 740             if (initrd_size < 0) {
 741                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 742                         initrd_filename);
 743                 exit(1);
 744             }
 745         }
 746         if (initrd_size > 0) {
 747             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 748             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 749         }
 750         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 751                 kernel_cmdline);
 752         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 753         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 754                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 755         /* loader type */
 756         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 757     }
 758
 759     if (pci_enabled) {
 760         pci_bus = i440fx_init();
 761         piix3_init(pci_bus);
 762     } else {
 763         pci_bus = NULL;
 764     }
 765
 766     /* init basic PC hardware */
 767     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 768
 769     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 770
 771     if (cirrus_vga_enabled) {
 772         if (pci_enabled) {
 773             pci_cirrus_vga_init(pci_bus,
 774                                 ds, phys_ram_base + ram_size, ram_size,
 775                                 vga_ram_size);
 776         } else {
 777             isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
 778                                 vga_ram_size);
 779         }
 780     } else {
 781         vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
 782                        vga_ram_size, 0, 0);
 783     }
 784
 785     rtc_state = rtc_init(0x70, 8);
 786     register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
 787     register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
 788
 789     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 790     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 791
 792     if (pci_enabled) {
 793         ioapic = ioapic_init();
 794     }
 795     isa_pic = pic_init(pic_irq_request, first_cpu);
 796     pit = pit_init(0x40, 0);
 797     if (pci_enabled) {
 798         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 799     }
 800
 801     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 802         if (serial_hds[i]) {
 803             serial_init(&pic_set_irq_new, isa_pic,
 804                         serial_io[i], serial_irq[i], serial_hds[i]);
 805         }
 806     }
 807
 808     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 809         if (parallel_hds[i]) {
 810             parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
 811         }
 812     }
 813
 814     for(i = 0; i < nb_nics; i++) {
 815         nd = &nd_table[i];
 816         if (!nd->model) {
 817             if (pci_enabled) {
 818                 nd->model = "ne2k_pci";
 819             } else {
 820                 nd->model = "ne2k_isa";
 821             }
 822         }
 823         if (strcmp(nd->model, "ne2k_isa") == 0) {
 824             pc_init_ne2k_isa(nd);
 825         } else if (pci_enabled) {
 826             pci_nic_init(pci_bus, nd);
 827         } else {
 828             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 829             exit(1);
 830         }
 831     }
 832
 833     if (pci_enabled) {
 834         pci_piix3_ide_init(pci_bus, bs_table);
 835     } else {
 836         for(i = 0; i < 2; i++) {
 837             isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 838                          bs_table[2 * i], bs_table[2 * i + 1]);
 839         }
 840     }
 841
 842     kbd_init();
 843     DMA_init(0);
 844 #ifdef HAS_AUDIO
 845     audio_init(pci_enabled ? pci_bus : NULL);
 846 #endif
 847
 848     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 849
 850     cmos_init(ram_size, boot_device, bs_table);
 851
 852     if (pci_enabled && usb_enabled) {
 853         usb_uhci_init(pci_bus, usb_root_ports);
 854         usb_attach(usb_root_ports[0], vm_usb_hub);
 855     }
 856
 857     /* must be done after all PCI devices are instanciated */
 858     /* XXX: should be done in the Bochs BIOS */
 859     if (pci_enabled) {
 860         pci_bios_init();
 861     }
 862 }
 863
 864 static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
 865                         DisplayState *ds, const char **fd_filename,
 866                         int snapshot,
 867                         const char *kernel_filename,
 868                         const char *kernel_cmdline,
 869                         const char *initrd_filename)
 870 {
 871     pc_init1(ram_size, vga_ram_size, boot_device,
 872              ds, fd_filename, snapshot,
 873              kernel_filename, kernel_cmdline,
 874              initrd_filename, 1);
 875 }
 876
 877 static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
 878                         DisplayState *ds, const char **fd_filename,
 879                         int snapshot,
 880                         const char *kernel_filename,
 881                         const char *kernel_cmdline,
 882                         const char *initrd_filename)
 883 {
 884     pc_init1(ram_size, vga_ram_size, boot_device,
 885              ds, fd_filename, snapshot,
 886              kernel_filename, kernel_cmdline,
 887              initrd_filename, 0);
 888 }
 889
 890 QEMUMachine pc_machine = {
 891     "pc",
 892     "Standard PC",
 893     pc_init_pci,
 894 };
 895
 896 QEMUMachine isapc_machine = {
 897     "isapc",
 898     "ISA-only PC",
 899     pc_init_isa,
 900 };