tcg/i386/tcg-target.c

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
  25     "%eax",
  26     "%ecx",
  27     "%edx",
  28     "%ebx",
  29     "%esp",
  30     "%ebp",
  31     "%esi",
  32     "%edi",
  33 };
  34
  35 int tcg_target_reg_alloc_order[] = {
  36     TCG_REG_EAX,
  37     TCG_REG_EDX,
  38     TCG_REG_ECX,
  39     TCG_REG_EBX,
  40     TCG_REG_ESI,
  41     TCG_REG_EDI,
  42     TCG_REG_EBP,
  43 };
  44
  45 const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX };
  46 const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX };
  47
  48 static uint8_t *tb_ret_addr;
  49
  50 static void patch_reloc(uint8_t *code_ptr, int type,
  51                         tcg_target_long value, tcg_target_long addend)
  52 {
  53     value += addend;
  54     switch(type) {
  55     case R_386_32:
  56         *(uint32_t *)code_ptr = value;
  57         break;
  58     case R_386_PC32:
  59         *(uint32_t *)code_ptr = value - (long)code_ptr;
  60         break;
  61     default:
  62         tcg_abort();
  63     }
  64 }
  65
  66 /* maximum number of register used for input function arguments */
  67 static inline int tcg_target_get_call_iarg_regs_count(int flags)
  68 {
  69     flags &= TCG_CALL_TYPE_MASK;
  70     switch(flags) {
  71     case TCG_CALL_TYPE_STD:
  72         return 0;
  73     case TCG_CALL_TYPE_REGPARM_1:
  74     case TCG_CALL_TYPE_REGPARM_2:
  75     case TCG_CALL_TYPE_REGPARM:
  76         return flags - TCG_CALL_TYPE_REGPARM_1 + 1;
  77     default:
  78         tcg_abort();
  79     }
  80 }
  81
  82 /* parse target specific constraints */
  83 int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
  84 {
  85     const char *ct_str;
  86
  87     ct_str = *pct_str;
  88     switch(ct_str[0]) {
  89     case 'a':
  90         ct->ct |= TCG_CT_REG;
  91         tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX);
  92         break;
  93     case 'b':
  94         ct->ct |= TCG_CT_REG;
  95         tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX);
  96         break;
  97     case 'c':
  98         ct->ct |= TCG_CT_REG;
  99         tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX);
 100         break;
 101     case 'd':
 102         ct->ct |= TCG_CT_REG;
 103         tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX);
 104         break;
 105     case 'S':
 106         ct->ct |= TCG_CT_REG;
 107         tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI);
 108         break;
 109     case 'D':
 110         ct->ct |= TCG_CT_REG;
 111         tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI);
 112         break;
 113     case 'q':
 114         ct->ct |= TCG_CT_REG;
 115         tcg_regset_set32(ct->u.regs, 0, 0xf);
 116         break;
 117     case 'r':
 118         ct->ct |= TCG_CT_REG;
 119         tcg_regset_set32(ct->u.regs, 0, 0xff);
 120         break;
 121
 122         /* qemu_ld/st address constraint */
 123     case 'L':
 124         ct->ct |= TCG_CT_REG;
 125         tcg_regset_set32(ct->u.regs, 0, 0xff);
 126         tcg_regset_reset_reg(ct->u.regs, TCG_REG_EAX);
 127         tcg_regset_reset_reg(ct->u.regs, TCG_REG_EDX);
 128         break;
 129     default:
 130         return -1;
 131     }
 132     ct_str++;
 133     *pct_str = ct_str;
 134     return 0;
 135 }
 136
 137 /* test if a constant matches the constraint */
 138 static inline int tcg_target_const_match(tcg_target_long val,
 139                                          const TCGArgConstraint *arg_ct)
 140 {
 141     int ct;
 142     ct = arg_ct->ct;
 143     if (ct & TCG_CT_CONST)
 144         return 1;
 145     else
 146         return 0;
 147 }
 148
 149 #define ARITH_ADD 0
 150 #define ARITH_OR  1
 151 #define ARITH_ADC 2
 152 #define ARITH_SBB 3
 153 #define ARITH_AND 4
 154 #define ARITH_SUB 5
 155 #define ARITH_XOR 6
 156 #define ARITH_CMP 7
 157
 158 #define SHIFT_SHL 4
 159 #define SHIFT_SHR 5
 160 #define SHIFT_SAR 7
 161
 162 #define JCC_JMP (-1)
 163 #define JCC_JO  0x0
 164 #define JCC_JNO 0x1
 165 #define JCC_JB  0x2
 166 #define JCC_JAE 0x3
 167 #define JCC_JE  0x4
 168 #define JCC_JNE 0x5
 169 #define JCC_JBE 0x6
 170 #define JCC_JA  0x7
 171 #define JCC_JS  0x8
 172 #define JCC_JNS 0x9
 173 #define JCC_JP  0xa
 174 #define JCC_JNP 0xb
 175 #define JCC_JL  0xc
 176 #define JCC_JGE 0xd
 177 #define JCC_JLE 0xe
 178 #define JCC_JG  0xf
 179
 180 #define P_EXT   0x100 /* 0x0f opcode prefix */
 181
 182 static const uint8_t tcg_cond_to_jcc[10] = {
 183     [TCG_COND_EQ] = JCC_JE,
 184     [TCG_COND_NE] = JCC_JNE,
 185     [TCG_COND_LT] = JCC_JL,
 186     [TCG_COND_GE] = JCC_JGE,
 187     [TCG_COND_LE] = JCC_JLE,
 188     [TCG_COND_GT] = JCC_JG,
 189     [TCG_COND_LTU] = JCC_JB,
 190     [TCG_COND_GEU] = JCC_JAE,
 191     [TCG_COND_LEU] = JCC_JBE,
 192     [TCG_COND_GTU] = JCC_JA,
 193 };
 194
 195 static inline void tcg_out_opc(TCGContext *s, int opc)
 196 {
 197     if (opc & P_EXT)
 198         tcg_out8(s, 0x0f);
 199     tcg_out8(s, opc);
 200 }
 201
 202 static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm)
 203 {
 204     tcg_out_opc(s, opc);
 205     tcg_out8(s, 0xc0 | (r << 3) | rm);
 206 }
 207
 208 /* rm == -1 means no register index */
 209 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm,
 210                                         int32_t offset)
 211 {
 212     tcg_out_opc(s, opc);
 213     if (rm == -1) {
 214         tcg_out8(s, 0x05 | (r << 3));
 215         tcg_out32(s, offset);
 216     } else if (offset == 0 && rm != TCG_REG_EBP) {
 217         if (rm == TCG_REG_ESP) {
 218             tcg_out8(s, 0x04 | (r << 3));
 219             tcg_out8(s, 0x24);
 220         } else {
 221             tcg_out8(s, 0x00 | (r << 3) | rm);
 222         }
 223     } else if ((int8_t)offset == offset) {
 224         if (rm == TCG_REG_ESP) {
 225             tcg_out8(s, 0x44 | (r << 3));
 226             tcg_out8(s, 0x24);
 227         } else {
 228             tcg_out8(s, 0x40 | (r << 3) | rm);
 229         }
 230         tcg_out8(s, offset);
 231     } else {
 232         if (rm == TCG_REG_ESP) {
 233             tcg_out8(s, 0x84 | (r << 3));
 234             tcg_out8(s, 0x24);
 235         } else {
 236             tcg_out8(s, 0x80 | (r << 3) | rm);
 237         }
 238         tcg_out32(s, offset);
 239     }
 240 }
 241
 242 static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
 243 {
 244     if (arg != ret)
 245         tcg_out_modrm(s, 0x8b, ret, arg);
 246 }
 247
 248 static inline void tcg_out_movi(TCGContext *s, TCGType type,
 249                                 int ret, int32_t arg)
 250 {
 251     if (arg == 0) {
 252         /* xor r0,r0 */
 253         tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret);
 254     } else {
 255         tcg_out8(s, 0xb8 + ret);
 256         tcg_out32(s, arg);
 257     }
 258 }
 259
 260 static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
 261                               int arg1, tcg_target_long arg2)
 262 {
 263     /* movl */
 264     tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2);
 265 }
 266
 267 static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
 268                               int arg1, tcg_target_long arg2)
 269 {
 270     /* movl */
 271     tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2);
 272 }
 273
 274 static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val)
 275 {
 276     if (val == (int8_t)val) {
 277         tcg_out_modrm(s, 0x83, c, r0);
 278         tcg_out8(s, val);
 279     } else {
 280         tcg_out_modrm(s, 0x81, c, r0);
 281         tcg_out32(s, val);
 282     }
 283 }
 284
 285 void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
 286 {
 287     if (val != 0)
 288         tgen_arithi(s, ARITH_ADD, reg, val);
 289 }
 290
 291 static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
 292 {
 293     int32_t val, val1;
 294     TCGLabel *l = &s->labels[label_index];
 295
 296     if (l->has_value) {
 297         val = l->u.value - (tcg_target_long)s->code_ptr;
 298         val1 = val - 2;
 299         if ((int8_t)val1 == val1) {
 300             if (opc == -1)
 301                 tcg_out8(s, 0xeb);
 302             else
 303                 tcg_out8(s, 0x70 + opc);
 304             tcg_out8(s, val1);
 305         } else {
 306             if (opc == -1) {
 307                 tcg_out8(s, 0xe9);
 308                 tcg_out32(s, val - 5);
 309             } else {
 310                 tcg_out8(s, 0x0f);
 311                 tcg_out8(s, 0x80 + opc);
 312                 tcg_out32(s, val - 6);
 313             }
 314         }
 315     } else {
 316         if (opc == -1) {
 317             tcg_out8(s, 0xe9);
 318         } else {
 319             tcg_out8(s, 0x0f);
 320             tcg_out8(s, 0x80 + opc);
 321         }
 322         tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4);
 323         s->code_ptr += 4;
 324     }
 325 }
 326
 327 static void tcg_out_brcond(TCGContext *s, int cond,
 328                            TCGArg arg1, TCGArg arg2, int const_arg2,
 329                            int label_index)
 330 {
 331     if (const_arg2) {
 332         if (arg2 == 0) {
 333             /* test r, r */
 334             tcg_out_modrm(s, 0x85, arg1, arg1);
 335         } else {
 336             tgen_arithi(s, ARITH_CMP, arg1, arg2);
 337         }
 338     } else {
 339         tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3), arg2, arg1);
 340     }
 341     tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
 342 }
 343
 344 /* XXX: we implement it at the target level to avoid having to
 345    handle cross basic blocks temporaries */
 346 static void tcg_out_brcond2(TCGContext *s,
 347                             const TCGArg *args, const int *const_args)
 348 {
 349     int label_next;
 350     label_next = gen_new_label();
 351     switch(args[4]) {
 352     case TCG_COND_EQ:
 353         tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next);
 354         tcg_out_brcond(s, TCG_COND_EQ, args[1], args[3], const_args[3], args[5]);
 355         break;
 356     case TCG_COND_NE:
 357         tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], args[5]);
 358         tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], args[5]);
 359         break;
 360     case TCG_COND_LT:
 361         tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
 362         tcg_out_jxx(s, JCC_JNE, label_next);
 363         tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
 364         break;
 365     case TCG_COND_LE:
 366         tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
 367         tcg_out_jxx(s, JCC_JNE, label_next);
 368         tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
 369         break;
 370     case TCG_COND_GT:
 371         tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
 372         tcg_out_jxx(s, JCC_JNE, label_next);
 373         tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
 374         break;
 375     case TCG_COND_GE:
 376         tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
 377         tcg_out_jxx(s, JCC_JNE, label_next);
 378         tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
 379         break;
 380     case TCG_COND_LTU:
 381         tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
 382         tcg_out_jxx(s, JCC_JNE, label_next);
 383         tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
 384         break;
 385     case TCG_COND_LEU:
 386         tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
 387         tcg_out_jxx(s, JCC_JNE, label_next);
 388         tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
 389         break;
 390     case TCG_COND_GTU:
 391         tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
 392         tcg_out_jxx(s, JCC_JNE, label_next);
 393         tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
 394         break;
 395     case TCG_COND_GEU:
 396         tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
 397         tcg_out_jxx(s, JCC_JNE, label_next);
 398         tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
 399         break;
 400     default:
 401         tcg_abort();
 402     }
 403     tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr);
 404 }
 405
 406 #if defined(CONFIG_SOFTMMU)
 407
 408 #include "../../softmmu_defs.h"
 409
 410 static void *qemu_ld_helpers[4] = {
 411     __ldb_mmu,
 412     __ldw_mmu,
 413     __ldl_mmu,
 414     __ldq_mmu,
 415 };
 416
 417 static void *qemu_st_helpers[4] = {
 418     __stb_mmu,
 419     __stw_mmu,
 420     __stl_mmu,
 421     __stq_mmu,
 422 };
 423 #endif
 424
 425 /* XXX: qemu_ld and qemu_st could be modified to clobber only EDX and
 426    EAX. It will be useful once fixed registers globals are less
 427    common. */
 428 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
 429                             int opc)
 430 {
 431     int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
 432 #if defined(CONFIG_SOFTMMU)
 433     uint8_t *label1_ptr, *label2_ptr;
 434 #endif
 435 #if TARGET_LONG_BITS == 64
 436 #if defined(CONFIG_SOFTMMU)
 437     uint8_t *label3_ptr;
 438 #endif
 439     int addr_reg2;
 440 #endif
 441
 442     data_reg = *args++;
 443     if (opc == 3)
 444         data_reg2 = *args++;
 445     else
 446         data_reg2 = 0;
 447     addr_reg = *args++;
 448 #if TARGET_LONG_BITS == 64
 449     addr_reg2 = *args++;
 450 #endif
 451     mem_index = *args;
 452     s_bits = opc & 3;
 453
 454     r0 = TCG_REG_EAX;
 455     r1 = TCG_REG_EDX;
 456
 457 #if defined(CONFIG_SOFTMMU)
 458     tcg_out_mov(s, r1, addr_reg);
 459
 460     tcg_out_mov(s, r0, addr_reg);
 461
 462     tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
 463     tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
 464
 465     tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
 466     tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
 467
 468     tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
 469     tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
 470
 471     tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
 472     tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
 473     tcg_out8(s, (5 << 3) | r1);
 474     tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_read));
 475
 476     /* cmp 0(r1), r0 */
 477     tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
 478
 479     tcg_out_mov(s, r0, addr_reg);
 480
 481 #if TARGET_LONG_BITS == 32
 482     /* je label1 */
 483     tcg_out8(s, 0x70 + JCC_JE);
 484     label1_ptr = s->code_ptr;
 485     s->code_ptr++;
 486 #else
 487     /* jne label3 */
 488     tcg_out8(s, 0x70 + JCC_JNE);
 489     label3_ptr = s->code_ptr;
 490     s->code_ptr++;
 491
 492     /* cmp 4(r1), addr_reg2 */
 493     tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
 494
 495     /* je label1 */
 496     tcg_out8(s, 0x70 + JCC_JE);
 497     label1_ptr = s->code_ptr;
 498     s->code_ptr++;
 499
 500     /* label3: */
 501     *label3_ptr = s->code_ptr - label3_ptr - 1;
 502 #endif
 503
 504     /* XXX: move that code at the end of the TB */
 505 #if TARGET_LONG_BITS == 32
 506     tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
 507 #else
 508     tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
 509     tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
 510 #endif
 511     tcg_out8(s, 0xe8);
 512     tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] -
 513               (tcg_target_long)s->code_ptr - 4);
 514
 515     switch(opc) {
 516     case 0 | 4:
 517         /* movsbl */
 518         tcg_out_modrm(s, 0xbe | P_EXT, data_reg, TCG_REG_EAX);
 519         break;
 520     case 1 | 4:
 521         /* movswl */
 522         tcg_out_modrm(s, 0xbf | P_EXT, data_reg, TCG_REG_EAX);
 523         break;
 524     case 0:
 525     case 1:
 526     case 2:
 527     default:
 528         tcg_out_mov(s, data_reg, TCG_REG_EAX);
 529         break;
 530     case 3:
 531         if (data_reg == TCG_REG_EDX) {
 532             tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */
 533             tcg_out_mov(s, data_reg2, TCG_REG_EAX);
 534         } else {
 535             tcg_out_mov(s, data_reg, TCG_REG_EAX);
 536             tcg_out_mov(s, data_reg2, TCG_REG_EDX);
 537         }
 538         break;
 539     }
 540
 541     /* jmp label2 */
 542     tcg_out8(s, 0xeb);
 543     label2_ptr = s->code_ptr;
 544     s->code_ptr++;
 545
 546     /* label1: */
 547     *label1_ptr = s->code_ptr - label1_ptr - 1;
 548
 549     /* add x(r1), r0 */
 550     tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
 551                          offsetof(CPUTLBEntry, addr_read));
 552 #else
 553     r0 = addr_reg;
 554 #endif
 555
 556 #ifdef TARGET_WORDS_BIGENDIAN
 557     bswap = 1;
 558 #else
 559     bswap = 0;
 560 #endif
 561     switch(opc) {
 562     case 0:
 563         /* movzbl */
 564         tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, 0);
 565         break;
 566     case 0 | 4:
 567         /* movsbl */
 568         tcg_out_modrm_offset(s, 0xbe | P_EXT, data_reg, r0, 0);
 569         break;
 570     case 1:
 571         /* movzwl */
 572         tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
 573         if (bswap) {
 574             /* rolw $8, data_reg */
 575             tcg_out8(s, 0x66);
 576             tcg_out_modrm(s, 0xc1, 0, data_reg);
 577             tcg_out8(s, 8);
 578         }
 579         break;
 580     case 1 | 4:
 581         /* movswl */
 582         tcg_out_modrm_offset(s, 0xbf | P_EXT, data_reg, r0, 0);
 583         if (bswap) {
 584             /* rolw $8, data_reg */
 585             tcg_out8(s, 0x66);
 586             tcg_out_modrm(s, 0xc1, 0, data_reg);
 587             tcg_out8(s, 8);
 588
 589             /* movswl data_reg, data_reg */
 590             tcg_out_modrm(s, 0xbf | P_EXT, data_reg, data_reg);
 591         }
 592         break;
 593     case 2:
 594         /* movl (r0), data_reg */
 595         tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
 596         if (bswap) {
 597             /* bswap */
 598             tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
 599         }
 600         break;
 601     case 3:
 602         /* XXX: could be nicer */
 603         if (r0 == data_reg) {
 604             r1 = TCG_REG_EDX;
 605             if (r1 == data_reg)
 606                 r1 = TCG_REG_EAX;
 607             tcg_out_mov(s, r1, r0);
 608             r0 = r1;
 609         }
 610         if (!bswap) {
 611             tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
 612             tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 4);
 613         } else {
 614             tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 4);
 615             tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
 616
 617             tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 0);
 618             /* bswap */
 619             tcg_out_opc(s, (0xc8 + data_reg2) | P_EXT);
 620         }
 621         break;
 622     default:
 623         tcg_abort();
 624     }
 625
 626 #if defined(CONFIG_SOFTMMU)
 627     /* label2: */
 628     *label2_ptr = s->code_ptr - label2_ptr - 1;
 629 #endif
 630 }
 631
 632
 633 static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
 634                             int opc)
 635 {
 636     int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
 637 #if defined(CONFIG_SOFTMMU)
 638     uint8_t *label1_ptr, *label2_ptr;
 639 #endif
 640 #if TARGET_LONG_BITS == 64
 641 #if defined(CONFIG_SOFTMMU)
 642     uint8_t *label3_ptr;
 643 #endif
 644     int addr_reg2;
 645 #endif
 646
 647     data_reg = *args++;
 648     if (opc == 3)
 649         data_reg2 = *args++;
 650     else
 651         data_reg2 = 0;
 652     addr_reg = *args++;
 653 #if TARGET_LONG_BITS == 64
 654     addr_reg2 = *args++;
 655 #endif
 656     mem_index = *args;
 657
 658     s_bits = opc;
 659
 660     r0 = TCG_REG_EAX;
 661     r1 = TCG_REG_EDX;
 662
 663 #if defined(CONFIG_SOFTMMU)
 664     tcg_out_mov(s, r1, addr_reg);
 665
 666     tcg_out_mov(s, r0, addr_reg);
 667
 668     tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
 669     tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
 670
 671     tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
 672     tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
 673
 674     tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
 675     tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
 676
 677     tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
 678     tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
 679     tcg_out8(s, (5 << 3) | r1);
 680     tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_write));
 681
 682     /* cmp 0(r1), r0 */
 683     tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
 684
 685     tcg_out_mov(s, r0, addr_reg);
 686
 687 #if TARGET_LONG_BITS == 32
 688     /* je label1 */
 689     tcg_out8(s, 0x70 + JCC_JE);
 690     label1_ptr = s->code_ptr;
 691     s->code_ptr++;
 692 #else
 693     /* jne label3 */
 694     tcg_out8(s, 0x70 + JCC_JNE);
 695     label3_ptr = s->code_ptr;
 696     s->code_ptr++;
 697
 698     /* cmp 4(r1), addr_reg2 */
 699     tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
 700
 701     /* je label1 */
 702     tcg_out8(s, 0x70 + JCC_JE);
 703     label1_ptr = s->code_ptr;
 704     s->code_ptr++;
 705
 706     /* label3: */
 707     *label3_ptr = s->code_ptr - label3_ptr - 1;
 708 #endif
 709
 710     /* XXX: move that code at the end of the TB */
 711 #if TARGET_LONG_BITS == 32
 712     if (opc == 3) {
 713         tcg_out_mov(s, TCG_REG_EDX, data_reg);
 714         tcg_out_mov(s, TCG_REG_ECX, data_reg2);
 715         tcg_out8(s, 0x6a); /* push Ib */
 716         tcg_out8(s, mem_index);
 717         tcg_out8(s, 0xe8);
 718         tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
 719                   (tcg_target_long)s->code_ptr - 4);
 720         tcg_out_addi(s, TCG_REG_ESP, 4);
 721     } else {
 722         switch(opc) {
 723         case 0:
 724             /* movzbl */
 725             tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_EDX, data_reg);
 726             break;
 727         case 1:
 728             /* movzwl */
 729             tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg);
 730             break;
 731         case 2:
 732             tcg_out_mov(s, TCG_REG_EDX, data_reg);
 733             break;
 734         }
 735         tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
 736         tcg_out8(s, 0xe8);
 737         tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
 738                   (tcg_target_long)s->code_ptr - 4);
 739     }
 740 #else
 741     if (opc == 3) {
 742         tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
 743         tcg_out8(s, 0x6a); /* push Ib */
 744         tcg_out8(s, mem_index);
 745         tcg_out_opc(s, 0x50 + data_reg2); /* push */
 746         tcg_out_opc(s, 0x50 + data_reg); /* push */
 747         tcg_out8(s, 0xe8);
 748         tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
 749                   (tcg_target_long)s->code_ptr - 4);
 750         tcg_out_addi(s, TCG_REG_ESP, 12);
 751     } else {
 752         tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
 753         switch(opc) {
 754         case 0:
 755             /* movzbl */
 756             tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_ECX, data_reg);
 757             break;
 758         case 1:
 759             /* movzwl */
 760             tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg);
 761             break;
 762         case 2:
 763             tcg_out_mov(s, TCG_REG_ECX, data_reg);
 764             break;
 765         }
 766         tcg_out8(s, 0x6a); /* push Ib */
 767         tcg_out8(s, mem_index);
 768         tcg_out8(s, 0xe8);
 769         tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
 770                   (tcg_target_long)s->code_ptr - 4);
 771         tcg_out_addi(s, TCG_REG_ESP, 4);
 772     }
 773 #endif
 774
 775     /* jmp label2 */
 776     tcg_out8(s, 0xeb);
 777     label2_ptr = s->code_ptr;
 778     s->code_ptr++;
 779
 780     /* label1: */
 781     *label1_ptr = s->code_ptr - label1_ptr - 1;
 782
 783     /* add x(r1), r0 */
 784     tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
 785                          offsetof(CPUTLBEntry, addr_write));
 786 #else
 787     r0 = addr_reg;
 788 #endif
 789
 790 #ifdef TARGET_WORDS_BIGENDIAN
 791     bswap = 1;
 792 #else
 793     bswap = 0;
 794 #endif
 795     switch(opc) {
 796     case 0:
 797         /* movb */
 798         tcg_out_modrm_offset(s, 0x88, data_reg, r0, 0);
 799         break;
 800     case 1:
 801         if (bswap) {
 802             tcg_out_mov(s, r1, data_reg);
 803             tcg_out8(s, 0x66); /* rolw $8, %ecx */
 804             tcg_out_modrm(s, 0xc1, 0, r1);
 805             tcg_out8(s, 8);
 806             data_reg = r1;
 807         }
 808         /* movw */
 809         tcg_out8(s, 0x66);
 810         tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
 811         break;
 812     case 2:
 813         if (bswap) {
 814             tcg_out_mov(s, r1, data_reg);
 815             /* bswap data_reg */
 816             tcg_out_opc(s, (0xc8 + r1) | P_EXT);
 817             data_reg = r1;
 818         }
 819         /* movl */
 820         tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
 821         break;
 822     case 3:
 823         if (bswap) {
 824             tcg_out_mov(s, r1, data_reg2);
 825             /* bswap data_reg */
 826             tcg_out_opc(s, (0xc8 + r1) | P_EXT);
 827             tcg_out_modrm_offset(s, 0x89, r1, r0, 0);
 828             tcg_out_mov(s, r1, data_reg);
 829             /* bswap data_reg */
 830             tcg_out_opc(s, (0xc8 + r1) | P_EXT);
 831             tcg_out_modrm_offset(s, 0x89, r1, r0, 4);
 832         } else {
 833             tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
 834             tcg_out_modrm_offset(s, 0x89, data_reg2, r0, 4);
 835         }
 836         break;
 837     default:
 838         tcg_abort();
 839     }
 840
 841 #if defined(CONFIG_SOFTMMU)
 842     /* label2: */
 843     *label2_ptr = s->code_ptr - label2_ptr - 1;
 844 #endif
 845 }
 846
 847 static inline void tcg_out_op(TCGContext *s, int opc,
 848                               const TCGArg *args, const int *const_args)
 849 {
 850     int c;
 851
 852     switch(opc) {
 853     case INDEX_op_exit_tb:
 854         tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, args[0]);
 855         tcg_out8(s, 0xe9); /* jmp tb_ret_addr */
 856         tcg_out32(s, tb_ret_addr - s->code_ptr - 4);
 857         break;
 858     case INDEX_op_goto_tb:
 859         if (s->tb_jmp_offset) {
 860             /* direct jump method */
 861             tcg_out8(s, 0xe9); /* jmp im */
 862             s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
 863             tcg_out32(s, 0);
 864         } else {
 865             /* indirect jump method */
 866             /* jmp Ev */
 867             tcg_out_modrm_offset(s, 0xff, 4, -1,
 868                                  (tcg_target_long)(s->tb_next + args[0]));
 869         }
 870         s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
 871         break;
 872     case INDEX_op_call:
 873         if (const_args[0]) {
 874             tcg_out8(s, 0xe8);
 875             tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
 876         } else {
 877             tcg_out_modrm(s, 0xff, 2, args[0]);
 878         }
 879         break;
 880     case INDEX_op_jmp:
 881         if (const_args[0]) {
 882             tcg_out8(s, 0xe9);
 883             tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
 884         } else {
 885             tcg_out_modrm(s, 0xff, 4, args[0]);
 886         }
 887         break;
 888     case INDEX_op_br:
 889         tcg_out_jxx(s, JCC_JMP, args[0]);
 890         break;
 891     case INDEX_op_movi_i32:
 892         tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
 893         break;
 894     case INDEX_op_ld8u_i32:
 895         /* movzbl */
 896         tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]);
 897         break;
 898     case INDEX_op_ld8s_i32:
 899         /* movsbl */
 900         tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]);
 901         break;
 902     case INDEX_op_ld16u_i32:
 903         /* movzwl */
 904         tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]);
 905         break;
 906     case INDEX_op_ld16s_i32:
 907         /* movswl */
 908         tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]);
 909         break;
 910     case INDEX_op_ld_i32:
 911         /* movl */
 912         tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]);
 913         break;
 914     case INDEX_op_st8_i32:
 915         /* movb */
 916         tcg_out_modrm_offset(s, 0x88, args[0], args[1], args[2]);
 917         break;
 918     case INDEX_op_st16_i32:
 919         /* movw */
 920         tcg_out8(s, 0x66);
 921         tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
 922         break;
 923     case INDEX_op_st_i32:
 924         /* movl */
 925         tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
 926         break;
 927     case INDEX_op_sub_i32:
 928         c = ARITH_SUB;
 929         goto gen_arith;
 930     case INDEX_op_and_i32:
 931         c = ARITH_AND;
 932         goto gen_arith;
 933     case INDEX_op_or_i32:
 934         c = ARITH_OR;
 935         goto gen_arith;
 936     case INDEX_op_xor_i32:
 937         c = ARITH_XOR;
 938         goto gen_arith;
 939     case INDEX_op_add_i32:
 940         c = ARITH_ADD;
 941     gen_arith:
 942         if (const_args[2]) {
 943             tgen_arithi(s, c, args[0], args[2]);
 944         } else {
 945             tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
 946         }
 947         break;
 948     case INDEX_op_mul_i32:
 949         if (const_args[2]) {
 950             int32_t val;
 951             val = args[2];
 952             if (val == (int8_t)val) {
 953                 tcg_out_modrm(s, 0x6b, args[0], args[0]);
 954                 tcg_out8(s, val);
 955             } else {
 956                 tcg_out_modrm(s, 0x69, args[0], args[0]);
 957                 tcg_out32(s, val);
 958             }
 959         } else {
 960             tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]);
 961         }
 962         break;
 963     case INDEX_op_mulu2_i32:
 964         tcg_out_modrm(s, 0xf7, 4, args[3]);
 965         break;
 966     case INDEX_op_div2_i32:
 967         tcg_out_modrm(s, 0xf7, 7, args[4]);
 968         break;
 969     case INDEX_op_divu2_i32:
 970         tcg_out_modrm(s, 0xf7, 6, args[4]);
 971         break;
 972     case INDEX_op_shl_i32:
 973         c = SHIFT_SHL;
 974     gen_shift32:
 975         if (const_args[2]) {
 976             if (args[2] == 1) {
 977                 tcg_out_modrm(s, 0xd1, c, args[0]);
 978             } else {
 979                 tcg_out_modrm(s, 0xc1, c, args[0]);
 980                 tcg_out8(s, args[2]);
 981             }
 982         } else {
 983             tcg_out_modrm(s, 0xd3, c, args[0]);
 984         }
 985         break;
 986     case INDEX_op_shr_i32:
 987         c = SHIFT_SHR;
 988         goto gen_shift32;
 989     case INDEX_op_sar_i32:
 990         c = SHIFT_SAR;
 991         goto gen_shift32;
 992
 993     case INDEX_op_add2_i32:
 994         if (const_args[4])
 995             tgen_arithi(s, ARITH_ADD, args[0], args[4]);
 996         else
 997             tcg_out_modrm(s, 0x01 | (ARITH_ADD << 3), args[4], args[0]);
 998         if (const_args[5])
 999             tgen_arithi(s, ARITH_ADC, args[1], args[5]);
1000         else
1001             tcg_out_modrm(s, 0x01 | (ARITH_ADC << 3), args[5], args[1]);
1002         break;
1003     case INDEX_op_sub2_i32:
1004         if (const_args[4])
1005             tgen_arithi(s, ARITH_SUB, args[0], args[4]);
1006         else
1007             tcg_out_modrm(s, 0x01 | (ARITH_SUB << 3), args[4], args[0]);
1008         if (const_args[5])
1009             tgen_arithi(s, ARITH_SBB, args[1], args[5]);
1010         else
1011             tcg_out_modrm(s, 0x01 | (ARITH_SBB << 3), args[5], args[1]);
1012         break;
1013     case INDEX_op_brcond_i32:
1014         tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], args[3]);
1015         break;
1016     case INDEX_op_brcond2_i32:
1017         tcg_out_brcond2(s, args, const_args);
1018         break;
1019
1020     case INDEX_op_qemu_ld8u:
1021         tcg_out_qemu_ld(s, args, 0);
1022         break;
1023     case INDEX_op_qemu_ld8s:
1024         tcg_out_qemu_ld(s, args, 0 | 4);
1025         break;
1026     case INDEX_op_qemu_ld16u:
1027         tcg_out_qemu_ld(s, args, 1);
1028         break;
1029     case INDEX_op_qemu_ld16s:
1030         tcg_out_qemu_ld(s, args, 1 | 4);
1031         break;
1032     case INDEX_op_qemu_ld32u:
1033         tcg_out_qemu_ld(s, args, 2);
1034         break;
1035     case INDEX_op_qemu_ld64:
1036         tcg_out_qemu_ld(s, args, 3);
1037         break;
1038
1039     case INDEX_op_qemu_st8:
1040         tcg_out_qemu_st(s, args, 0);
1041         break;
1042     case INDEX_op_qemu_st16:
1043         tcg_out_qemu_st(s, args, 1);
1044         break;
1045     case INDEX_op_qemu_st32:
1046         tcg_out_qemu_st(s, args, 2);
1047         break;
1048     case INDEX_op_qemu_st64:
1049         tcg_out_qemu_st(s, args, 3);
1050         break;
1051
1052     default:
1053         tcg_abort();
1054     }
1055 }
1056
1057 static const TCGTargetOpDef x86_op_defs[] = {
1058     { INDEX_op_exit_tb, { } },
1059     { INDEX_op_goto_tb, { } },
1060     { INDEX_op_call, { "ri" } },
1061     { INDEX_op_jmp, { "ri" } },
1062     { INDEX_op_br, { } },
1063     { INDEX_op_mov_i32, { "r", "r" } },
1064     { INDEX_op_movi_i32, { "r" } },
1065     { INDEX_op_ld8u_i32, { "r", "r" } },
1066     { INDEX_op_ld8s_i32, { "r", "r" } },
1067     { INDEX_op_ld16u_i32, { "r", "r" } },
1068     { INDEX_op_ld16s_i32, { "r", "r" } },
1069     { INDEX_op_ld_i32, { "r", "r" } },
1070     { INDEX_op_st8_i32, { "q", "r" } },
1071     { INDEX_op_st16_i32, { "r", "r" } },
1072     { INDEX_op_st_i32, { "r", "r" } },
1073
1074     { INDEX_op_add_i32, { "r", "0", "ri" } },
1075     { INDEX_op_sub_i32, { "r", "0", "ri" } },
1076     { INDEX_op_mul_i32, { "r", "0", "ri" } },
1077     { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
1078     { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } },
1079     { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } },
1080     { INDEX_op_and_i32, { "r", "0", "ri" } },
1081     { INDEX_op_or_i32, { "r", "0", "ri" } },
1082     { INDEX_op_xor_i32, { "r", "0", "ri" } },
1083
1084     { INDEX_op_shl_i32, { "r", "0", "ci" } },
1085     { INDEX_op_shr_i32, { "r", "0", "ci" } },
1086     { INDEX_op_sar_i32, { "r", "0", "ci" } },
1087
1088     { INDEX_op_brcond_i32, { "r", "ri" } },
1089
1090     { INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1091     { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1092     { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },
1093
1094 #if TARGET_LONG_BITS == 32
1095     { INDEX_op_qemu_ld8u, { "r", "L" } },
1096     { INDEX_op_qemu_ld8s, { "r", "L" } },
1097     { INDEX_op_qemu_ld16u, { "r", "L" } },
1098     { INDEX_op_qemu_ld16s, { "r", "L" } },
1099     { INDEX_op_qemu_ld32u, { "r", "L" } },
1100     { INDEX_op_qemu_ld64, { "r", "r", "L" } },
1101
1102     { INDEX_op_qemu_st8, { "cb", "L" } },
1103     { INDEX_op_qemu_st16, { "L", "L" } },
1104     { INDEX_op_qemu_st32, { "L", "L" } },
1105     { INDEX_op_qemu_st64, { "L", "L", "L" } },
1106 #else
1107     { INDEX_op_qemu_ld8u, { "r", "L", "L" } },
1108     { INDEX_op_qemu_ld8s, { "r", "L", "L" } },
1109     { INDEX_op_qemu_ld16u, { "r", "L", "L" } },
1110     { INDEX_op_qemu_ld16s, { "r", "L", "L" } },
1111     { INDEX_op_qemu_ld32u, { "r", "L", "L" } },
1112     { INDEX_op_qemu_ld64, { "r", "r", "L", "L" } },
1113
1114     { INDEX_op_qemu_st8, { "cb", "L", "L" } },
1115     { INDEX_op_qemu_st16, { "L", "L", "L" } },
1116     { INDEX_op_qemu_st32, { "L", "L", "L" } },
1117     { INDEX_op_qemu_st64, { "L", "L", "L", "L" } },
1118 #endif
1119     { -1 },
1120 };
1121
1122 static int tcg_target_callee_save_regs[] = {
1123     /*    TCG_REG_EBP, */ /* currently used for the global env, so no
1124                              need to save */
1125     TCG_REG_EBX,
1126     TCG_REG_ESI,
1127     TCG_REG_EDI,
1128 };
1129
1130 static inline void tcg_out_push(TCGContext *s, int reg)
1131 {
1132     tcg_out_opc(s, 0x50 + reg);
1133 }
1134
1135 static inline void tcg_out_pop(TCGContext *s, int reg)
1136 {
1137     tcg_out_opc(s, 0x58 + reg);
1138 }
1139
1140 /* Generate global QEMU prologue and epilogue code */
1141 void tcg_target_qemu_prologue(TCGContext *s)
1142 {
1143     int i, frame_size, push_size, stack_addend;
1144
1145     /* TB prologue */
1146     /* save all callee saved registers */
1147     for(i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {
1148         tcg_out_push(s, tcg_target_callee_save_regs[i]);
1149     }
1150     /* reserve some stack space */
1151     push_size = 4 + ARRAY_SIZE(tcg_target_callee_save_regs) * 4;
1152     frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE;
1153     frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) &
1154         ~(TCG_TARGET_STACK_ALIGN - 1);
1155     stack_addend = frame_size - push_size;
1156     tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
1157
1158     tcg_out_modrm(s, 0xff, 4, TCG_REG_EAX); /* jmp *%eax */
1159
1160     /* TB epilogue */
1161     tb_ret_addr = s->code_ptr;
1162     tcg_out_addi(s, TCG_REG_ESP, stack_addend);
1163     for(i = ARRAY_SIZE(tcg_target_callee_save_regs) - 1; i >= 0; i--) {
1164         tcg_out_pop(s, tcg_target_callee_save_regs[i]);
1165     }
1166     tcg_out8(s, 0xc3); /* ret */
1167 }
1168
1169 void tcg_target_init(TCGContext *s)
1170 {
1171     /* fail safe */
1172     if ((1 << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry))
1173         tcg_abort();
1174
1175     tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xff);
1176     tcg_regset_set32(tcg_target_call_clobber_regs, 0,
1177                      (1 << TCG_REG_EAX) |
1178                      (1 << TCG_REG_EDX) |
1179                      (1 << TCG_REG_ECX));
1180
1181     tcg_regset_clear(s->reserved_regs);
1182     tcg_regset_set_reg(s->reserved_regs, TCG_REG_ESP);
1183
1184     tcg_add_target_add_op_defs(x86_op_defs);
1185 }