ARM ELF loader.
[qemu/mini2440.git] / vl.h
blob5cbbc4fb81067b9e90e4aa0050325fbf2efc9fce
1 /*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #ifndef VL_H
25 #define VL_H
27 /* we put basic includes here to avoid repeating them in device drivers */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <string.h>
32 #include <inttypes.h>
33 #include <limits.h>
34 #include <time.h>
35 #include <ctype.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <fcntl.h>
39 #include <sys/stat.h>
41 #ifndef O_LARGEFILE
42 #define O_LARGEFILE 0
43 #endif
44 #ifndef O_BINARY
45 #define O_BINARY 0
46 #endif
48 #ifdef __sun__
49 #define ENOMEDIUM 4097
50 #endif
52 #ifdef _WIN32
53 #include <windows.h>
54 #define fsync _commit
55 #define lseek _lseeki64
56 #define ENOTSUP 4096
57 #define ENOMEDIUM 4097
58 extern int qemu_ftruncate64(int, int64_t);
59 #define ftruncate qemu_ftruncate64
62 static inline char *realpath(const char *path, char *resolved_path)
64 _fullpath(resolved_path, path, _MAX_PATH);
65 return resolved_path;
68 #define PRId64 "I64d"
69 #define PRIx64 "I64x"
70 #define PRIu64 "I64u"
71 #define PRIo64 "I64o"
72 #endif
74 #ifdef QEMU_TOOL
76 /* we use QEMU_TOOL in the command line tools which do not depend on
77 the target CPU type */
78 #include "config-host.h"
79 #include <setjmp.h>
80 #include "osdep.h"
81 #include "bswap.h"
83 #else
85 #include "audio/audio.h"
86 #include "cpu.h"
87 #include "gdbstub.h"
89 #endif /* !defined(QEMU_TOOL) */
91 #ifndef glue
92 #define xglue(x, y) x ## y
93 #define glue(x, y) xglue(x, y)
94 #define stringify(s) tostring(s)
95 #define tostring(s) #s
96 #endif
98 #ifndef MIN
99 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
100 #endif
101 #ifndef MAX
102 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
103 #endif
105 /* cutils.c */
106 void pstrcpy(char *buf, int buf_size, const char *str);
107 char *pstrcat(char *buf, int buf_size, const char *s);
108 int strstart(const char *str, const char *val, const char **ptr);
109 int stristart(const char *str, const char *val, const char **ptr);
111 /* vl.c */
112 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
114 void hw_error(const char *fmt, ...);
116 extern const char *bios_dir;
118 extern int vm_running;
120 typedef struct vm_change_state_entry VMChangeStateEntry;
121 typedef void VMChangeStateHandler(void *opaque, int running);
122 typedef void VMStopHandler(void *opaque, int reason);
124 VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
125 void *opaque);
126 void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
128 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
129 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
131 void vm_start(void);
132 void vm_stop(int reason);
134 typedef void QEMUResetHandler(void *opaque);
136 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
137 void qemu_system_reset_request(void);
138 void qemu_system_shutdown_request(void);
139 void qemu_system_powerdown_request(void);
140 #if !defined(TARGET_SPARC)
141 // Please implement a power failure function to signal the OS
142 #define qemu_system_powerdown() do{}while(0)
143 #else
144 void qemu_system_powerdown(void);
145 #endif
147 void main_loop_wait(int timeout);
149 extern int ram_size;
150 extern int bios_size;
151 extern int rtc_utc;
152 extern int cirrus_vga_enabled;
153 extern int graphic_width;
154 extern int graphic_height;
155 extern int graphic_depth;
156 extern const char *keyboard_layout;
157 extern int kqemu_allowed;
158 extern int win2k_install_hack;
159 extern int usb_enabled;
160 extern int smp_cpus;
161 extern int no_quit;
163 #define MAX_OPTION_ROMS 16
164 extern const char *option_rom[MAX_OPTION_ROMS];
165 extern int nb_option_roms;
167 /* XXX: make it dynamic */
168 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
169 #define BIOS_SIZE ((512 + 32) * 1024)
170 #elif defined(TARGET_MIPS)
171 #define BIOS_SIZE (4 * 1024 * 1024)
172 #else
173 #define BIOS_SIZE ((256 + 64) * 1024)
174 #endif
176 /* keyboard/mouse support */
178 #define MOUSE_EVENT_LBUTTON 0x01
179 #define MOUSE_EVENT_RBUTTON 0x02
180 #define MOUSE_EVENT_MBUTTON 0x04
182 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
183 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
185 typedef struct QEMUPutMouseEntry {
186 QEMUPutMouseEvent *qemu_put_mouse_event;
187 void *qemu_put_mouse_event_opaque;
188 int qemu_put_mouse_event_absolute;
189 char *qemu_put_mouse_event_name;
191 /* used internally by qemu for handling mice */
192 struct QEMUPutMouseEntry *next;
193 } QEMUPutMouseEntry;
195 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
196 QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
197 void *opaque, int absolute,
198 const char *name);
199 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
201 void kbd_put_keycode(int keycode);
202 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
203 int kbd_mouse_is_absolute(void);
205 void do_info_mice(void);
206 void do_mouse_set(int index);
208 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
209 constants) */
210 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
211 #define QEMU_KEY_BACKSPACE 0x007f
212 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
213 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
214 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
215 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
216 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
217 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
218 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
219 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
220 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
222 #define QEMU_KEY_CTRL_UP 0xe400
223 #define QEMU_KEY_CTRL_DOWN 0xe401
224 #define QEMU_KEY_CTRL_LEFT 0xe402
225 #define QEMU_KEY_CTRL_RIGHT 0xe403
226 #define QEMU_KEY_CTRL_HOME 0xe404
227 #define QEMU_KEY_CTRL_END 0xe405
228 #define QEMU_KEY_CTRL_PAGEUP 0xe406
229 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
231 void kbd_put_keysym(int keysym);
233 /* async I/O support */
235 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
236 typedef int IOCanRWHandler(void *opaque);
237 typedef void IOHandler(void *opaque);
239 int qemu_set_fd_handler2(int fd,
240 IOCanRWHandler *fd_read_poll,
241 IOHandler *fd_read,
242 IOHandler *fd_write,
243 void *opaque);
244 int qemu_set_fd_handler(int fd,
245 IOHandler *fd_read,
246 IOHandler *fd_write,
247 void *opaque);
249 /* Polling handling */
251 /* return TRUE if no sleep should be done afterwards */
252 typedef int PollingFunc(void *opaque);
254 int qemu_add_polling_cb(PollingFunc *func, void *opaque);
255 void qemu_del_polling_cb(PollingFunc *func, void *opaque);
257 #ifdef _WIN32
258 /* Wait objects handling */
259 typedef void WaitObjectFunc(void *opaque);
261 int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
262 void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
263 #endif
265 typedef struct QEMUBH QEMUBH;
267 /* character device */
269 #define CHR_EVENT_BREAK 0 /* serial break char */
270 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
271 #define CHR_EVENT_RESET 2 /* new connection established */
274 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
275 typedef struct {
276 int speed;
277 int parity;
278 int data_bits;
279 int stop_bits;
280 } QEMUSerialSetParams;
282 #define CHR_IOCTL_SERIAL_SET_BREAK 2
284 #define CHR_IOCTL_PP_READ_DATA 3
285 #define CHR_IOCTL_PP_WRITE_DATA 4
286 #define CHR_IOCTL_PP_READ_CONTROL 5
287 #define CHR_IOCTL_PP_WRITE_CONTROL 6
288 #define CHR_IOCTL_PP_READ_STATUS 7
290 typedef void IOEventHandler(void *opaque, int event);
292 typedef struct CharDriverState {
293 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
294 void (*chr_add_read_handler)(struct CharDriverState *s,
295 IOCanRWHandler *fd_can_read,
296 IOReadHandler *fd_read, void *opaque);
297 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
298 IOEventHandler *chr_event;
299 void (*chr_send_event)(struct CharDriverState *chr, int event);
300 void (*chr_close)(struct CharDriverState *chr);
301 void *opaque;
302 QEMUBH *bh;
303 } CharDriverState;
305 CharDriverState *qemu_chr_open(const char *filename);
306 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
307 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
308 void qemu_chr_send_event(CharDriverState *s, int event);
309 void qemu_chr_add_read_handler(CharDriverState *s,
310 IOCanRWHandler *fd_can_read,
311 IOReadHandler *fd_read, void *opaque);
312 void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
313 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
314 void qemu_chr_reset(CharDriverState *s);
316 /* consoles */
318 typedef struct DisplayState DisplayState;
319 typedef struct TextConsole TextConsole;
321 typedef void (*vga_hw_update_ptr)(void *);
322 typedef void (*vga_hw_invalidate_ptr)(void *);
323 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
325 TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
326 vga_hw_invalidate_ptr invalidate,
327 vga_hw_screen_dump_ptr screen_dump,
328 void *opaque);
329 void vga_hw_update(void);
330 void vga_hw_invalidate(void);
331 void vga_hw_screen_dump(const char *filename);
333 int is_graphic_console(void);
334 CharDriverState *text_console_init(DisplayState *ds);
335 void console_select(unsigned int index);
337 /* serial ports */
339 #define MAX_SERIAL_PORTS 4
341 extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
343 /* parallel ports */
345 #define MAX_PARALLEL_PORTS 3
347 extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
349 /* VLANs support */
351 typedef struct VLANClientState VLANClientState;
353 struct VLANClientState {
354 IOReadHandler *fd_read;
355 /* Packets may still be sent if this returns zero. It's used to
356 rate-limit the slirp code. */
357 IOCanRWHandler *fd_can_read;
358 void *opaque;
359 struct VLANClientState *next;
360 struct VLANState *vlan;
361 char info_str[256];
364 typedef struct VLANState {
365 int id;
366 VLANClientState *first_client;
367 struct VLANState *next;
368 } VLANState;
370 VLANState *qemu_find_vlan(int id);
371 VLANClientState *qemu_new_vlan_client(VLANState *vlan,
372 IOReadHandler *fd_read,
373 IOCanRWHandler *fd_can_read,
374 void *opaque);
375 int qemu_can_send_packet(VLANClientState *vc);
376 void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
377 void qemu_handler_true(void *opaque);
379 void do_info_network(void);
381 /* TAP win32 */
382 int tap_win32_init(VLANState *vlan, const char *ifname);
384 /* NIC info */
386 #define MAX_NICS 8
388 typedef struct NICInfo {
389 uint8_t macaddr[6];
390 const char *model;
391 VLANState *vlan;
392 } NICInfo;
394 extern int nb_nics;
395 extern NICInfo nd_table[MAX_NICS];
397 /* timers */
399 typedef struct QEMUClock QEMUClock;
400 typedef struct QEMUTimer QEMUTimer;
401 typedef void QEMUTimerCB(void *opaque);
403 /* The real time clock should be used only for stuff which does not
404 change the virtual machine state, as it is run even if the virtual
405 machine is stopped. The real time clock has a frequency of 1000
406 Hz. */
407 extern QEMUClock *rt_clock;
409 /* The virtual clock is only run during the emulation. It is stopped
410 when the virtual machine is stopped. Virtual timers use a high
411 precision clock, usually cpu cycles (use ticks_per_sec). */
412 extern QEMUClock *vm_clock;
414 int64_t qemu_get_clock(QEMUClock *clock);
416 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
417 void qemu_free_timer(QEMUTimer *ts);
418 void qemu_del_timer(QEMUTimer *ts);
419 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
420 int qemu_timer_pending(QEMUTimer *ts);
422 extern int64_t ticks_per_sec;
423 extern int pit_min_timer_count;
425 int64_t cpu_get_ticks(void);
426 void cpu_enable_ticks(void);
427 void cpu_disable_ticks(void);
429 /* VM Load/Save */
431 typedef struct QEMUFile QEMUFile;
433 QEMUFile *qemu_fopen(const char *filename, const char *mode);
434 void qemu_fflush(QEMUFile *f);
435 void qemu_fclose(QEMUFile *f);
436 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
437 void qemu_put_byte(QEMUFile *f, int v);
438 void qemu_put_be16(QEMUFile *f, unsigned int v);
439 void qemu_put_be32(QEMUFile *f, unsigned int v);
440 void qemu_put_be64(QEMUFile *f, uint64_t v);
441 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
442 int qemu_get_byte(QEMUFile *f);
443 unsigned int qemu_get_be16(QEMUFile *f);
444 unsigned int qemu_get_be32(QEMUFile *f);
445 uint64_t qemu_get_be64(QEMUFile *f);
447 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
449 qemu_put_be64(f, *pv);
452 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
454 qemu_put_be32(f, *pv);
457 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
459 qemu_put_be16(f, *pv);
462 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
464 qemu_put_byte(f, *pv);
467 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
469 *pv = qemu_get_be64(f);
472 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
474 *pv = qemu_get_be32(f);
477 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
479 *pv = qemu_get_be16(f);
482 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
484 *pv = qemu_get_byte(f);
487 #if TARGET_LONG_BITS == 64
488 #define qemu_put_betl qemu_put_be64
489 #define qemu_get_betl qemu_get_be64
490 #define qemu_put_betls qemu_put_be64s
491 #define qemu_get_betls qemu_get_be64s
492 #else
493 #define qemu_put_betl qemu_put_be32
494 #define qemu_get_betl qemu_get_be32
495 #define qemu_put_betls qemu_put_be32s
496 #define qemu_get_betls qemu_get_be32s
497 #endif
499 int64_t qemu_ftell(QEMUFile *f);
500 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
502 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
503 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
505 int register_savevm(const char *idstr,
506 int instance_id,
507 int version_id,
508 SaveStateHandler *save_state,
509 LoadStateHandler *load_state,
510 void *opaque);
511 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
512 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
514 void cpu_save(QEMUFile *f, void *opaque);
515 int cpu_load(QEMUFile *f, void *opaque, int version_id);
517 void do_savevm(const char *name);
518 void do_loadvm(const char *name);
519 void do_delvm(const char *name);
520 void do_info_snapshots(void);
522 /* bottom halves */
523 typedef void QEMUBHFunc(void *opaque);
525 QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
526 void qemu_bh_schedule(QEMUBH *bh);
527 void qemu_bh_cancel(QEMUBH *bh);
528 void qemu_bh_delete(QEMUBH *bh);
529 int qemu_bh_poll(void);
531 /* block.c */
532 typedef struct BlockDriverState BlockDriverState;
533 typedef struct BlockDriver BlockDriver;
535 extern BlockDriver bdrv_raw;
536 extern BlockDriver bdrv_host_device;
537 extern BlockDriver bdrv_cow;
538 extern BlockDriver bdrv_qcow;
539 extern BlockDriver bdrv_vmdk;
540 extern BlockDriver bdrv_cloop;
541 extern BlockDriver bdrv_dmg;
542 extern BlockDriver bdrv_bochs;
543 extern BlockDriver bdrv_vpc;
544 extern BlockDriver bdrv_vvfat;
545 extern BlockDriver bdrv_qcow2;
547 typedef struct BlockDriverInfo {
548 /* in bytes, 0 if irrelevant */
549 int cluster_size;
550 /* offset at which the VM state can be saved (0 if not possible) */
551 int64_t vm_state_offset;
552 } BlockDriverInfo;
554 typedef struct QEMUSnapshotInfo {
555 char id_str[128]; /* unique snapshot id */
556 /* the following fields are informative. They are not needed for
557 the consistency of the snapshot */
558 char name[256]; /* user choosen name */
559 uint32_t vm_state_size; /* VM state info size */
560 uint32_t date_sec; /* UTC date of the snapshot */
561 uint32_t date_nsec;
562 uint64_t vm_clock_nsec; /* VM clock relative to boot */
563 } QEMUSnapshotInfo;
565 #define BDRV_O_RDONLY 0x0000
566 #define BDRV_O_RDWR 0x0002
567 #define BDRV_O_ACCESS 0x0003
568 #define BDRV_O_CREAT 0x0004 /* create an empty file */
569 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
570 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
571 use a disk image format on top of
572 it (default for
573 bdrv_file_open()) */
575 void bdrv_init(void);
576 BlockDriver *bdrv_find_format(const char *format_name);
577 int bdrv_create(BlockDriver *drv,
578 const char *filename, int64_t size_in_sectors,
579 const char *backing_file, int flags);
580 BlockDriverState *bdrv_new(const char *device_name);
581 void bdrv_delete(BlockDriverState *bs);
582 int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
583 int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
584 int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
585 BlockDriver *drv);
586 void bdrv_close(BlockDriverState *bs);
587 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
588 uint8_t *buf, int nb_sectors);
589 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
590 const uint8_t *buf, int nb_sectors);
591 int bdrv_pread(BlockDriverState *bs, int64_t offset,
592 void *buf, int count);
593 int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
594 const void *buf, int count);
595 int bdrv_truncate(BlockDriverState *bs, int64_t offset);
596 int64_t bdrv_getlength(BlockDriverState *bs);
597 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
598 int bdrv_commit(BlockDriverState *bs);
599 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
600 /* async block I/O */
601 typedef struct BlockDriverAIOCB BlockDriverAIOCB;
602 typedef void BlockDriverCompletionFunc(void *opaque, int ret);
604 BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
605 uint8_t *buf, int nb_sectors,
606 BlockDriverCompletionFunc *cb, void *opaque);
607 BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
608 const uint8_t *buf, int nb_sectors,
609 BlockDriverCompletionFunc *cb, void *opaque);
610 void bdrv_aio_cancel(BlockDriverAIOCB *acb);
612 void qemu_aio_init(void);
613 void qemu_aio_poll(void);
614 void qemu_aio_flush(void);
615 void qemu_aio_wait_start(void);
616 void qemu_aio_wait(void);
617 void qemu_aio_wait_end(void);
619 /* Ensure contents are flushed to disk. */
620 void bdrv_flush(BlockDriverState *bs);
622 #define BDRV_TYPE_HD 0
623 #define BDRV_TYPE_CDROM 1
624 #define BDRV_TYPE_FLOPPY 2
625 #define BIOS_ATA_TRANSLATION_AUTO 0
626 #define BIOS_ATA_TRANSLATION_NONE 1
627 #define BIOS_ATA_TRANSLATION_LBA 2
628 #define BIOS_ATA_TRANSLATION_LARGE 3
629 #define BIOS_ATA_TRANSLATION_RECHS 4
631 void bdrv_set_geometry_hint(BlockDriverState *bs,
632 int cyls, int heads, int secs);
633 void bdrv_set_type_hint(BlockDriverState *bs, int type);
634 void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
635 void bdrv_get_geometry_hint(BlockDriverState *bs,
636 int *pcyls, int *pheads, int *psecs);
637 int bdrv_get_type_hint(BlockDriverState *bs);
638 int bdrv_get_translation_hint(BlockDriverState *bs);
639 int bdrv_is_removable(BlockDriverState *bs);
640 int bdrv_is_read_only(BlockDriverState *bs);
641 int bdrv_is_inserted(BlockDriverState *bs);
642 int bdrv_media_changed(BlockDriverState *bs);
643 int bdrv_is_locked(BlockDriverState *bs);
644 void bdrv_set_locked(BlockDriverState *bs, int locked);
645 void bdrv_eject(BlockDriverState *bs, int eject_flag);
646 void bdrv_set_change_cb(BlockDriverState *bs,
647 void (*change_cb)(void *opaque), void *opaque);
648 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
649 void bdrv_info(void);
650 BlockDriverState *bdrv_find(const char *name);
651 void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
652 int bdrv_is_encrypted(BlockDriverState *bs);
653 int bdrv_set_key(BlockDriverState *bs, const char *key);
654 void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
655 void *opaque);
656 const char *bdrv_get_device_name(BlockDriverState *bs);
657 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
658 const uint8_t *buf, int nb_sectors);
659 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
661 void bdrv_get_backing_filename(BlockDriverState *bs,
662 char *filename, int filename_size);
663 int bdrv_snapshot_create(BlockDriverState *bs,
664 QEMUSnapshotInfo *sn_info);
665 int bdrv_snapshot_goto(BlockDriverState *bs,
666 const char *snapshot_id);
667 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
668 int bdrv_snapshot_list(BlockDriverState *bs,
669 QEMUSnapshotInfo **psn_info);
670 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
672 char *get_human_readable_size(char *buf, int buf_size, int64_t size);
673 int path_is_absolute(const char *path);
674 void path_combine(char *dest, int dest_size,
675 const char *base_path,
676 const char *filename);
678 #ifndef QEMU_TOOL
680 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
681 int boot_device,
682 DisplayState *ds, const char **fd_filename, int snapshot,
683 const char *kernel_filename, const char *kernel_cmdline,
684 const char *initrd_filename);
686 typedef struct QEMUMachine {
687 const char *name;
688 const char *desc;
689 QEMUMachineInitFunc *init;
690 struct QEMUMachine *next;
691 } QEMUMachine;
693 int qemu_register_machine(QEMUMachine *m);
695 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
696 typedef void IRQRequestFunc(void *opaque, int level);
698 /* ISA bus */
700 extern target_phys_addr_t isa_mem_base;
702 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
703 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
705 int register_ioport_read(int start, int length, int size,
706 IOPortReadFunc *func, void *opaque);
707 int register_ioport_write(int start, int length, int size,
708 IOPortWriteFunc *func, void *opaque);
709 void isa_unassign_ioport(int start, int length);
711 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
713 /* PCI bus */
715 extern target_phys_addr_t pci_mem_base;
717 typedef struct PCIBus PCIBus;
718 typedef struct PCIDevice PCIDevice;
720 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
721 uint32_t address, uint32_t data, int len);
722 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
723 uint32_t address, int len);
724 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
725 uint32_t addr, uint32_t size, int type);
727 #define PCI_ADDRESS_SPACE_MEM 0x00
728 #define PCI_ADDRESS_SPACE_IO 0x01
729 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
731 typedef struct PCIIORegion {
732 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
733 uint32_t size;
734 uint8_t type;
735 PCIMapIORegionFunc *map_func;
736 } PCIIORegion;
738 #define PCI_ROM_SLOT 6
739 #define PCI_NUM_REGIONS 7
741 #define PCI_DEVICES_MAX 64
743 #define PCI_VENDOR_ID 0x00 /* 16 bits */
744 #define PCI_DEVICE_ID 0x02 /* 16 bits */
745 #define PCI_COMMAND 0x04 /* 16 bits */
746 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
747 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
748 #define PCI_CLASS_DEVICE 0x0a /* Device class */
749 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
750 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
751 #define PCI_MIN_GNT 0x3e /* 8 bits */
752 #define PCI_MAX_LAT 0x3f /* 8 bits */
754 struct PCIDevice {
755 /* PCI config space */
756 uint8_t config[256];
758 /* the following fields are read only */
759 PCIBus *bus;
760 int devfn;
761 char name[64];
762 PCIIORegion io_regions[PCI_NUM_REGIONS];
764 /* do not access the following fields */
765 PCIConfigReadFunc *config_read;
766 PCIConfigWriteFunc *config_write;
767 /* ??? This is a PC-specific hack, and should be removed. */
768 int irq_index;
770 /* Current IRQ levels. Used internally by the generic PCI code. */
771 int irq_state[4];
774 PCIDevice *pci_register_device(PCIBus *bus, const char *name,
775 int instance_size, int devfn,
776 PCIConfigReadFunc *config_read,
777 PCIConfigWriteFunc *config_write);
779 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
780 uint32_t size, int type,
781 PCIMapIORegionFunc *map_func);
783 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
785 uint32_t pci_default_read_config(PCIDevice *d,
786 uint32_t address, int len);
787 void pci_default_write_config(PCIDevice *d,
788 uint32_t address, uint32_t val, int len);
789 void pci_device_save(PCIDevice *s, QEMUFile *f);
790 int pci_device_load(PCIDevice *s, QEMUFile *f);
792 typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
793 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
794 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
795 void *pic, int devfn_min, int nirq);
797 void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
798 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
799 uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
800 int pci_bus_num(PCIBus *s);
801 void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
803 void pci_info(void);
804 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
805 pci_map_irq_fn map_irq, const char *name);
807 /* prep_pci.c */
808 PCIBus *pci_prep_init(void);
810 /* grackle_pci.c */
811 PCIBus *pci_grackle_init(uint32_t base, void *pic);
813 /* unin_pci.c */
814 PCIBus *pci_pmac_init(void *pic);
816 /* apb_pci.c */
817 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
818 void *pic);
820 PCIBus *pci_vpb_init(void *pic, int irq, int realview);
822 /* piix_pci.c */
823 PCIBus *i440fx_init(PCIDevice **pi440fx_state);
824 void i440fx_set_smm(PCIDevice *d, int val);
825 int piix3_init(PCIBus *bus, int devfn);
826 void i440fx_init_memory_mappings(PCIDevice *d);
828 int piix4_init(PCIBus *bus, int devfn);
830 /* openpic.c */
831 typedef struct openpic_t openpic_t;
832 void openpic_set_irq(void *opaque, int n_IRQ, int level);
833 openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
834 CPUState **envp);
836 /* heathrow_pic.c */
837 typedef struct HeathrowPICS HeathrowPICS;
838 void heathrow_pic_set_irq(void *opaque, int num, int level);
839 HeathrowPICS *heathrow_pic_init(int *pmem_index);
841 /* gt64xxx.c */
842 PCIBus *pci_gt64120_init(void *pic);
844 #ifdef HAS_AUDIO
845 struct soundhw {
846 const char *name;
847 const char *descr;
848 int enabled;
849 int isa;
850 union {
851 int (*init_isa) (AudioState *s);
852 int (*init_pci) (PCIBus *bus, AudioState *s);
853 } init;
856 extern struct soundhw soundhw[];
857 #endif
859 /* vga.c */
861 #define VGA_RAM_SIZE (8192 * 1024)
863 struct DisplayState {
864 uint8_t *data;
865 int linesize;
866 int depth;
867 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
868 int width;
869 int height;
870 void *opaque;
872 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
873 void (*dpy_resize)(struct DisplayState *s, int w, int h);
874 void (*dpy_refresh)(struct DisplayState *s);
875 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
878 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
880 s->dpy_update(s, x, y, w, h);
883 static inline void dpy_resize(DisplayState *s, int w, int h)
885 s->dpy_resize(s, w, h);
888 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
889 unsigned long vga_ram_offset, int vga_ram_size);
890 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
891 unsigned long vga_ram_offset, int vga_ram_size,
892 unsigned long vga_bios_offset, int vga_bios_size);
894 /* cirrus_vga.c */
895 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
896 unsigned long vga_ram_offset, int vga_ram_size);
897 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
898 unsigned long vga_ram_offset, int vga_ram_size);
900 /* sdl.c */
901 void sdl_display_init(DisplayState *ds, int full_screen);
903 /* cocoa.m */
904 void cocoa_display_init(DisplayState *ds, int full_screen);
906 /* vnc.c */
907 void vnc_display_init(DisplayState *ds, const char *display);
909 /* ide.c */
910 #define MAX_DISKS 4
912 extern BlockDriverState *bs_table[MAX_DISKS + 1];
914 void isa_ide_init(int iobase, int iobase2, int irq,
915 BlockDriverState *hd0, BlockDriverState *hd1);
916 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
917 int secondary_ide_enabled);
918 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
919 int pmac_ide_init (BlockDriverState **hd_table,
920 SetIRQFunc *set_irq, void *irq_opaque, int irq);
922 /* cdrom.c */
923 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
924 int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
926 /* es1370.c */
927 int es1370_init (PCIBus *bus, AudioState *s);
929 /* sb16.c */
930 int SB16_init (AudioState *s);
932 /* adlib.c */
933 int Adlib_init (AudioState *s);
935 /* gus.c */
936 int GUS_init (AudioState *s);
938 /* dma.c */
939 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
940 int DMA_get_channel_mode (int nchan);
941 int DMA_read_memory (int nchan, void *buf, int pos, int size);
942 int DMA_write_memory (int nchan, void *buf, int pos, int size);
943 void DMA_hold_DREQ (int nchan);
944 void DMA_release_DREQ (int nchan);
945 void DMA_schedule(int nchan);
946 void DMA_run (void);
947 void DMA_init (int high_page_enable);
948 void DMA_register_channel (int nchan,
949 DMA_transfer_handler transfer_handler,
950 void *opaque);
951 /* fdc.c */
952 #define MAX_FD 2
953 extern BlockDriverState *fd_table[MAX_FD];
955 typedef struct fdctrl_t fdctrl_t;
957 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
958 uint32_t io_base,
959 BlockDriverState **fds);
960 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
962 /* ne2000.c */
964 void isa_ne2000_init(int base, int irq, NICInfo *nd);
965 void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
967 /* rtl8139.c */
969 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
971 /* pcnet.c */
973 void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
974 void pcnet_h_reset(void *opaque);
975 void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
978 /* pckbd.c */
980 void kbd_init(void);
982 /* mc146818rtc.c */
984 typedef struct RTCState RTCState;
986 RTCState *rtc_init(int base, int irq);
987 void rtc_set_memory(RTCState *s, int addr, int val);
988 void rtc_set_date(RTCState *s, const struct tm *tm);
990 /* serial.c */
992 typedef struct SerialState SerialState;
993 SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
994 int base, int irq, CharDriverState *chr);
995 SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
996 target_ulong base, int it_shift,
997 int irq, CharDriverState *chr);
999 /* parallel.c */
1001 typedef struct ParallelState ParallelState;
1002 ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1004 /* i8259.c */
1006 typedef struct PicState2 PicState2;
1007 extern PicState2 *isa_pic;
1008 void pic_set_irq(int irq, int level);
1009 void pic_set_irq_new(void *opaque, int irq, int level);
1010 PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
1011 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1012 void *alt_irq_opaque);
1013 int pic_read_irq(PicState2 *s);
1014 void pic_update_irq(PicState2 *s);
1015 uint32_t pic_intack_read(PicState2 *s);
1016 void pic_info(void);
1017 void irq_info(void);
1019 /* APIC */
1020 typedef struct IOAPICState IOAPICState;
1022 int apic_init(CPUState *env);
1023 int apic_get_interrupt(CPUState *env);
1024 IOAPICState *ioapic_init(void);
1025 void ioapic_set_irq(void *opaque, int vector, int level);
1027 /* i8254.c */
1029 #define PIT_FREQ 1193182
1031 typedef struct PITState PITState;
1033 PITState *pit_init(int base, int irq);
1034 void pit_set_gate(PITState *pit, int channel, int val);
1035 int pit_get_gate(PITState *pit, int channel);
1036 int pit_get_initial_count(PITState *pit, int channel);
1037 int pit_get_mode(PITState *pit, int channel);
1038 int pit_get_out(PITState *pit, int channel, int64_t current_time);
1040 /* pcspk.c */
1041 void pcspk_init(PITState *);
1042 int pcspk_audio_init(AudioState *);
1044 /* acpi.c */
1045 extern int acpi_enabled;
1046 void piix4_pm_init(PCIBus *bus, int devfn);
1047 void acpi_bios_init(void);
1049 /* pc.c */
1050 extern QEMUMachine pc_machine;
1051 extern QEMUMachine isapc_machine;
1052 extern int fd_bootchk;
1054 void ioport_set_a20(int enable);
1055 int ioport_get_a20(void);
1057 /* ppc.c */
1058 extern QEMUMachine prep_machine;
1059 extern QEMUMachine core99_machine;
1060 extern QEMUMachine heathrow_machine;
1062 /* mips_r4k.c */
1063 extern QEMUMachine mips_machine;
1065 /* mips_malta.c */
1066 extern QEMUMachine mips_malta_machine;
1068 /* mips_timer.c */
1069 extern void cpu_mips_clock_init(CPUState *);
1070 extern void cpu_mips_irqctrl_init (void);
1072 /* shix.c */
1073 extern QEMUMachine shix_machine;
1075 #ifdef TARGET_PPC
1076 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1077 #endif
1078 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1080 extern CPUWriteMemoryFunc *PPC_io_write[];
1081 extern CPUReadMemoryFunc *PPC_io_read[];
1082 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1084 /* sun4m.c */
1085 extern QEMUMachine sun4m_machine;
1086 void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1088 /* iommu.c */
1089 void *iommu_init(uint32_t addr);
1090 void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1091 uint8_t *buf, int len, int is_write);
1092 static inline void sparc_iommu_memory_read(void *opaque,
1093 target_phys_addr_t addr,
1094 uint8_t *buf, int len)
1096 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1099 static inline void sparc_iommu_memory_write(void *opaque,
1100 target_phys_addr_t addr,
1101 uint8_t *buf, int len)
1103 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1106 /* tcx.c */
1107 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1108 unsigned long vram_offset, int vram_size, int width, int height);
1110 /* slavio_intctl.c */
1111 void *slavio_intctl_init();
1112 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1113 void slavio_pic_info(void *opaque);
1114 void slavio_irq_info(void *opaque);
1115 void slavio_pic_set_irq(void *opaque, int irq, int level);
1116 void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1118 /* loader.c */
1119 int get_image_size(const char *filename);
1120 int load_image(const char *filename, uint8_t *addr);
1121 int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1122 int load_aout(const char *filename, uint8_t *addr);
1124 /* slavio_timer.c */
1125 void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1127 /* slavio_serial.c */
1128 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1129 void slavio_serial_ms_kbd_init(int base, int irq);
1131 /* slavio_misc.c */
1132 void *slavio_misc_init(uint32_t base, int irq);
1133 void slavio_set_power_fail(void *opaque, int power_failing);
1135 /* esp.c */
1136 void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1137 void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1138 void esp_reset(void *opaque);
1140 /* sparc32_dma.c */
1141 void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1142 void *intctl);
1143 void ledma_set_irq(void *opaque, int isr);
1144 void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1145 uint8_t *buf, int len, int do_bswap);
1146 void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1147 uint8_t *buf, int len, int do_bswap);
1148 void espdma_raise_irq(void *opaque);
1149 void espdma_clear_irq(void *opaque);
1150 void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1151 void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1152 void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1153 void *lance_opaque);
1155 /* cs4231.c */
1156 void cs_init(target_phys_addr_t base, int irq, void *intctl);
1158 /* sun4u.c */
1159 extern QEMUMachine sun4u_machine;
1161 /* NVRAM helpers */
1162 #include "hw/m48t59.h"
1164 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1165 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1166 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1167 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1168 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1169 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1170 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1171 const unsigned char *str, uint32_t max);
1172 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1173 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1174 uint32_t start, uint32_t count);
1175 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1176 const unsigned char *arch,
1177 uint32_t RAM_size, int boot_device,
1178 uint32_t kernel_image, uint32_t kernel_size,
1179 const char *cmdline,
1180 uint32_t initrd_image, uint32_t initrd_size,
1181 uint32_t NVRAM_image,
1182 int width, int height, int depth);
1184 /* adb.c */
1186 #define MAX_ADB_DEVICES 16
1188 #define ADB_MAX_OUT_LEN 16
1190 typedef struct ADBDevice ADBDevice;
1192 /* buf = NULL means polling */
1193 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1194 const uint8_t *buf, int len);
1195 typedef int ADBDeviceReset(ADBDevice *d);
1197 struct ADBDevice {
1198 struct ADBBusState *bus;
1199 int devaddr;
1200 int handler;
1201 ADBDeviceRequest *devreq;
1202 ADBDeviceReset *devreset;
1203 void *opaque;
1206 typedef struct ADBBusState {
1207 ADBDevice devices[MAX_ADB_DEVICES];
1208 int nb_devices;
1209 int poll_index;
1210 } ADBBusState;
1212 int adb_request(ADBBusState *s, uint8_t *buf_out,
1213 const uint8_t *buf, int len);
1214 int adb_poll(ADBBusState *s, uint8_t *buf_out);
1216 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1217 ADBDeviceRequest *devreq,
1218 ADBDeviceReset *devreset,
1219 void *opaque);
1220 void adb_kbd_init(ADBBusState *bus);
1221 void adb_mouse_init(ADBBusState *bus);
1223 /* cuda.c */
1225 extern ADBBusState adb_bus;
1226 int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1228 #include "hw/usb.h"
1230 /* usb ports of the VM */
1232 void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1233 usb_attachfn attach);
1235 #define VM_USB_HUB_SIZE 8
1237 void do_usb_add(const char *devname);
1238 void do_usb_del(const char *devname);
1239 void usb_info(void);
1241 /* scsi-disk.c */
1242 enum scsi_reason {
1243 SCSI_REASON_DONE, /* Command complete. */
1244 SCSI_REASON_DATA /* Transfer complete, more data required. */
1247 typedef struct SCSIDevice SCSIDevice;
1248 typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1249 uint32_t arg);
1251 SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1252 int tcq,
1253 scsi_completionfn completion,
1254 void *opaque);
1255 void scsi_disk_destroy(SCSIDevice *s);
1257 int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1258 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1259 layer the completion routine may be called directly by
1260 scsi_{read,write}_data. */
1261 void scsi_read_data(SCSIDevice *s, uint32_t tag);
1262 int scsi_write_data(SCSIDevice *s, uint32_t tag);
1263 void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1264 uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1266 /* lsi53c895a.c */
1267 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1268 void *lsi_scsi_init(PCIBus *bus, int devfn);
1270 /* integratorcp.c */
1271 extern QEMUMachine integratorcp926_machine;
1272 extern QEMUMachine integratorcp1026_machine;
1274 /* versatilepb.c */
1275 extern QEMUMachine versatilepb_machine;
1276 extern QEMUMachine versatileab_machine;
1278 /* realview.c */
1279 extern QEMUMachine realview_machine;
1281 /* ps2.c */
1282 void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1283 void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1284 void ps2_write_mouse(void *, int val);
1285 void ps2_write_keyboard(void *, int val);
1286 uint32_t ps2_read_data(void *);
1287 void ps2_queue(void *, int b);
1288 void ps2_keyboard_set_translation(void *opaque, int mode);
1290 /* smc91c111.c */
1291 void smc91c111_init(NICInfo *, uint32_t, void *, int);
1293 /* pl110.c */
1294 void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1296 /* pl011.c */
1297 void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1299 /* pl050.c */
1300 void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1302 /* pl080.c */
1303 void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1305 /* pl190.c */
1306 void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1308 /* arm-timer.c */
1309 void sp804_init(uint32_t base, void *pic, int irq);
1310 void icp_pit_init(uint32_t base, void *pic, int irq);
1312 /* arm_sysctl.c */
1313 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1315 /* arm_gic.c */
1316 void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1318 /* arm_boot.c */
1320 void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
1321 const char *kernel_cmdline, const char *initrd_filename,
1322 int board_id);
1324 /* sh7750.c */
1325 struct SH7750State;
1327 struct SH7750State *sh7750_init(CPUState * cpu);
1329 typedef struct {
1330 /* The callback will be triggered if any of the designated lines change */
1331 uint16_t portamask_trigger;
1332 uint16_t portbmask_trigger;
1333 /* Return 0 if no action was taken */
1334 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1335 uint16_t * periph_pdtra,
1336 uint16_t * periph_portdira,
1337 uint16_t * periph_pdtrb,
1338 uint16_t * periph_portdirb);
1339 } sh7750_io_device;
1341 int sh7750_register_io_device(struct SH7750State *s,
1342 sh7750_io_device * device);
1343 /* tc58128.c */
1344 int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1346 /* NOR flash devices */
1347 typedef struct pflash_t pflash_t;
1349 pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1350 BlockDriverState *bs,
1351 target_ulong sector_len, int nb_blocs, int width,
1352 uint16_t id0, uint16_t id1,
1353 uint16_t id2, uint16_t id3);
1355 #endif /* defined(QEMU_TOOL) */
1357 /* monitor.c */
1358 void monitor_init(CharDriverState *hd, int show_banner);
1359 void term_puts(const char *str);
1360 void term_vprintf(const char *fmt, va_list ap);
1361 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1362 void term_print_filename(const char *filename);
1363 void term_flush(void);
1364 void term_print_help(void);
1365 void monitor_readline(const char *prompt, int is_password,
1366 char *buf, int buf_size);
1368 /* readline.c */
1369 typedef void ReadLineFunc(void *opaque, const char *str);
1371 extern int completion_index;
1372 void add_completion(const char *str);
1373 void readline_handle_byte(int ch);
1374 void readline_find_completion(const char *cmdline);
1375 const char *readline_get_history(unsigned int index);
1376 void readline_start(const char *prompt, int is_password,
1377 ReadLineFunc *readline_func, void *opaque);
1379 void kqemu_record_dump(void);
1381 #endif /* VL_H */