hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  33
  34 #define KERNEL_LOAD_ADDR     0x00100000
  35 #define INITRD_LOAD_ADDR     0x00600000
  36 #define KERNEL_PARAMS_ADDR   0x00090000
  37 #define KERNEL_CMDLINE_ADDR  0x00099000
  38
  39 static fdctrl_t *floppy_controller;
  40 static RTCState *rtc_state;
  41 static PITState *pit;
  42 static IOAPICState *ioapic;
  43 static PCIDevice *i440fx_state;
  44
  45 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  46 {
  47 }
  48
  49 /* MSDOS compatibility mode FPU exception support */
  50 /* XXX: add IGNNE support */
  51 void cpu_set_ferr(CPUX86State *s)
  52 {
  53     pic_set_irq(13, 1);
  54 }
  55
  56 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  57 {
  58     pic_set_irq(13, 0);
  59 }
  60
  61 /* TSC handling */
  62 uint64_t cpu_get_tsc(CPUX86State *env)
  63 {
  64     /* Note: when using kqemu, it is more logical to return the host TSC
  65        because kqemu does not trap the RDTSC instruction for
  66        performance reasons */
  67 #if USE_KQEMU
  68     if (env->kqemu_enabled) {
  69         return cpu_get_real_ticks();
  70     } else
  71 #endif
  72     {
  73         return cpu_get_ticks();
  74     }
  75 }
  76
  77 /* SMM support */
  78 void cpu_smm_update(CPUState *env)
  79 {
  80     if (i440fx_state && env == first_cpu)
  81         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
  82 }
  83
  84
  85 /* IRQ handling */
  86 int cpu_get_pic_interrupt(CPUState *env)
  87 {
  88     int intno;
  89
  90     intno = apic_get_interrupt(env);
  91     if (intno >= 0) {
  92         /* set irq request if a PIC irq is still pending */
  93         /* XXX: improve that */
  94         pic_update_irq(isa_pic);
  95         return intno;
  96     }
  97     /* read the irq from the PIC */
  98     intno = pic_read_irq(isa_pic);
  99     return intno;
 100 }
 101
 102 static void pic_irq_request(void *opaque, int level)
 103 {
 104     CPUState *env = opaque;
 105     if (level)
 106         cpu_interrupt(env, CPU_INTERRUPT_HARD);
 107     else
 108         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 109 }
 110
 111 /* PC cmos mappings */
 112
 113 #define REG_EQUIPMENT_BYTE          0x14
 114
 115 static int cmos_get_fd_drive_type(int fd0)
 116 {
 117     int val;
 118
 119     switch (fd0) {
 120     case 0:
 121         /* 1.44 Mb 3"5 drive */
 122         val = 4;
 123         break;
 124     case 1:
 125         /* 2.88 Mb 3"5 drive */
 126         val = 5;
 127         break;
 128     case 2:
 129         /* 1.2 Mb 5"5 drive */
 130         val = 2;
 131         break;
 132     default:
 133         val = 0;
 134         break;
 135     }
 136     return val;
 137 }
 138
 139 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 140 {
 141     RTCState *s = rtc_state;
 142     int cylinders, heads, sectors;
 143     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 144     rtc_set_memory(s, type_ofs, 47);
 145     rtc_set_memory(s, info_ofs, cylinders);
 146     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 147     rtc_set_memory(s, info_ofs + 2, heads);
 148     rtc_set_memory(s, info_ofs + 3, 0xff);
 149     rtc_set_memory(s, info_ofs + 4, 0xff);
 150     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 151     rtc_set_memory(s, info_ofs + 6, cylinders);
 152     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 153     rtc_set_memory(s, info_ofs + 8, sectors);
 154 }
 155
 156 /* hd_table must contain 4 block drivers */
 157 static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
 158 {
 159     RTCState *s = rtc_state;
 160     int val;
 161     int fd0, fd1, nb;
 162     int i;
 163
 164     /* various important CMOS locations needed by PC/Bochs bios */
 165
 166     /* memory size */
 167     val = 640; /* base memory in K */
 168     rtc_set_memory(s, 0x15, val);
 169     rtc_set_memory(s, 0x16, val >> 8);
 170
 171     val = (ram_size / 1024) - 1024;
 172     if (val > 65535)
 173         val = 65535;
 174     rtc_set_memory(s, 0x17, val);
 175     rtc_set_memory(s, 0x18, val >> 8);
 176     rtc_set_memory(s, 0x30, val);
 177     rtc_set_memory(s, 0x31, val >> 8);
 178
 179     if (ram_size > (16 * 1024 * 1024))
 180         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 181     else
 182         val = 0;
 183     if (val > 65535)
 184         val = 65535;
 185     rtc_set_memory(s, 0x34, val);
 186     rtc_set_memory(s, 0x35, val >> 8);
 187
 188     switch(boot_device) {
 189     case 'a':
 190     case 'b':
 191         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 192         if (!fd_bootchk)
 193             rtc_set_memory(s, 0x38, 0x01); /* disable signature check */
 194         break;
 195     default:
 196     case 'c':
 197         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 198         break;
 199     case 'd':
 200         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 201         break;
 202     }
 203
 204     /* floppy type */
 205
 206     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 207     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 208
 209     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 210     rtc_set_memory(s, 0x10, val);
 211
 212     val = 0;
 213     nb = 0;
 214     if (fd0 < 3)
 215         nb++;
 216     if (fd1 < 3)
 217         nb++;
 218     switch (nb) {
 219     case 0:
 220         break;
 221     case 1:
 222         val |= 0x01; /* 1 drive, ready for boot */
 223         break;
 224     case 2:
 225         val |= 0x41; /* 2 drives, ready for boot */
 226         break;
 227     }
 228     val |= 0x02; /* FPU is there */
 229     val |= 0x04; /* PS/2 mouse installed */
 230     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 231
 232     /* hard drives */
 233
 234     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 235     if (hd_table[0])
 236         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 237     if (hd_table[1])
 238         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 239
 240     val = 0;
 241     for (i = 0; i < 4; i++) {
 242         if (hd_table[i]) {
 243             int cylinders, heads, sectors, translation;
 244             /* NOTE: bdrv_get_geometry_hint() returns the physical
 245                 geometry.  It is always such that: 1 <= sects <= 63, 1
 246                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 247                 geometry can be different if a translation is done. */
 248             translation = bdrv_get_translation_hint(hd_table[i]);
 249             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 250                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 251                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 252                     /* No translation. */
 253                     translation = 0;
 254                 } else {
 255                     /* LBA translation. */
 256                     translation = 1;
 257                 }
 258             } else {
 259                 translation--;
 260             }
 261             val |= translation << (i * 2);
 262         }
 263     }
 264     rtc_set_memory(s, 0x39, val);
 265 }
 266
 267 void ioport_set_a20(int enable)
 268 {
 269     /* XXX: send to all CPUs ? */
 270     cpu_x86_set_a20(first_cpu, enable);
 271 }
 272
 273 int ioport_get_a20(void)
 274 {
 275     return ((first_cpu->a20_mask >> 20) & 1);
 276 }
 277
 278 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 279 {
 280     ioport_set_a20((val >> 1) & 1);
 281     /* XXX: bit 0 is fast reset */
 282 }
 283
 284 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 285 {
 286     return ioport_get_a20() << 1;
 287 }
 288
 289 /***********************************************************/
 290 /* Bochs BIOS debug ports */
 291
 292 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 293 {
 294     static const char shutdown_str[8] = "Shutdown";
 295     static int shutdown_index = 0;
 296
 297     switch(addr) {
 298         /* Bochs BIOS messages */
 299     case 0x400:
 300     case 0x401:
 301         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 302         exit(1);
 303     case 0x402:
 304     case 0x403:
 305 #ifdef DEBUG_BIOS
 306         fprintf(stderr, "%c", val);
 307 #endif
 308         break;
 309     case 0x8900:
 310         /* same as Bochs power off */
 311         if (val == shutdown_str[shutdown_index]) {
 312             shutdown_index++;
 313             if (shutdown_index == 8) {
 314                 shutdown_index = 0;
 315                 qemu_system_shutdown_request();
 316             }
 317         } else {
 318             shutdown_index = 0;
 319         }
 320         break;
 321
 322         /* LGPL'ed VGA BIOS messages */
 323     case 0x501:
 324     case 0x502:
 325         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 326         exit(1);
 327     case 0x500:
 328     case 0x503:
 329 #ifdef DEBUG_BIOS
 330         fprintf(stderr, "%c", val);
 331 #endif
 332         break;
 333     }
 334 }
 335
 336 void bochs_bios_init(void)
 337 {
 338     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 339     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 340     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 341     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 342     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 343
 344     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 345     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 346     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 347     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 348 }
 349
 350
 351 int load_kernel(const char *filename, uint8_t *addr,
 352                 uint8_t *real_addr)
 353 {
 354     int fd, size;
 355     int setup_sects;
 356
 357     fd = open(filename, O_RDONLY | O_BINARY);
 358     if (fd < 0)
 359         return -1;
 360
 361     /* load 16 bit code */
 362     if (read(fd, real_addr, 512) != 512)
 363         goto fail;
 364     setup_sects = real_addr[0x1F1];
 365     if (!setup_sects)
 366         setup_sects = 4;
 367     if (read(fd, real_addr + 512, setup_sects * 512) !=
 368         setup_sects * 512)
 369         goto fail;
 370
 371     /* load 32 bit code */
 372     size = read(fd, addr, 16 * 1024 * 1024);
 373     if (size < 0)
 374         goto fail;
 375     close(fd);
 376     return size;
 377  fail:
 378     close(fd);
 379     return -1;
 380 }
 381
 382 static void main_cpu_reset(void *opaque)
 383 {
 384     CPUState *env = opaque;
 385     cpu_reset(env);
 386 }
 387
 388 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 389 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 390 static const int ide_irq[2] = { 14, 15 };
 391
 392 #define NE2000_NB_MAX 6
 393
 394 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 395 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 396
 397 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 398 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 399
 400 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 401 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 402
 403 #ifdef HAS_AUDIO
 404 static void audio_init (PCIBus *pci_bus)
 405 {
 406     struct soundhw *c;
 407     int audio_enabled = 0;
 408
 409     for (c = soundhw; !audio_enabled && c->name; ++c) {
 410         audio_enabled = c->enabled;
 411     }
 412
 413     if (audio_enabled) {
 414         AudioState *s;
 415
 416         s = AUD_init ();
 417         if (s) {
 418             for (c = soundhw; c->name; ++c) {
 419                 if (c->enabled) {
 420                     if (c->isa) {
 421                         c->init.init_isa (s);
 422                     }
 423                     else {
 424                         if (pci_bus) {
 425                             c->init.init_pci (pci_bus, s);
 426                         }
 427                     }
 428                 }
 429             }
 430         }
 431     }
 432 }
 433 #endif
 434
 435 static void pc_init_ne2k_isa(NICInfo *nd)
 436 {
 437     static int nb_ne2k = 0;
 438
 439     if (nb_ne2k == NE2000_NB_MAX)
 440         return;
 441     isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
 442     nb_ne2k++;
 443 }
 444
 445 /* PC hardware initialisation */
 446 static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
 447                      DisplayState *ds, const char **fd_filename, int snapshot,
 448                      const char *kernel_filename, const char *kernel_cmdline,
 449                      const char *initrd_filename,
 450                      int pci_enabled)
 451 {
 452     char buf[1024];
 453     int ret, linux_boot, initrd_size, i;
 454     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 455     int bios_size, isa_bios_size, vga_bios_size;
 456     PCIBus *pci_bus;
 457     int piix3_devfn = -1;
 458     CPUState *env;
 459     NICInfo *nd;
 460
 461     linux_boot = (kernel_filename != NULL);
 462
 463     /* init CPUs */
 464     for(i = 0; i < smp_cpus; i++) {
 465         env = cpu_init();
 466         if (i != 0)
 467             env->hflags |= HF_HALTED_MASK;
 468         if (smp_cpus > 1) {
 469             /* XXX: enable it in all cases */
 470             env->cpuid_features |= CPUID_APIC;
 471         }
 472         register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
 473         qemu_register_reset(main_cpu_reset, env);
 474         if (pci_enabled) {
 475             apic_init(env);
 476         }
 477     }
 478
 479     /* allocate RAM */
 480     ram_addr = qemu_ram_alloc(ram_size);
 481     cpu_register_physical_memory(0, ram_size, ram_addr);
 482
 483     /* allocate VGA RAM */
 484     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 485
 486     /* BIOS load */
 487     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 488     bios_size = get_image_size(buf);
 489     if (bios_size <= 0 ||
 490         (bios_size % 65536) != 0) {
 491         goto bios_error;
 492     }
 493     bios_offset = qemu_ram_alloc(bios_size);
 494     ret = load_image(buf, phys_ram_base + bios_offset);
 495     if (ret != bios_size) {
 496     bios_error:
 497         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 498         exit(1);
 499     }
 500
 501     /* VGA BIOS load */
 502     if (cirrus_vga_enabled) {
 503         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 504     } else {
 505         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 506     }
 507     vga_bios_size = get_image_size(buf);
 508     if (vga_bios_size <= 0 || vga_bios_size > 65536)
 509         goto vga_bios_error;
 510     vga_bios_offset = qemu_ram_alloc(65536);
 511
 512     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 513     if (ret != vga_bios_size) {
 514     vga_bios_error:
 515         fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 516         exit(1);
 517     }
 518
 519     /* setup basic memory access */
 520     cpu_register_physical_memory(0xc0000, 0x10000,
 521                                  vga_bios_offset | IO_MEM_ROM);
 522
 523     /* map the last 128KB of the BIOS in ISA space */
 524     isa_bios_size = bios_size;
 525     if (isa_bios_size > (128 * 1024))
 526         isa_bios_size = 128 * 1024;
 527     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 528                                  IO_MEM_UNASSIGNED);
 529     cpu_register_physical_memory(0x100000 - isa_bios_size,
 530                                  isa_bios_size,
 531                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 532
 533     {
 534         ram_addr_t option_rom_offset;
 535         int size, offset;
 536
 537         offset = 0;
 538         for (i = 0; i < nb_option_roms; i++) {
 539             size = get_image_size(option_rom[i]);
 540             if (size < 0) {
 541                 fprintf(stderr, "Could not load option rom '%s'\n",
 542                         option_rom[i]);
 543                 exit(1);
 544             }
 545             if (size > (0x10000 - offset))
 546                 goto option_rom_error;
 547             option_rom_offset = qemu_ram_alloc(size);
 548             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 549             if (ret != size) {
 550             option_rom_error:
 551                 fprintf(stderr, "Too many option ROMS\n");
 552                 exit(1);
 553             }
 554             size = (size + 4095) & ~4095;
 555             cpu_register_physical_memory(0xd0000 + offset,
 556                                          size, option_rom_offset | IO_MEM_ROM);
 557             offset += size;
 558         }
 559     }
 560
 561     /* map all the bios at the top of memory */
 562     cpu_register_physical_memory((uint32_t)(-bios_size),
 563                                  bios_size, bios_offset | IO_MEM_ROM);
 564
 565     bochs_bios_init();
 566
 567     if (linux_boot) {
 568         uint8_t bootsect[512];
 569         uint8_t old_bootsect[512];
 570
 571         if (bs_table[0] == NULL) {
 572             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 573             exit(1);
 574         }
 575         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 576         ret = load_image(buf, bootsect);
 577         if (ret != sizeof(bootsect)) {
 578             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 579                     buf);
 580             exit(1);
 581         }
 582
 583         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 584             /* copy the MSDOS partition table */
 585             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 586         }
 587
 588         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 589
 590         /* now we can load the kernel */
 591         ret = load_kernel(kernel_filename,
 592                           phys_ram_base + KERNEL_LOAD_ADDR,
 593                           phys_ram_base + KERNEL_PARAMS_ADDR);
 594         if (ret < 0) {
 595             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 596                     kernel_filename);
 597             exit(1);
 598         }
 599
 600         /* load initrd */
 601         initrd_size = 0;
 602         if (initrd_filename) {
 603             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 604             if (initrd_size < 0) {
 605                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 606                         initrd_filename);
 607                 exit(1);
 608             }
 609         }
 610         if (initrd_size > 0) {
 611             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 612             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 613         }
 614         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 615                 kernel_cmdline);
 616         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 617         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 618                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 619         /* loader type */
 620         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 621     }
 622
 623     if (pci_enabled) {
 624         pci_bus = i440fx_init(&i440fx_state);
 625         piix3_devfn = piix3_init(pci_bus, -1);
 626     } else {
 627         pci_bus = NULL;
 628     }
 629
 630     /* init basic PC hardware */
 631     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 632
 633     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 634
 635     if (cirrus_vga_enabled) {
 636         if (pci_enabled) {
 637             pci_cirrus_vga_init(pci_bus,
 638                                 ds, phys_ram_base + vga_ram_addr,
 639                                 vga_ram_addr, vga_ram_size);
 640         } else {
 641             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 642                                 vga_ram_addr, vga_ram_size);
 643         }
 644     } else {
 645         if (pci_enabled) {
 646             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 647                          vga_ram_addr, vga_ram_size, 0, 0);
 648         } else {
 649             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 650                          vga_ram_addr, vga_ram_size);
 651         }
 652     }
 653
 654     rtc_state = rtc_init(0x70, 8);
 655
 656     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 657     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 658
 659     if (pci_enabled) {
 660         ioapic = ioapic_init();
 661     }
 662     isa_pic = pic_init(pic_irq_request, first_cpu);
 663     pit = pit_init(0x40, 0);
 664     pcspk_init(pit);
 665     if (pci_enabled) {
 666         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 667     }
 668
 669     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 670         if (serial_hds[i]) {
 671             serial_init(&pic_set_irq_new, isa_pic,
 672                         serial_io[i], serial_irq[i], serial_hds[i]);
 673         }
 674     }
 675
 676     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 677         if (parallel_hds[i]) {
 678             parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
 679         }
 680     }
 681
 682     for(i = 0; i < nb_nics; i++) {
 683         nd = &nd_table[i];
 684         if (!nd->model) {
 685             if (pci_enabled) {
 686                 nd->model = "ne2k_pci";
 687             } else {
 688                 nd->model = "ne2k_isa";
 689             }
 690         }
 691         if (strcmp(nd->model, "ne2k_isa") == 0) {
 692             pc_init_ne2k_isa(nd);
 693         } else if (pci_enabled) {
 694             pci_nic_init(pci_bus, nd, -1);
 695         } else {
 696             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 697             exit(1);
 698         }
 699     }
 700
 701     if (pci_enabled) {
 702         pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
 703     } else {
 704         for(i = 0; i < 2; i++) {
 705             isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 706                          bs_table[2 * i], bs_table[2 * i + 1]);
 707         }
 708     }
 709
 710     kbd_init();
 711     DMA_init(0);
 712 #ifdef HAS_AUDIO
 713     audio_init(pci_enabled ? pci_bus : NULL);
 714 #endif
 715
 716     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 717
 718     cmos_init(ram_size, boot_device, bs_table);
 719
 720     if (pci_enabled && usb_enabled) {
 721         usb_uhci_init(pci_bus, piix3_devfn + 2);
 722     }
 723
 724     if (pci_enabled && acpi_enabled) {
 725         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 726         piix4_pm_init(pci_bus, piix3_devfn + 3);
 727         for (i = 0; i < 8; i++) {
 728             SMBusDevice *eeprom = smbus_eeprom_device_init(0x50 + i,
 729                 eeprom_buf + (i * 256));
 730             piix4_smbus_register_device(eeprom, 0x50 + i);
 731         }
 732     }
 733
 734     if (i440fx_state) {
 735         i440fx_init_memory_mappings(i440fx_state);
 736     }
 737 #if 0
 738     /* ??? Need to figure out some way for the user to
 739        specify SCSI devices.  */
 740     if (pci_enabled) {
 741         void *scsi;
 742         BlockDriverState *bdrv;
 743
 744         scsi = lsi_scsi_init(pci_bus, -1);
 745         bdrv = bdrv_new("scsidisk");
 746         bdrv_open(bdrv, "scsi_disk.img", 0);
 747         lsi_scsi_attach(scsi, bdrv, -1);
 748         bdrv = bdrv_new("scsicd");
 749         bdrv_open(bdrv, "scsi_cd.iso", 0);
 750         bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
 751         lsi_scsi_attach(scsi, bdrv, -1);
 752     }
 753 #endif
 754 }
 755
 756 static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
 757                         DisplayState *ds, const char **fd_filename,
 758                         int snapshot,
 759                         const char *kernel_filename,
 760                         const char *kernel_cmdline,
 761                         const char *initrd_filename,
 762                         const char *cpu_model)
 763 {
 764     pc_init1(ram_size, vga_ram_size, boot_device,
 765              ds, fd_filename, snapshot,
 766              kernel_filename, kernel_cmdline,
 767              initrd_filename, 1);
 768 }
 769
 770 static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
 771                         DisplayState *ds, const char **fd_filename,
 772                         int snapshot,
 773                         const char *kernel_filename,
 774                         const char *kernel_cmdline,
 775                         const char *initrd_filename,
 776                         const char *cpu_model)
 777 {
 778     pc_init1(ram_size, vga_ram_size, boot_device,
 779              ds, fd_filename, snapshot,
 780              kernel_filename, kernel_cmdline,
 781              initrd_filename, 0);
 782 }
 783
 784 QEMUMachine pc_machine = {
 785     "pc",
 786     "Standard PC",
 787     pc_init_pci,
 788 };
 789
 790 QEMUMachine isapc_machine = {
 791     "isapc",
 792     "ISA-only PC",
 793     pc_init_isa,
 794 };