Remove duplicate i2c.o.
[qemu/mini2440.git] / translate-all.c
blobc42fedf7f6946d18782432ed9723d79c2bdefb72
1 /*
2 * Host code generation
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <stdarg.h>
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <string.h>
24 #include <inttypes.h>
26 #include "config.h"
28 #define NO_CPU_IO_DEFS
29 #include "cpu.h"
30 #include "exec-all.h"
31 #include "disas.h"
33 extern int dyngen_code(uint8_t *gen_code_buf,
34 uint16_t *label_offsets, uint16_t *jmp_offsets,
35 const uint16_t *opc_buf, const uint32_t *opparam_buf, const long *gen_labels);
37 enum {
38 #define DEF(s, n, copy_size) INDEX_op_ ## s,
39 #include "opc.h"
40 #undef DEF
41 NB_OPS,
44 uint16_t gen_opc_buf[OPC_BUF_SIZE];
45 uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
46 long gen_labels[OPC_BUF_SIZE];
47 int nb_gen_labels;
49 target_ulong gen_opc_pc[OPC_BUF_SIZE];
50 uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
51 #if defined(TARGET_I386)
52 uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
53 #elif defined(TARGET_SPARC)
54 target_ulong gen_opc_npc[OPC_BUF_SIZE];
55 target_ulong gen_opc_jump_pc[2];
56 #elif defined(TARGET_MIPS)
57 uint32_t gen_opc_hflags[OPC_BUF_SIZE];
58 #endif
60 int code_copy_enabled = 1;
62 #ifdef DEBUG_DISAS
63 static const char *op_str[] = {
64 #define DEF(s, n, copy_size) #s,
65 #include "opc.h"
66 #undef DEF
69 static uint8_t op_nb_args[] = {
70 #define DEF(s, n, copy_size) n,
71 #include "opc.h"
72 #undef DEF
75 static const unsigned short opc_copy_size[] = {
76 #define DEF(s, n, copy_size) copy_size,
77 #include "opc.h"
78 #undef DEF
81 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf)
83 const uint16_t *opc_ptr;
84 const uint32_t *opparam_ptr;
85 int c, n, i;
87 opc_ptr = opc_buf;
88 opparam_ptr = opparam_buf;
89 for(;;) {
90 c = *opc_ptr++;
91 n = op_nb_args[c];
92 fprintf(logfile, "0x%04x: %s",
93 (int)(opc_ptr - opc_buf - 1), op_str[c]);
94 for(i = 0; i < n; i++) {
95 fprintf(logfile, " 0x%x", opparam_ptr[i]);
97 fprintf(logfile, "\n");
98 if (c == INDEX_op_end)
99 break;
100 opparam_ptr += n;
104 #endif
106 /* compute label info */
107 static void dyngen_labels(long *gen_labels, int nb_gen_labels,
108 uint8_t *gen_code_buf, const uint16_t *opc_buf)
110 uint8_t *gen_code_ptr;
111 int c, i;
112 unsigned long gen_code_addr[OPC_BUF_SIZE];
114 if (nb_gen_labels == 0)
115 return;
116 /* compute the address of each op code */
118 gen_code_ptr = gen_code_buf;
119 i = 0;
120 for(;;) {
121 c = opc_buf[i];
122 gen_code_addr[i] =(unsigned long)gen_code_ptr;
123 if (c == INDEX_op_end)
124 break;
125 gen_code_ptr += opc_copy_size[c];
126 i++;
129 /* compute the address of each label */
130 for(i = 0; i < nb_gen_labels; i++) {
131 gen_labels[i] = gen_code_addr[gen_labels[i]];
135 /* return non zero if the very first instruction is invalid so that
136 the virtual CPU can trigger an exception.
138 '*gen_code_size_ptr' contains the size of the generated code (host
139 code).
141 int cpu_gen_code(CPUState *env, TranslationBlock *tb,
142 int max_code_size, int *gen_code_size_ptr)
144 uint8_t *gen_code_buf;
145 int gen_code_size;
147 if (gen_intermediate_code(env, tb) < 0)
148 return -1;
150 /* generate machine code */
151 tb->tb_next_offset[0] = 0xffff;
152 tb->tb_next_offset[1] = 0xffff;
153 gen_code_buf = tb->tc_ptr;
154 #ifdef USE_DIRECT_JUMP
155 /* the following two entries are optional (only used for string ops) */
156 tb->tb_jmp_offset[2] = 0xffff;
157 tb->tb_jmp_offset[3] = 0xffff;
158 #endif
159 dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf);
161 gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset,
162 #ifdef USE_DIRECT_JUMP
163 tb->tb_jmp_offset,
164 #else
165 NULL,
166 #endif
167 gen_opc_buf, gen_opparam_buf, gen_labels);
168 *gen_code_size_ptr = gen_code_size;
169 #ifdef DEBUG_DISAS
170 if (loglevel & CPU_LOG_TB_OUT_ASM) {
171 fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
172 disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
173 fprintf(logfile, "\n");
174 fflush(logfile);
176 #endif
177 return 0;
180 /* The cpu state corresponding to 'searched_pc' is restored.
182 int cpu_restore_state(TranslationBlock *tb,
183 CPUState *env, unsigned long searched_pc,
184 void *puc)
186 int j, c;
187 unsigned long tc_ptr;
188 uint16_t *opc_ptr;
190 if (gen_intermediate_code_pc(env, tb) < 0)
191 return -1;
193 /* find opc index corresponding to search_pc */
194 tc_ptr = (unsigned long)tb->tc_ptr;
195 if (searched_pc < tc_ptr)
196 return -1;
197 j = 0;
198 opc_ptr = gen_opc_buf;
199 for(;;) {
200 c = *opc_ptr;
201 if (c == INDEX_op_end)
202 return -1;
203 tc_ptr += opc_copy_size[c];
204 if (searched_pc < tc_ptr)
205 break;
206 opc_ptr++;
208 j = opc_ptr - gen_opc_buf;
209 /* now find start of instruction before */
210 while (gen_opc_instr_start[j] == 0)
211 j--;
212 #if defined(TARGET_I386)
214 int cc_op;
215 #ifdef DEBUG_DISAS
216 if (loglevel & CPU_LOG_TB_OP) {
217 int i;
218 fprintf(logfile, "RESTORE:\n");
219 for(i=0;i<=j; i++) {
220 if (gen_opc_instr_start[i]) {
221 fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
224 fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
225 searched_pc, j, gen_opc_pc[j] - tb->cs_base,
226 (uint32_t)tb->cs_base);
228 #endif
229 env->eip = gen_opc_pc[j] - tb->cs_base;
230 cc_op = gen_opc_cc_op[j];
231 if (cc_op != CC_OP_DYNAMIC)
232 env->cc_op = cc_op;
234 #elif defined(TARGET_ARM)
235 env->regs[15] = gen_opc_pc[j];
236 #elif defined(TARGET_SPARC)
238 target_ulong npc;
239 env->pc = gen_opc_pc[j];
240 npc = gen_opc_npc[j];
241 if (npc == 1) {
242 /* dynamic NPC: already stored */
243 } else if (npc == 2) {
244 target_ulong t2 = (target_ulong)puc;
245 /* jump PC: use T2 and the jump targets of the translation */
246 if (t2)
247 env->npc = gen_opc_jump_pc[0];
248 else
249 env->npc = gen_opc_jump_pc[1];
250 } else {
251 env->npc = npc;
254 #elif defined(TARGET_PPC)
256 int type;
257 /* for PPC, we need to look at the micro operation to get the
258 access type */
259 env->nip = gen_opc_pc[j];
260 switch(c) {
261 #if defined(CONFIG_USER_ONLY)
262 #define CASE3(op)\
263 case INDEX_op_ ## op ## _raw
264 #else
265 #define CASE3(op)\
266 case INDEX_op_ ## op ## _user:\
267 case INDEX_op_ ## op ## _kernel
268 #endif
270 CASE3(stfd):
271 CASE3(stfs):
272 CASE3(lfd):
273 CASE3(lfs):
274 type = ACCESS_FLOAT;
275 break;
276 CASE3(lwarx):
277 type = ACCESS_RES;
278 break;
279 CASE3(stwcx):
280 type = ACCESS_RES;
281 break;
282 CASE3(eciwx):
283 CASE3(ecowx):
284 type = ACCESS_EXT;
285 break;
286 default:
287 type = ACCESS_INT;
288 break;
290 env->access_type = type;
292 #elif defined(TARGET_M68K)
293 env->pc = gen_opc_pc[j];
294 #elif defined(TARGET_MIPS)
295 env->PC[env->current_tc] = gen_opc_pc[j];
296 env->hflags &= ~MIPS_HFLAG_BMASK;
297 env->hflags |= gen_opc_hflags[j];
298 #elif defined(TARGET_ALPHA)
299 env->pc = gen_opc_pc[j];
300 #endif
301 return 0;