SH bugfixes.
[qemu/mini2440.git] / gdbstub.c
blob3dcaa4c9cd79d039edd3ee896aa71007d253a9ba
1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #endif
35 #include "qemu_socket.h"
36 #ifdef _WIN32
37 /* XXX: these constants may be independent of the host ones even for Unix */
38 #ifndef SIGTRAP
39 #define SIGTRAP 5
40 #endif
41 #ifndef SIGINT
42 #define SIGINT 2
43 #endif
44 #else
45 #include <signal.h>
46 #endif
48 //#define DEBUG_GDB
50 enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
56 /* XXX: This is not thread safe. Do we care? */
57 static int gdbserver_fd = -1;
59 typedef struct GDBState {
60 CPUState *env; /* current CPU */
61 enum RSState state; /* parsing state */
62 int fd;
63 char line_buf[4096];
64 int line_buf_index;
65 int line_csum;
66 #ifdef CONFIG_USER_ONLY
67 int running_state;
68 #endif
69 } GDBState;
71 #ifdef CONFIG_USER_ONLY
72 /* XXX: remove this hack. */
73 static GDBState gdbserver_state;
74 #endif
76 static int get_char(GDBState *s)
78 uint8_t ch;
79 int ret;
81 for(;;) {
82 ret = recv(s->fd, &ch, 1, 0);
83 if (ret < 0) {
84 if (errno != EINTR && errno != EAGAIN)
85 return -1;
86 } else if (ret == 0) {
87 return -1;
88 } else {
89 break;
92 return ch;
95 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
97 int ret;
99 while (len > 0) {
100 ret = send(s->fd, buf, len, 0);
101 if (ret < 0) {
102 if (errno != EINTR && errno != EAGAIN)
103 return;
104 } else {
105 buf += ret;
106 len -= ret;
111 static inline int fromhex(int v)
113 if (v >= '0' && v <= '9')
114 return v - '0';
115 else if (v >= 'A' && v <= 'F')
116 return v - 'A' + 10;
117 else if (v >= 'a' && v <= 'f')
118 return v - 'a' + 10;
119 else
120 return 0;
123 static inline int tohex(int v)
125 if (v < 10)
126 return v + '0';
127 else
128 return v - 10 + 'a';
131 static void memtohex(char *buf, const uint8_t *mem, int len)
133 int i, c;
134 char *q;
135 q = buf;
136 for(i = 0; i < len; i++) {
137 c = mem[i];
138 *q++ = tohex(c >> 4);
139 *q++ = tohex(c & 0xf);
141 *q = '\0';
144 static void hextomem(uint8_t *mem, const char *buf, int len)
146 int i;
148 for(i = 0; i < len; i++) {
149 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
150 buf += 2;
154 /* return -1 if error, 0 if OK */
155 static int put_packet(GDBState *s, char *buf)
157 char buf1[3];
158 int len, csum, ch, i;
160 #ifdef DEBUG_GDB
161 printf("reply='%s'\n", buf);
162 #endif
164 for(;;) {
165 buf1[0] = '$';
166 put_buffer(s, buf1, 1);
167 len = strlen(buf);
168 put_buffer(s, buf, len);
169 csum = 0;
170 for(i = 0; i < len; i++) {
171 csum += buf[i];
173 buf1[0] = '#';
174 buf1[1] = tohex((csum >> 4) & 0xf);
175 buf1[2] = tohex((csum) & 0xf);
177 put_buffer(s, buf1, 3);
179 ch = get_char(s);
180 if (ch < 0)
181 return -1;
182 if (ch == '+')
183 break;
185 return 0;
188 #if defined(TARGET_I386)
190 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
192 uint32_t *registers = (uint32_t *)mem_buf;
193 int i, fpus;
195 for(i = 0; i < 8; i++) {
196 registers[i] = env->regs[i];
198 registers[8] = env->eip;
199 registers[9] = env->eflags;
200 registers[10] = env->segs[R_CS].selector;
201 registers[11] = env->segs[R_SS].selector;
202 registers[12] = env->segs[R_DS].selector;
203 registers[13] = env->segs[R_ES].selector;
204 registers[14] = env->segs[R_FS].selector;
205 registers[15] = env->segs[R_GS].selector;
206 /* XXX: convert floats */
207 for(i = 0; i < 8; i++) {
208 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
210 registers[36] = env->fpuc;
211 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
212 registers[37] = fpus;
213 registers[38] = 0; /* XXX: convert tags */
214 registers[39] = 0; /* fiseg */
215 registers[40] = 0; /* fioff */
216 registers[41] = 0; /* foseg */
217 registers[42] = 0; /* fooff */
218 registers[43] = 0; /* fop */
220 for(i = 0; i < 16; i++)
221 tswapls(&registers[i]);
222 for(i = 36; i < 44; i++)
223 tswapls(&registers[i]);
224 return 44 * 4;
227 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
229 uint32_t *registers = (uint32_t *)mem_buf;
230 int i;
232 for(i = 0; i < 8; i++) {
233 env->regs[i] = tswapl(registers[i]);
235 env->eip = tswapl(registers[8]);
236 env->eflags = tswapl(registers[9]);
237 #if defined(CONFIG_USER_ONLY)
238 #define LOAD_SEG(index, sreg)\
239 if (tswapl(registers[index]) != env->segs[sreg].selector)\
240 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
241 LOAD_SEG(10, R_CS);
242 LOAD_SEG(11, R_SS);
243 LOAD_SEG(12, R_DS);
244 LOAD_SEG(13, R_ES);
245 LOAD_SEG(14, R_FS);
246 LOAD_SEG(15, R_GS);
247 #endif
250 #elif defined (TARGET_PPC)
251 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
253 uint32_t *registers = (uint32_t *)mem_buf, tmp;
254 int i;
256 /* fill in gprs */
257 for(i = 0; i < 32; i++) {
258 registers[i] = tswapl(env->gpr[i]);
260 /* fill in fprs */
261 for (i = 0; i < 32; i++) {
262 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
263 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
265 /* nip, msr, ccr, lnk, ctr, xer, mq */
266 registers[96] = tswapl(env->nip);
267 registers[97] = tswapl(do_load_msr(env));
268 tmp = 0;
269 for (i = 0; i < 8; i++)
270 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
271 registers[98] = tswapl(tmp);
272 registers[99] = tswapl(env->lr);
273 registers[100] = tswapl(env->ctr);
274 registers[101] = tswapl(do_load_xer(env));
275 registers[102] = 0;
277 return 103 * 4;
280 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
282 uint32_t *registers = (uint32_t *)mem_buf;
283 int i;
285 /* fill in gprs */
286 for (i = 0; i < 32; i++) {
287 env->gpr[i] = tswapl(registers[i]);
289 /* fill in fprs */
290 for (i = 0; i < 32; i++) {
291 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
292 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
294 /* nip, msr, ccr, lnk, ctr, xer, mq */
295 env->nip = tswapl(registers[96]);
296 do_store_msr(env, tswapl(registers[97]));
297 registers[98] = tswapl(registers[98]);
298 for (i = 0; i < 8; i++)
299 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
300 env->lr = tswapl(registers[99]);
301 env->ctr = tswapl(registers[100]);
302 do_store_xer(env, tswapl(registers[101]));
304 #elif defined (TARGET_SPARC)
305 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
307 target_ulong *registers = (target_ulong *)mem_buf;
308 int i;
310 /* fill in g0..g7 */
311 for(i = 0; i < 8; i++) {
312 registers[i] = tswapl(env->gregs[i]);
314 /* fill in register window */
315 for(i = 0; i < 24; i++) {
316 registers[i + 8] = tswapl(env->regwptr[i]);
318 /* fill in fprs */
319 for (i = 0; i < 32; i++) {
320 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
322 #ifndef TARGET_SPARC64
323 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
324 registers[64] = tswapl(env->y);
326 target_ulong tmp;
328 tmp = GET_PSR(env);
329 registers[65] = tswapl(tmp);
331 registers[66] = tswapl(env->wim);
332 registers[67] = tswapl(env->tbr);
333 registers[68] = tswapl(env->pc);
334 registers[69] = tswapl(env->npc);
335 registers[70] = tswapl(env->fsr);
336 registers[71] = 0; /* csr */
337 registers[72] = 0;
338 return 73 * sizeof(target_ulong);
339 #else
340 for (i = 0; i < 32; i += 2) {
341 registers[i/2 + 64] = tswapl(*((uint64_t *)&env->fpr[i]));
343 registers[81] = tswapl(env->pc);
344 registers[82] = tswapl(env->npc);
345 registers[83] = tswapl(env->tstate[env->tl]);
346 registers[84] = tswapl(env->fsr);
347 registers[85] = tswapl(env->fprs);
348 registers[86] = tswapl(env->y);
349 return 87 * sizeof(target_ulong);
350 #endif
353 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
355 target_ulong *registers = (target_ulong *)mem_buf;
356 int i;
358 /* fill in g0..g7 */
359 for(i = 0; i < 7; i++) {
360 env->gregs[i] = tswapl(registers[i]);
362 /* fill in register window */
363 for(i = 0; i < 24; i++) {
364 env->regwptr[i] = tswapl(registers[i + 8]);
366 /* fill in fprs */
367 for (i = 0; i < 32; i++) {
368 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
370 #ifndef TARGET_SPARC64
371 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
372 env->y = tswapl(registers[64]);
373 PUT_PSR(env, tswapl(registers[65]));
374 env->wim = tswapl(registers[66]);
375 env->tbr = tswapl(registers[67]);
376 env->pc = tswapl(registers[68]);
377 env->npc = tswapl(registers[69]);
378 env->fsr = tswapl(registers[70]);
379 #else
380 for (i = 0; i < 32; i += 2) {
381 uint64_t tmp;
382 tmp = tswapl(registers[i/2 + 64]) << 32;
383 tmp |= tswapl(registers[i/2 + 64 + 1]);
384 *((uint64_t *)&env->fpr[i]) = tmp;
386 env->pc = tswapl(registers[81]);
387 env->npc = tswapl(registers[82]);
388 env->tstate[env->tl] = tswapl(registers[83]);
389 env->fsr = tswapl(registers[84]);
390 env->fprs = tswapl(registers[85]);
391 env->y = tswapl(registers[86]);
392 #endif
394 #elif defined (TARGET_ARM)
395 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
397 int i;
398 uint8_t *ptr;
400 ptr = mem_buf;
401 /* 16 core integer registers (4 bytes each). */
402 for (i = 0; i < 16; i++)
404 *(uint32_t *)ptr = tswapl(env->regs[i]);
405 ptr += 4;
407 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
408 Not yet implemented. */
409 memset (ptr, 0, 8 * 12 + 4);
410 ptr += 8 * 12 + 4;
411 /* CPSR (4 bytes). */
412 *(uint32_t *)ptr = tswapl (cpsr_read(env));
413 ptr += 4;
415 return ptr - mem_buf;
418 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
420 int i;
421 uint8_t *ptr;
423 ptr = mem_buf;
424 /* Core integer registers. */
425 for (i = 0; i < 16; i++)
427 env->regs[i] = tswapl(*(uint32_t *)ptr);
428 ptr += 4;
430 /* Ignore FPA regs and scr. */
431 ptr += 8 * 12 + 4;
432 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
434 #elif defined (TARGET_MIPS)
435 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
437 int i;
438 uint8_t *ptr;
440 ptr = mem_buf;
441 for (i = 0; i < 32; i++)
443 *(uint32_t *)ptr = tswapl(env->gpr[i]);
444 ptr += 4;
447 *(uint32_t *)ptr = tswapl(env->CP0_Status);
448 ptr += 4;
450 *(uint32_t *)ptr = tswapl(env->LO);
451 ptr += 4;
453 *(uint32_t *)ptr = tswapl(env->HI);
454 ptr += 4;
456 *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
457 ptr += 4;
459 *(uint32_t *)ptr = tswapl(env->CP0_Cause);
460 ptr += 4;
462 *(uint32_t *)ptr = tswapl(env->PC);
463 ptr += 4;
465 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
467 return ptr - mem_buf;
470 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
472 int i;
473 uint8_t *ptr;
475 ptr = mem_buf;
476 for (i = 0; i < 32; i++)
478 env->gpr[i] = tswapl(*(uint32_t *)ptr);
479 ptr += 4;
482 env->CP0_Status = tswapl(*(uint32_t *)ptr);
483 ptr += 4;
485 env->LO = tswapl(*(uint32_t *)ptr);
486 ptr += 4;
488 env->HI = tswapl(*(uint32_t *)ptr);
489 ptr += 4;
491 env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
492 ptr += 4;
494 env->CP0_Cause = tswapl(*(uint32_t *)ptr);
495 ptr += 4;
497 env->PC = tswapl(*(uint32_t *)ptr);
498 ptr += 4;
500 #elif defined (TARGET_SH4)
501 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
503 uint32_t *ptr = (uint32_t *)mem_buf;
504 int i;
506 #define SAVE(x) *ptr++=tswapl(x)
507 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
508 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
509 } else {
510 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
512 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
513 SAVE (env->pc);
514 SAVE (env->pr);
515 SAVE (env->gbr);
516 SAVE (env->vbr);
517 SAVE (env->mach);
518 SAVE (env->macl);
519 SAVE (env->sr);
520 SAVE (0); /* TICKS */
521 SAVE (0); /* STALLS */
522 SAVE (0); /* CYCLES */
523 SAVE (0); /* INSTS */
524 SAVE (0); /* PLR */
526 return ((uint8_t *)ptr - mem_buf);
529 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
531 uint32_t *ptr = (uint32_t *)mem_buf;
532 int i;
534 #define LOAD(x) (x)=*ptr++;
535 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
536 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
537 } else {
538 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
540 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
541 LOAD (env->pc);
542 LOAD (env->pr);
543 LOAD (env->gbr);
544 LOAD (env->vbr);
545 LOAD (env->mach);
546 LOAD (env->macl);
547 LOAD (env->sr);
549 #else
550 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
552 return 0;
555 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
559 #endif
561 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
563 const char *p;
564 int ch, reg_size, type;
565 char buf[4096];
566 uint8_t mem_buf[2000];
567 uint32_t *registers;
568 uint32_t addr, len;
570 #ifdef DEBUG_GDB
571 printf("command='%s'\n", line_buf);
572 #endif
573 p = line_buf;
574 ch = *p++;
575 switch(ch) {
576 case '?':
577 /* TODO: Make this return the correct value for user-mode. */
578 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
579 put_packet(s, buf);
580 break;
581 case 'c':
582 if (*p != '\0') {
583 addr = strtoul(p, (char **)&p, 16);
584 #if defined(TARGET_I386)
585 env->eip = addr;
586 #elif defined (TARGET_PPC)
587 env->nip = addr;
588 #elif defined (TARGET_SPARC)
589 env->pc = addr;
590 env->npc = addr + 4;
591 #elif defined (TARGET_ARM)
592 env->regs[15] = addr;
593 #elif defined (TARGET_SH4)
594 env->pc = addr;
595 #endif
597 #ifdef CONFIG_USER_ONLY
598 s->running_state = 1;
599 #else
600 vm_start();
601 #endif
602 return RS_IDLE;
603 case 's':
604 if (*p != '\0') {
605 addr = strtoul(p, (char **)&p, 16);
606 #if defined(TARGET_I386)
607 env->eip = addr;
608 #elif defined (TARGET_PPC)
609 env->nip = addr;
610 #elif defined (TARGET_SPARC)
611 env->pc = addr;
612 env->npc = addr + 4;
613 #elif defined (TARGET_ARM)
614 env->regs[15] = addr;
615 #elif defined (TARGET_SH4)
616 env->pc = addr;
617 #endif
619 cpu_single_step(env, 1);
620 #ifdef CONFIG_USER_ONLY
621 s->running_state = 1;
622 #else
623 vm_start();
624 #endif
625 return RS_IDLE;
626 case 'g':
627 reg_size = cpu_gdb_read_registers(env, mem_buf);
628 memtohex(buf, mem_buf, reg_size);
629 put_packet(s, buf);
630 break;
631 case 'G':
632 registers = (void *)mem_buf;
633 len = strlen(p) / 2;
634 hextomem((uint8_t *)registers, p, len);
635 cpu_gdb_write_registers(env, mem_buf, len);
636 put_packet(s, "OK");
637 break;
638 case 'm':
639 addr = strtoul(p, (char **)&p, 16);
640 if (*p == ',')
641 p++;
642 len = strtoul(p, NULL, 16);
643 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
644 put_packet (s, "E14");
645 } else {
646 memtohex(buf, mem_buf, len);
647 put_packet(s, buf);
649 break;
650 case 'M':
651 addr = strtoul(p, (char **)&p, 16);
652 if (*p == ',')
653 p++;
654 len = strtoul(p, (char **)&p, 16);
655 if (*p == ':')
656 p++;
657 hextomem(mem_buf, p, len);
658 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
659 put_packet(s, "E14");
660 else
661 put_packet(s, "OK");
662 break;
663 case 'Z':
664 type = strtoul(p, (char **)&p, 16);
665 if (*p == ',')
666 p++;
667 addr = strtoul(p, (char **)&p, 16);
668 if (*p == ',')
669 p++;
670 len = strtoul(p, (char **)&p, 16);
671 if (type == 0 || type == 1) {
672 if (cpu_breakpoint_insert(env, addr) < 0)
673 goto breakpoint_error;
674 put_packet(s, "OK");
675 } else {
676 breakpoint_error:
677 put_packet(s, "E22");
679 break;
680 case 'z':
681 type = strtoul(p, (char **)&p, 16);
682 if (*p == ',')
683 p++;
684 addr = strtoul(p, (char **)&p, 16);
685 if (*p == ',')
686 p++;
687 len = strtoul(p, (char **)&p, 16);
688 if (type == 0 || type == 1) {
689 cpu_breakpoint_remove(env, addr);
690 put_packet(s, "OK");
691 } else {
692 goto breakpoint_error;
694 break;
695 #ifdef CONFIG_USER_ONLY
696 case 'q':
697 if (strncmp(p, "Offsets", 7) == 0) {
698 TaskState *ts = env->opaque;
700 sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
701 ts->info->data_offset, ts->info->data_offset);
702 put_packet(s, buf);
703 break;
705 /* Fall through. */
706 #endif
707 default:
708 // unknown_command:
709 /* put empty packet */
710 buf[0] = '\0';
711 put_packet(s, buf);
712 break;
714 return RS_IDLE;
717 extern void tb_flush(CPUState *env);
719 #ifndef CONFIG_USER_ONLY
720 static void gdb_vm_stopped(void *opaque, int reason)
722 GDBState *s = opaque;
723 char buf[256];
724 int ret;
726 /* disable single step if it was enable */
727 cpu_single_step(s->env, 0);
729 if (reason == EXCP_DEBUG) {
730 tb_flush(s->env);
731 ret = SIGTRAP;
732 } else if (reason == EXCP_INTERRUPT) {
733 ret = SIGINT;
734 } else {
735 ret = 0;
737 snprintf(buf, sizeof(buf), "S%02x", ret);
738 put_packet(s, buf);
740 #endif
742 static void gdb_read_byte(GDBState *s, int ch)
744 CPUState *env = s->env;
745 int i, csum;
746 char reply[1];
748 #ifndef CONFIG_USER_ONLY
749 if (vm_running) {
750 /* when the CPU is running, we cannot do anything except stop
751 it when receiving a char */
752 vm_stop(EXCP_INTERRUPT);
753 } else
754 #endif
756 switch(s->state) {
757 case RS_IDLE:
758 if (ch == '$') {
759 s->line_buf_index = 0;
760 s->state = RS_GETLINE;
762 break;
763 case RS_GETLINE:
764 if (ch == '#') {
765 s->state = RS_CHKSUM1;
766 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
767 s->state = RS_IDLE;
768 } else {
769 s->line_buf[s->line_buf_index++] = ch;
771 break;
772 case RS_CHKSUM1:
773 s->line_buf[s->line_buf_index] = '\0';
774 s->line_csum = fromhex(ch) << 4;
775 s->state = RS_CHKSUM2;
776 break;
777 case RS_CHKSUM2:
778 s->line_csum |= fromhex(ch);
779 csum = 0;
780 for(i = 0; i < s->line_buf_index; i++) {
781 csum += s->line_buf[i];
783 if (s->line_csum != (csum & 0xff)) {
784 reply[0] = '-';
785 put_buffer(s, reply, 1);
786 s->state = RS_IDLE;
787 } else {
788 reply[0] = '+';
789 put_buffer(s, reply, 1);
790 s->state = gdb_handle_packet(s, env, s->line_buf);
792 break;
797 #ifdef CONFIG_USER_ONLY
799 gdb_handlesig (CPUState *env, int sig)
801 GDBState *s;
802 char buf[256];
803 int n;
805 if (gdbserver_fd < 0)
806 return sig;
808 s = &gdbserver_state;
810 /* disable single step if it was enabled */
811 cpu_single_step(env, 0);
812 tb_flush(env);
814 if (sig != 0)
816 snprintf(buf, sizeof(buf), "S%02x", sig);
817 put_packet(s, buf);
820 sig = 0;
821 s->state = RS_IDLE;
822 s->running_state = 0;
823 while (s->running_state == 0) {
824 n = read (s->fd, buf, 256);
825 if (n > 0)
827 int i;
829 for (i = 0; i < n; i++)
830 gdb_read_byte (s, buf[i]);
832 else if (n == 0 || errno != EAGAIN)
834 /* XXX: Connection closed. Should probably wait for annother
835 connection before continuing. */
836 return sig;
839 return sig;
842 /* Tell the remote gdb that the process has exited. */
843 void gdb_exit(CPUState *env, int code)
845 GDBState *s;
846 char buf[4];
848 if (gdbserver_fd < 0)
849 return;
851 s = &gdbserver_state;
853 snprintf(buf, sizeof(buf), "W%02x", code);
854 put_packet(s, buf);
857 #else
858 static void gdb_read(void *opaque)
860 GDBState *s = opaque;
861 int i, size;
862 uint8_t buf[4096];
864 size = recv(s->fd, buf, sizeof(buf), 0);
865 if (size < 0)
866 return;
867 if (size == 0) {
868 /* end of connection */
869 qemu_del_vm_stop_handler(gdb_vm_stopped, s);
870 qemu_set_fd_handler(s->fd, NULL, NULL, NULL);
871 qemu_free(s);
872 vm_start();
873 } else {
874 for(i = 0; i < size; i++)
875 gdb_read_byte(s, buf[i]);
879 #endif
881 static void gdb_accept(void *opaque)
883 GDBState *s;
884 struct sockaddr_in sockaddr;
885 socklen_t len;
886 int val, fd;
888 for(;;) {
889 len = sizeof(sockaddr);
890 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
891 if (fd < 0 && errno != EINTR) {
892 perror("accept");
893 return;
894 } else if (fd >= 0) {
895 break;
899 /* set short latency */
900 val = 1;
901 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
903 #ifdef CONFIG_USER_ONLY
904 s = &gdbserver_state;
905 memset (s, 0, sizeof (GDBState));
906 #else
907 s = qemu_mallocz(sizeof(GDBState));
908 if (!s) {
909 close(fd);
910 return;
912 #endif
913 s->env = first_cpu; /* XXX: allow to change CPU */
914 s->fd = fd;
916 #ifdef CONFIG_USER_ONLY
917 fcntl(fd, F_SETFL, O_NONBLOCK);
918 #else
919 socket_set_nonblock(fd);
921 /* stop the VM */
922 vm_stop(EXCP_INTERRUPT);
924 /* start handling I/O */
925 qemu_set_fd_handler(s->fd, gdb_read, NULL, s);
926 /* when the VM is stopped, the following callback is called */
927 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
928 #endif
931 static int gdbserver_open(int port)
933 struct sockaddr_in sockaddr;
934 int fd, val, ret;
936 fd = socket(PF_INET, SOCK_STREAM, 0);
937 if (fd < 0) {
938 perror("socket");
939 return -1;
942 /* allow fast reuse */
943 val = 1;
944 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
946 sockaddr.sin_family = AF_INET;
947 sockaddr.sin_port = htons(port);
948 sockaddr.sin_addr.s_addr = 0;
949 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
950 if (ret < 0) {
951 perror("bind");
952 return -1;
954 ret = listen(fd, 0);
955 if (ret < 0) {
956 perror("listen");
957 return -1;
959 #ifndef CONFIG_USER_ONLY
960 socket_set_nonblock(fd);
961 #endif
962 return fd;
965 int gdbserver_start(int port)
967 gdbserver_fd = gdbserver_open(port);
968 if (gdbserver_fd < 0)
969 return -1;
970 /* accept connections */
971 #ifdef CONFIG_USER_ONLY
972 gdb_accept (NULL);
973 #else
974 qemu_set_fd_handler(gdbserver_fd, gdb_accept, NULL, NULL);
975 #endif
976 return 0;