3 #include "qemu-timer.h"
7 void register_machines(void)
10 qemu_register_machine(&sun4u_machine
);
11 qemu_register_machine(&sun4v_machine
);
13 qemu_register_machine(&ss5_machine
);
14 qemu_register_machine(&ss10_machine
);
15 qemu_register_machine(&ss600mp_machine
);
16 qemu_register_machine(&ss20_machine
);
17 qemu_register_machine(&ss2_machine
);
18 qemu_register_machine(&voyager_machine
);
19 qemu_register_machine(&ss_lx_machine
);
20 qemu_register_machine(&ss4_machine
);
21 qemu_register_machine(&scls_machine
);
22 qemu_register_machine(&sbook_machine
);
23 qemu_register_machine(&ss1000_machine
);
24 qemu_register_machine(&ss2000_machine
);
28 void cpu_save(QEMUFile
*f
, void *opaque
)
30 CPUState
*env
= opaque
;
34 for(i
= 0; i
< 8; i
++)
35 qemu_put_betls(f
, &env
->gregs
[i
]);
36 qemu_put_be32s(f
, &env
->nwindows
);
37 for(i
= 0; i
< env
->nwindows
* 16; i
++)
38 qemu_put_betls(f
, &env
->regbase
[i
]);
41 for(i
= 0; i
< TARGET_FPREGS
; i
++) {
47 qemu_put_be32(f
, u
.i
);
50 qemu_put_betls(f
, &env
->pc
);
51 qemu_put_betls(f
, &env
->npc
);
52 qemu_put_betls(f
, &env
->y
);
54 qemu_put_be32(f
, tmp
);
55 qemu_put_betls(f
, &env
->fsr
);
56 qemu_put_betls(f
, &env
->tbr
);
57 #ifndef TARGET_SPARC64
58 qemu_put_be32s(f
, &env
->wim
);
60 for (i
= 0; i
< 32; i
++)
61 qemu_put_be32s(f
, &env
->mmuregs
[i
]);
63 qemu_put_be64s(f
, &env
->lsu
);
64 for (i
= 0; i
< 16; i
++) {
65 qemu_put_be64s(f
, &env
->immuregs
[i
]);
66 qemu_put_be64s(f
, &env
->dmmuregs
[i
]);
68 for (i
= 0; i
< 64; i
++) {
69 qemu_put_be64s(f
, &env
->itlb_tag
[i
]);
70 qemu_put_be64s(f
, &env
->itlb_tte
[i
]);
71 qemu_put_be64s(f
, &env
->dtlb_tag
[i
]);
72 qemu_put_be64s(f
, &env
->dtlb_tte
[i
]);
74 qemu_put_be32s(f
, &env
->mmu_version
);
75 for (i
= 0; i
< MAXTL_MAX
; i
++) {
76 qemu_put_be64s(f
, &env
->ts
[i
].tpc
);
77 qemu_put_be64s(f
, &env
->ts
[i
].tnpc
);
78 qemu_put_be64s(f
, &env
->ts
[i
].tstate
);
79 qemu_put_be32s(f
, &env
->ts
[i
].tt
);
81 qemu_put_be32s(f
, &env
->xcc
);
82 qemu_put_be32s(f
, &env
->asi
);
83 qemu_put_be32s(f
, &env
->pstate
);
84 qemu_put_be32s(f
, &env
->tl
);
85 qemu_put_be32s(f
, &env
->cansave
);
86 qemu_put_be32s(f
, &env
->canrestore
);
87 qemu_put_be32s(f
, &env
->otherwin
);
88 qemu_put_be32s(f
, &env
->wstate
);
89 qemu_put_be32s(f
, &env
->cleanwin
);
90 for (i
= 0; i
< 8; i
++)
91 qemu_put_be64s(f
, &env
->agregs
[i
]);
92 for (i
= 0; i
< 8; i
++)
93 qemu_put_be64s(f
, &env
->bgregs
[i
]);
94 for (i
= 0; i
< 8; i
++)
95 qemu_put_be64s(f
, &env
->igregs
[i
]);
96 for (i
= 0; i
< 8; i
++)
97 qemu_put_be64s(f
, &env
->mgregs
[i
]);
98 qemu_put_be64s(f
, &env
->fprs
);
99 qemu_put_be64s(f
, &env
->tick_cmpr
);
100 qemu_put_be64s(f
, &env
->stick_cmpr
);
101 qemu_put_ptimer(f
, env
->tick
);
102 qemu_put_ptimer(f
, env
->stick
);
103 qemu_put_be64s(f
, &env
->gsr
);
104 qemu_put_be32s(f
, &env
->gl
);
105 qemu_put_be64s(f
, &env
->hpstate
);
106 for (i
= 0; i
< MAXTL_MAX
; i
++)
107 qemu_put_be64s(f
, &env
->htstate
[i
]);
108 qemu_put_be64s(f
, &env
->hintp
);
109 qemu_put_be64s(f
, &env
->htba
);
110 qemu_put_be64s(f
, &env
->hver
);
111 qemu_put_be64s(f
, &env
->hstick_cmpr
);
112 qemu_put_be64s(f
, &env
->ssr
);
113 qemu_get_ptimer(f
, env
->hstick
);
117 int cpu_load(QEMUFile
*f
, void *opaque
, int version_id
)
119 CPUState
*env
= opaque
;
125 for(i
= 0; i
< 8; i
++)
126 qemu_get_betls(f
, &env
->gregs
[i
]);
127 qemu_get_be32s(f
, &env
->nwindows
);
128 for(i
= 0; i
< env
->nwindows
* 16; i
++)
129 qemu_get_betls(f
, &env
->regbase
[i
]);
132 for(i
= 0; i
< TARGET_FPREGS
; i
++) {
137 u
.i
= qemu_get_be32(f
);
141 qemu_get_betls(f
, &env
->pc
);
142 qemu_get_betls(f
, &env
->npc
);
143 qemu_get_betls(f
, &env
->y
);
144 tmp
= qemu_get_be32(f
);
145 env
->cwp
= 0; /* needed to ensure that the wrapping registers are
148 qemu_get_betls(f
, &env
->fsr
);
149 qemu_get_betls(f
, &env
->tbr
);
150 #ifndef TARGET_SPARC64
151 qemu_get_be32s(f
, &env
->wim
);
153 for (i
= 0; i
< 32; i
++)
154 qemu_get_be32s(f
, &env
->mmuregs
[i
]);
156 qemu_get_be64s(f
, &env
->lsu
);
157 for (i
= 0; i
< 16; i
++) {
158 qemu_get_be64s(f
, &env
->immuregs
[i
]);
159 qemu_get_be64s(f
, &env
->dmmuregs
[i
]);
161 for (i
= 0; i
< 64; i
++) {
162 qemu_get_be64s(f
, &env
->itlb_tag
[i
]);
163 qemu_get_be64s(f
, &env
->itlb_tte
[i
]);
164 qemu_get_be64s(f
, &env
->dtlb_tag
[i
]);
165 qemu_get_be64s(f
, &env
->dtlb_tte
[i
]);
167 qemu_get_be32s(f
, &env
->mmu_version
);
168 for (i
= 0; i
< MAXTL_MAX
; i
++) {
169 qemu_get_be64s(f
, &env
->ts
[i
].tpc
);
170 qemu_get_be64s(f
, &env
->ts
[i
].tnpc
);
171 qemu_get_be64s(f
, &env
->ts
[i
].tstate
);
172 qemu_get_be32s(f
, &env
->ts
[i
].tt
);
174 qemu_get_be32s(f
, &env
->xcc
);
175 qemu_get_be32s(f
, &env
->asi
);
176 qemu_get_be32s(f
, &env
->pstate
);
177 qemu_get_be32s(f
, &env
->tl
);
178 env
->tsptr
= &env
->ts
[env
->tl
& MAXTL_MASK
];
179 qemu_get_be32s(f
, &env
->cansave
);
180 qemu_get_be32s(f
, &env
->canrestore
);
181 qemu_get_be32s(f
, &env
->otherwin
);
182 qemu_get_be32s(f
, &env
->wstate
);
183 qemu_get_be32s(f
, &env
->cleanwin
);
184 for (i
= 0; i
< 8; i
++)
185 qemu_get_be64s(f
, &env
->agregs
[i
]);
186 for (i
= 0; i
< 8; i
++)
187 qemu_get_be64s(f
, &env
->bgregs
[i
]);
188 for (i
= 0; i
< 8; i
++)
189 qemu_get_be64s(f
, &env
->igregs
[i
]);
190 for (i
= 0; i
< 8; i
++)
191 qemu_get_be64s(f
, &env
->mgregs
[i
]);
192 qemu_get_be64s(f
, &env
->fprs
);
193 qemu_get_be64s(f
, &env
->tick_cmpr
);
194 qemu_get_be64s(f
, &env
->stick_cmpr
);
195 qemu_get_ptimer(f
, env
->tick
);
196 qemu_get_ptimer(f
, env
->stick
);
197 qemu_get_be64s(f
, &env
->gsr
);
198 qemu_get_be32s(f
, &env
->gl
);
199 qemu_get_be64s(f
, &env
->hpstate
);
200 for (i
= 0; i
< MAXTL_MAX
; i
++)
201 qemu_get_be64s(f
, &env
->htstate
[i
]);
202 qemu_get_be64s(f
, &env
->hintp
);
203 qemu_get_be64s(f
, &env
->htba
);
204 qemu_get_be64s(f
, &env
->hver
);
205 qemu_get_be64s(f
, &env
->hstick_cmpr
);
206 qemu_get_be64s(f
, &env
->ssr
);
207 qemu_get_ptimer(f
, env
->hstick
);