Partial SD card SPI mode support.
[qemu/mini2440.git] / hw / tsc210x.c
blob6082aa0b9a8df1449d320de6855b6ce3652f619c
1 /*
2 * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
4 * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
22 #include "hw.h"
23 #include "audio/audio.h"
24 #include "qemu-timer.h"
25 #include "console.h"
26 #include "omap.h"
28 #define TSC_DATA_REGISTERS_PAGE 0x0
29 #define TSC_CONTROL_REGISTERS_PAGE 0x1
30 #define TSC_AUDIO_REGISTERS_PAGE 0x2
32 #define TSC_VERBOSE
34 #define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
36 struct tsc210x_state_s {
37 qemu_irq pint;
38 QEMUTimer *timer;
39 QEMUSoundCard card;
40 struct uwire_slave_s chip;
41 struct i2s_codec_s codec;
42 uint8_t in_fifo[16384];
43 uint8_t out_fifo[16384];
45 int x, y;
46 int pressure;
48 int state, page, offset, irq;
49 uint16_t command, dav;
51 int busy;
52 int enabled;
53 int host_mode;
54 int function;
55 int nextfunction;
56 int precision;
57 int nextprecision;
58 int filter;
59 int pin_func;
60 int ref;
61 int timing;
62 int noise;
64 uint16_t audio_ctrl1;
65 uint16_t audio_ctrl2;
66 uint16_t audio_ctrl3;
67 uint16_t pll[2];
68 uint16_t volume;
69 int64_t volume_change;
70 int softstep;
71 uint16_t dac_power;
72 int64_t powerdown;
73 uint16_t filter_data[0x14];
75 const char *name;
76 SWVoiceIn *adc_voice[1];
77 SWVoiceOut *dac_voice[1];
78 int i2s_rx_rate;
79 int i2s_tx_rate;
80 AudioState *audio;
83 static const int resolution[4] = { 12, 8, 10, 12 };
85 #define TSC_MODE_NO_SCAN 0x0
86 #define TSC_MODE_XY_SCAN 0x1
87 #define TSC_MODE_XYZ_SCAN 0x2
88 #define TSC_MODE_X 0x3
89 #define TSC_MODE_Y 0x4
90 #define TSC_MODE_Z 0x5
91 #define TSC_MODE_BAT1 0x6
92 #define TSC_MODE_BAT2 0x7
93 #define TSC_MODE_AUX 0x8
94 #define TSC_MODE_AUX_SCAN 0x9
95 #define TSC_MODE_TEMP1 0xa
96 #define TSC_MODE_PORT_SCAN 0xb
97 #define TSC_MODE_TEMP2 0xc
98 #define TSC_MODE_XX_DRV 0xd
99 #define TSC_MODE_YY_DRV 0xe
100 #define TSC_MODE_YX_DRV 0xf
102 static const uint16_t mode_regs[16] = {
103 0x0000, /* No scan */
104 0x0600, /* X, Y scan */
105 0x0780, /* X, Y, Z scan */
106 0x0400, /* X */
107 0x0200, /* Y */
108 0x0180, /* Z */
109 0x0040, /* BAT1 */
110 0x0030, /* BAT2 */
111 0x0010, /* AUX */
112 0x0010, /* AUX scan */
113 0x0004, /* TEMP1 */
114 0x0070, /* Port scan */
115 0x0002, /* TEMP2 */
116 0x0000, /* X+, X- drivers */
117 0x0000, /* Y+, Y- drivers */
118 0x0000, /* Y+, X- drivers */
122 * Convert screen coordinates to arbitrary values that the
123 * touchscreen in my Palm Tungsten E device returns.
124 * This shouldn't really matter (because the guest system
125 * should calibrate the touchscreen anyway), but let's
126 * imitate some real hardware.
128 #define X_TRANSFORM(value) \
129 ((3850 - ((int) (value) * (3850 - 250) / 32768)) << 4)
130 #define Y_TRANSFORM(value) \
131 ((150 + ((int) (value) * (3037 - 150) / 32768)) << 4)
132 #define Z1_TRANSFORM(s) \
133 ((400 - (s)->x + ((s)->pressure << 9)) << 4)
134 #define Z2_TRANSFORM(s) \
135 ((4000 + (s)->y - ((s)->pressure << 10)) << 4)
136 #define BAT1_VAL 0x8660
137 #define BAT2_VAL 0x0000
138 #define AUX1_VAL 0x35c0
139 #define AUX2_VAL 0xffff
140 #define TEMP1_VAL 0x8c70
141 #define TEMP2_VAL 0xa5b0
143 #define TSC_POWEROFF_DELAY 50
144 #define TSC_SOFTSTEP_DELAY 50
146 static void tsc210x_reset(struct tsc210x_state_s *s)
148 s->state = 0;
149 s->pin_func = 2;
150 s->enabled = 0;
151 s->busy = 0;
152 s->nextfunction = 0;
153 s->ref = 0;
154 s->timing = 0;
155 s->irq = 0;
156 s->dav = 0;
158 s->audio_ctrl1 = 0x0000;
159 s->audio_ctrl2 = 0x4410;
160 s->audio_ctrl3 = 0x0000;
161 s->pll[0] = 0x1004;
162 s->pll[1] = 0x0000;
163 s->volume = 0xffff;
164 s->dac_power = 0x8540;
165 s->softstep = 1;
166 s->volume_change = 0;
167 s->powerdown = 0;
168 s->filter_data[0x00] = 0x6be3;
169 s->filter_data[0x01] = 0x9666;
170 s->filter_data[0x02] = 0x675d;
171 s->filter_data[0x03] = 0x6be3;
172 s->filter_data[0x04] = 0x9666;
173 s->filter_data[0x05] = 0x675d;
174 s->filter_data[0x06] = 0x7d83;
175 s->filter_data[0x07] = 0x84ee;
176 s->filter_data[0x08] = 0x7d83;
177 s->filter_data[0x09] = 0x84ee;
178 s->filter_data[0x0a] = 0x6be3;
179 s->filter_data[0x0b] = 0x9666;
180 s->filter_data[0x0c] = 0x675d;
181 s->filter_data[0x0d] = 0x6be3;
182 s->filter_data[0x0e] = 0x9666;
183 s->filter_data[0x0f] = 0x675d;
184 s->filter_data[0x10] = 0x7d83;
185 s->filter_data[0x11] = 0x84ee;
186 s->filter_data[0x12] = 0x7d83;
187 s->filter_data[0x13] = 0x84ee;
189 s->i2s_tx_rate = 0;
190 s->i2s_rx_rate = 0;
192 qemu_set_irq(s->pint, !s->irq);
195 struct tsc210x_rate_info_s {
196 int rate;
197 int dsor;
198 int fsref;
201 /* { rate, dsor, fsref } */
202 static const struct tsc210x_rate_info_s tsc2101_rates[] = {
203 /* Fsref / 6.0 */
204 { 7350, 7, 1 },
205 { 8000, 7, 0 },
206 /* Fsref / 5.5 */
207 { 8018, 6, 1 },
208 { 8727, 6, 0 },
209 /* Fsref / 5.0 */
210 { 8820, 5, 1 },
211 { 9600, 5, 0 },
212 /* Fsref / 4.0 */
213 { 11025, 4, 1 },
214 { 12000, 4, 0 },
215 /* Fsref / 3.0 */
216 { 14700, 3, 1 },
217 { 16000, 3, 0 },
218 /* Fsref / 2.0 */
219 { 22050, 2, 1 },
220 { 24000, 2, 0 },
221 /* Fsref / 1.5 */
222 { 29400, 1, 1 },
223 { 32000, 1, 0 },
224 /* Fsref */
225 { 44100, 0, 1 },
226 { 48000, 0, 0 },
228 { 0, 0, 0 },
231 /* { rate, dsor, fsref } */
232 static const struct tsc210x_rate_info_s tsc2102_rates[] = {
233 /* Fsref / 6.0 */
234 { 7350, 63, 1 },
235 { 8000, 63, 0 },
236 /* Fsref / 6.0 */
237 { 7350, 54, 1 },
238 { 8000, 54, 0 },
239 /* Fsref / 5.0 */
240 { 8820, 45, 1 },
241 { 9600, 45, 0 },
242 /* Fsref / 4.0 */
243 { 11025, 36, 1 },
244 { 12000, 36, 0 },
245 /* Fsref / 3.0 */
246 { 14700, 27, 1 },
247 { 16000, 27, 0 },
248 /* Fsref / 2.0 */
249 { 22050, 18, 1 },
250 { 24000, 18, 0 },
251 /* Fsref / 1.5 */
252 { 29400, 9, 1 },
253 { 32000, 9, 0 },
254 /* Fsref */
255 { 44100, 0, 1 },
256 { 48000, 0, 0 },
258 { 0, 0, 0 },
261 static inline void tsc210x_out_flush(struct tsc210x_state_s *s, int len)
263 uint8_t *data = s->codec.out.fifo + s->codec.out.start;
264 uint8_t *end = data + len;
266 while (data < end)
267 data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
269 s->codec.out.len -= len;
270 if (s->codec.out.len)
271 memmove(s->codec.out.fifo, end, s->codec.out.len);
272 s->codec.out.start = 0;
275 static void tsc210x_audio_out_cb(struct tsc210x_state_s *s, int free_b)
277 if (s->codec.out.len >= free_b) {
278 tsc210x_out_flush(s, free_b);
279 return;
282 s->codec.out.size = MIN(free_b, 16384);
283 qemu_irq_raise(s->codec.tx_start);
286 static void tsc2102_audio_rate_update(struct tsc210x_state_s *s)
288 const struct tsc210x_rate_info_s *rate;
290 s->codec.tx_rate = 0;
291 s->codec.rx_rate = 0;
292 if (s->dac_power & (1 << 15)) /* PWDNC */
293 return;
295 for (rate = tsc2102_rates; rate->rate; rate ++)
296 if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
297 rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
298 break;
299 if (!rate->rate) {
300 printf("%s: unknown sampling rate configured\n", __FUNCTION__);
301 return;
304 s->codec.tx_rate = rate->rate;
307 static void tsc2102_audio_output_update(struct tsc210x_state_s *s)
309 int enable;
310 audsettings_t fmt;
312 if (s->dac_voice[0]) {
313 tsc210x_out_flush(s, s->codec.out.len);
314 s->codec.out.size = 0;
315 AUD_set_active_out(s->dac_voice[0], 0);
316 AUD_close_out(&s->card, s->dac_voice[0]);
317 s->dac_voice[0] = 0;
319 s->codec.cts = 0;
321 enable =
322 (~s->dac_power & (1 << 15)) && /* PWDNC */
323 (~s->dac_power & (1 << 10)); /* DAPWDN */
324 if (!enable || !s->codec.tx_rate)
325 return;
327 /* Force our own sampling rate even in slave DAC mode */
328 fmt.endianness = 0;
329 fmt.nchannels = 2;
330 fmt.freq = s->codec.tx_rate;
331 fmt.fmt = AUD_FMT_S16;
333 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
334 "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
335 if (s->dac_voice[0]) {
336 s->codec.cts = 1;
337 AUD_set_active_out(s->dac_voice[0], 1);
341 static uint16_t tsc2102_data_register_read(struct tsc210x_state_s *s, int reg)
343 switch (reg) {
344 case 0x00: /* X */
345 s->dav &= 0xfbff;
346 return TSC_CUT_RESOLUTION(X_TRANSFORM(s->x), s->precision) +
347 (s->noise & 3);
349 case 0x01: /* Y */
350 s->noise ++;
351 s->dav &= 0xfdff;
352 return TSC_CUT_RESOLUTION(Y_TRANSFORM(s->y), s->precision) ^
353 (s->noise & 3);
355 case 0x02: /* Z1 */
356 s->dav &= 0xfeff;
357 return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
358 (s->noise & 3);
360 case 0x03: /* Z2 */
361 s->dav &= 0xff7f;
362 return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
363 (s->noise & 3);
365 case 0x04: /* KPData */
366 return 0xffff;
368 case 0x05: /* BAT1 */
369 s->dav &= 0xffbf;
370 return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision);
372 case 0x06: /* BAT2 */
373 s->dav &= 0xffdf;
374 return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
376 case 0x07: /* AUX1 */
377 s->dav &= 0xffef;
378 return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
380 case 0x08: /* AUX2 */
381 s->dav &= 0xfff7;
382 return 0xffff;
384 case 0x09: /* TEMP1 */
385 s->dav &= 0xfffb;
386 return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision);
388 case 0x0a: /* TEMP2 */
389 s->dav &= 0xfffd;
390 return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision);
392 case 0x0b: /* DAC */
393 s->dav &= 0xfffe;
394 return 0xffff;
396 default:
397 #ifdef TSC_VERBOSE
398 fprintf(stderr, "tsc2102_data_register_read: "
399 "no such register: 0x%02x\n", reg);
400 #endif
401 return 0xffff;
405 static uint16_t tsc2102_control_register_read(
406 struct tsc210x_state_s *s, int reg)
408 switch (reg) {
409 case 0x00: /* TSC ADC */
410 return (s->pressure << 15) | ((!s->busy) << 14) |
411 (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
413 case 0x01: /* Status */
414 return (s->pin_func << 14) | ((!s->enabled) << 13) |
415 (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
417 case 0x03: /* Reference */
418 return s->ref;
420 case 0x04: /* Reset */
421 return 0xffff;
423 case 0x05: /* Configuration */
424 return s->timing;
426 default:
427 #ifdef TSC_VERBOSE
428 fprintf(stderr, "tsc2102_control_register_read: "
429 "no such register: 0x%02x\n", reg);
430 #endif
431 return 0xffff;
435 static uint16_t tsc2102_audio_register_read(struct tsc210x_state_s *s, int reg)
437 int l_ch, r_ch;
438 uint16_t val;
440 switch (reg) {
441 case 0x00: /* Audio Control 1 */
442 return s->audio_ctrl1;
444 case 0x01:
445 return 0xff00;
447 case 0x02: /* DAC Volume Control */
448 return s->volume;
450 case 0x03:
451 return 0x8b00;
453 case 0x04: /* Audio Control 2 */
454 l_ch = 1;
455 r_ch = 1;
456 if (s->softstep && !(s->dac_power & (1 << 10))) {
457 l_ch = (qemu_get_clock(vm_clock) >
458 s->volume_change + TSC_SOFTSTEP_DELAY);
459 r_ch = (qemu_get_clock(vm_clock) >
460 s->volume_change + TSC_SOFTSTEP_DELAY);
463 return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
465 case 0x05: /* Stereo DAC Power Control */
466 return 0x2aa0 | s->dac_power |
467 (((s->dac_power & (1 << 10)) &&
468 (qemu_get_clock(vm_clock) >
469 s->powerdown + TSC_POWEROFF_DELAY)) << 6);
471 case 0x06: /* Audio Control 3 */
472 val = s->audio_ctrl3 | 0x0001;
473 s->audio_ctrl3 &= 0xff3f;
474 return val;
476 case 0x07: /* LCH_BASS_BOOST_N0 */
477 case 0x08: /* LCH_BASS_BOOST_N1 */
478 case 0x09: /* LCH_BASS_BOOST_N2 */
479 case 0x0a: /* LCH_BASS_BOOST_N3 */
480 case 0x0b: /* LCH_BASS_BOOST_N4 */
481 case 0x0c: /* LCH_BASS_BOOST_N5 */
482 case 0x0d: /* LCH_BASS_BOOST_D1 */
483 case 0x0e: /* LCH_BASS_BOOST_D2 */
484 case 0x0f: /* LCH_BASS_BOOST_D4 */
485 case 0x10: /* LCH_BASS_BOOST_D5 */
486 case 0x11: /* RCH_BASS_BOOST_N0 */
487 case 0x12: /* RCH_BASS_BOOST_N1 */
488 case 0x13: /* RCH_BASS_BOOST_N2 */
489 case 0x14: /* RCH_BASS_BOOST_N3 */
490 case 0x15: /* RCH_BASS_BOOST_N4 */
491 case 0x16: /* RCH_BASS_BOOST_N5 */
492 case 0x17: /* RCH_BASS_BOOST_D1 */
493 case 0x18: /* RCH_BASS_BOOST_D2 */
494 case 0x19: /* RCH_BASS_BOOST_D4 */
495 case 0x1a: /* RCH_BASS_BOOST_D5 */
496 return s->filter_data[reg - 0x07];
498 case 0x1b: /* PLL Programmability 1 */
499 return s->pll[0];
501 case 0x1c: /* PLL Programmability 2 */
502 return s->pll[1];
504 case 0x1d: /* Audio Control 4 */
505 return (!s->softstep) << 14;
507 default:
508 #ifdef TSC_VERBOSE
509 fprintf(stderr, "tsc2102_audio_register_read: "
510 "no such register: 0x%02x\n", reg);
511 #endif
512 return 0xffff;
516 static void tsc2102_data_register_write(
517 struct tsc210x_state_s *s, int reg, uint16_t value)
519 switch (reg) {
520 case 0x00: /* X */
521 case 0x01: /* Y */
522 case 0x02: /* Z1 */
523 case 0x03: /* Z2 */
524 case 0x05: /* BAT1 */
525 case 0x06: /* BAT2 */
526 case 0x07: /* AUX1 */
527 case 0x08: /* AUX2 */
528 case 0x09: /* TEMP1 */
529 case 0x0a: /* TEMP2 */
530 return;
532 default:
533 #ifdef TSC_VERBOSE
534 fprintf(stderr, "tsc2102_data_register_write: "
535 "no such register: 0x%02x\n", reg);
536 #endif
540 static void tsc2102_control_register_write(
541 struct tsc210x_state_s *s, int reg, uint16_t value)
543 switch (reg) {
544 case 0x00: /* TSC ADC */
545 s->host_mode = value >> 15;
546 s->enabled = !(value & 0x4000);
547 if (s->busy && !s->enabled)
548 qemu_del_timer(s->timer);
549 s->busy &= s->enabled;
550 s->nextfunction = (value >> 10) & 0xf;
551 s->nextprecision = (value >> 8) & 3;
552 s->filter = value & 0xff;
553 return;
555 case 0x01: /* Status */
556 s->pin_func = value >> 14;
557 return;
559 case 0x03: /* Reference */
560 s->ref = value & 0x1f;
561 return;
563 case 0x04: /* Reset */
564 if (value == 0xbb00) {
565 if (s->busy)
566 qemu_del_timer(s->timer);
567 tsc210x_reset(s);
568 #ifdef TSC_VERBOSE
569 } else {
570 fprintf(stderr, "tsc2102_control_register_write: "
571 "wrong value written into RESET\n");
572 #endif
574 return;
576 case 0x05: /* Configuration */
577 s->timing = value & 0x3f;
578 #ifdef TSC_VERBOSE
579 if (value & ~0x3f)
580 fprintf(stderr, "tsc2102_control_register_write: "
581 "wrong value written into CONFIG\n");
582 #endif
583 return;
585 default:
586 #ifdef TSC_VERBOSE
587 fprintf(stderr, "tsc2102_control_register_write: "
588 "no such register: 0x%02x\n", reg);
589 #endif
593 static void tsc2102_audio_register_write(
594 struct tsc210x_state_s *s, int reg, uint16_t value)
596 switch (reg) {
597 case 0x00: /* Audio Control 1 */
598 s->audio_ctrl1 = value & 0x0f3f;
599 #ifdef TSC_VERBOSE
600 if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
601 fprintf(stderr, "tsc2102_audio_register_write: "
602 "wrong value written into Audio 1\n");
603 #endif
604 tsc2102_audio_rate_update(s);
605 if (s->audio)
606 tsc2102_audio_output_update(s);
607 return;
609 case 0x01:
610 #ifdef TSC_VERBOSE
611 if (value != 0xff00)
612 fprintf(stderr, "tsc2102_audio_register_write: "
613 "wrong value written into reg 0x01\n");
614 #endif
615 return;
617 case 0x02: /* DAC Volume Control */
618 s->volume = value;
619 s->volume_change = qemu_get_clock(vm_clock);
620 return;
622 case 0x03:
623 #ifdef TSC_VERBOSE
624 if (value != 0x8b00)
625 fprintf(stderr, "tsc2102_audio_register_write: "
626 "wrong value written into reg 0x03\n");
627 #endif
628 return;
630 case 0x04: /* Audio Control 2 */
631 s->audio_ctrl2 = value & 0xf7f2;
632 #ifdef TSC_VERBOSE
633 if (value & ~0xf7fd)
634 fprintf(stderr, "tsc2102_audio_register_write: "
635 "wrong value written into Audio 2\n");
636 #endif
637 return;
639 case 0x05: /* Stereo DAC Power Control */
640 if ((value & ~s->dac_power) & (1 << 10))
641 s->powerdown = qemu_get_clock(vm_clock);
643 s->dac_power = value & 0x9543;
644 #ifdef TSC_VERBOSE
645 if ((value & ~0x9543) != 0x2aa0)
646 fprintf(stderr, "tsc2102_audio_register_write: "
647 "wrong value written into Power\n");
648 #endif
649 tsc2102_audio_rate_update(s);
650 if (s->audio)
651 tsc2102_audio_output_update(s);
652 return;
654 case 0x06: /* Audio Control 3 */
655 s->audio_ctrl3 &= 0x00c0;
656 s->audio_ctrl3 |= value & 0xf800;
657 #ifdef TSC_VERBOSE
658 if (value & ~0xf8c7)
659 fprintf(stderr, "tsc2102_audio_register_write: "
660 "wrong value written into Audio 3\n");
661 #endif
662 if (s->audio)
663 tsc2102_audio_output_update(s);
664 return;
666 case 0x07: /* LCH_BASS_BOOST_N0 */
667 case 0x08: /* LCH_BASS_BOOST_N1 */
668 case 0x09: /* LCH_BASS_BOOST_N2 */
669 case 0x0a: /* LCH_BASS_BOOST_N3 */
670 case 0x0b: /* LCH_BASS_BOOST_N4 */
671 case 0x0c: /* LCH_BASS_BOOST_N5 */
672 case 0x0d: /* LCH_BASS_BOOST_D1 */
673 case 0x0e: /* LCH_BASS_BOOST_D2 */
674 case 0x0f: /* LCH_BASS_BOOST_D4 */
675 case 0x10: /* LCH_BASS_BOOST_D5 */
676 case 0x11: /* RCH_BASS_BOOST_N0 */
677 case 0x12: /* RCH_BASS_BOOST_N1 */
678 case 0x13: /* RCH_BASS_BOOST_N2 */
679 case 0x14: /* RCH_BASS_BOOST_N3 */
680 case 0x15: /* RCH_BASS_BOOST_N4 */
681 case 0x16: /* RCH_BASS_BOOST_N5 */
682 case 0x17: /* RCH_BASS_BOOST_D1 */
683 case 0x18: /* RCH_BASS_BOOST_D2 */
684 case 0x19: /* RCH_BASS_BOOST_D4 */
685 case 0x1a: /* RCH_BASS_BOOST_D5 */
686 s->filter_data[reg - 0x07] = value;
687 return;
689 case 0x1b: /* PLL Programmability 1 */
690 s->pll[0] = value & 0xfffc;
691 #ifdef TSC_VERBOSE
692 if (value & ~0xfffc)
693 fprintf(stderr, "tsc2102_audio_register_write: "
694 "wrong value written into PLL 1\n");
695 #endif
696 return;
698 case 0x1c: /* PLL Programmability 2 */
699 s->pll[1] = value & 0xfffc;
700 #ifdef TSC_VERBOSE
701 if (value & ~0xfffc)
702 fprintf(stderr, "tsc2102_audio_register_write: "
703 "wrong value written into PLL 2\n");
704 #endif
705 return;
707 case 0x1d: /* Audio Control 4 */
708 s->softstep = !(value & 0x4000);
709 #ifdef TSC_VERBOSE
710 if (value & ~0x4000)
711 fprintf(stderr, "tsc2102_audio_register_write: "
712 "wrong value written into Audio 4\n");
713 #endif
714 return;
716 default:
717 #ifdef TSC_VERBOSE
718 fprintf(stderr, "tsc2102_audio_register_write: "
719 "no such register: 0x%02x\n", reg);
720 #endif
724 /* This handles most of the chip logic. */
725 static void tsc210x_pin_update(struct tsc210x_state_s *s)
727 int64_t expires;
728 int pin_state;
730 switch (s->pin_func) {
731 case 0:
732 pin_state = s->pressure;
733 break;
734 case 1:
735 pin_state = !!s->dav;
736 break;
737 case 2:
738 default:
739 pin_state = s->pressure && !s->dav;
742 if (!s->enabled)
743 pin_state = 0;
745 if (pin_state != s->irq) {
746 s->irq = pin_state;
747 qemu_set_irq(s->pint, !s->irq);
750 switch (s->nextfunction) {
751 case TSC_MODE_XY_SCAN:
752 case TSC_MODE_XYZ_SCAN:
753 if (!s->pressure)
754 return;
755 break;
757 case TSC_MODE_X:
758 case TSC_MODE_Y:
759 case TSC_MODE_Z:
760 if (!s->pressure)
761 return;
762 /* Fall through */
763 case TSC_MODE_BAT1:
764 case TSC_MODE_BAT2:
765 case TSC_MODE_AUX:
766 case TSC_MODE_TEMP1:
767 case TSC_MODE_TEMP2:
768 if (s->dav)
769 s->enabled = 0;
770 break;
772 case TSC_MODE_AUX_SCAN:
773 case TSC_MODE_PORT_SCAN:
774 break;
776 case TSC_MODE_NO_SCAN:
777 case TSC_MODE_XX_DRV:
778 case TSC_MODE_YY_DRV:
779 case TSC_MODE_YX_DRV:
780 default:
781 return;
784 if (!s->enabled || s->busy)
785 return;
787 s->busy = 1;
788 s->precision = s->nextprecision;
789 s->function = s->nextfunction;
790 expires = qemu_get_clock(vm_clock) + (ticks_per_sec >> 10);
791 qemu_mod_timer(s->timer, expires);
794 static uint16_t tsc210x_read(struct tsc210x_state_s *s)
796 uint16_t ret = 0x0000;
798 if (!s->command)
799 fprintf(stderr, "tsc210x_read: SPI underrun!\n");
801 switch (s->page) {
802 case TSC_DATA_REGISTERS_PAGE:
803 ret = tsc2102_data_register_read(s, s->offset);
804 break;
805 case TSC_CONTROL_REGISTERS_PAGE:
806 ret = tsc2102_control_register_read(s, s->offset);
807 break;
808 case TSC_AUDIO_REGISTERS_PAGE:
809 ret = tsc2102_audio_register_read(s, s->offset);
810 break;
811 default:
812 cpu_abort(cpu_single_env, "tsc210x_read: wrong memory page\n");
815 tsc210x_pin_update(s);
817 /* Allow sequential reads. */
818 s->offset ++;
819 s->state = 0;
820 return ret;
823 static void tsc210x_write(struct tsc210x_state_s *s, uint16_t value)
826 * This is a two-state state machine for reading
827 * command and data every second time.
829 if (!s->state) {
830 s->command = value >> 15;
831 s->page = (value >> 11) & 0x0f;
832 s->offset = (value >> 5) & 0x3f;
833 s->state = 1;
834 } else {
835 if (s->command)
836 fprintf(stderr, "tsc210x_write: SPI overrun!\n");
837 else
838 switch (s->page) {
839 case TSC_DATA_REGISTERS_PAGE:
840 tsc2102_data_register_write(s, s->offset, value);
841 break;
842 case TSC_CONTROL_REGISTERS_PAGE:
843 tsc2102_control_register_write(s, s->offset, value);
844 break;
845 case TSC_AUDIO_REGISTERS_PAGE:
846 tsc2102_audio_register_write(s, s->offset, value);
847 break;
848 default:
849 cpu_abort(cpu_single_env,
850 "tsc210x_write: wrong memory page\n");
853 tsc210x_pin_update(s);
854 s->state = 0;
858 static void tsc210x_timer_tick(void *opaque)
860 struct tsc210x_state_s *s = opaque;
862 /* Timer ticked -- a set of conversions has been finished. */
864 if (!s->busy)
865 return;
867 s->busy = 0;
868 s->dav |= mode_regs[s->function];
869 tsc210x_pin_update(s);
872 static void tsc210x_touchscreen_event(void *opaque,
873 int x, int y, int z, int buttons_state)
875 struct tsc210x_state_s *s = opaque;
876 int p = s->pressure;
878 if (buttons_state) {
879 s->x = x;
880 s->y = y;
882 s->pressure = !!buttons_state;
885 * Note: We would get better responsiveness in the guest by
886 * signaling TS events immediately, but for now we simulate
887 * the first conversion delay for sake of correctness.
889 if (p != s->pressure)
890 tsc210x_pin_update(s);
893 static void tsc210x_i2s_swallow(struct tsc210x_state_s *s)
895 if (s->dac_voice[0])
896 tsc210x_out_flush(s, s->codec.out.len);
897 else
898 s->codec.out.len = 0;
901 static void tsc210x_i2s_set_rate(struct tsc210x_state_s *s, int in, int out)
903 s->i2s_tx_rate = out;
904 s->i2s_rx_rate = in;
907 static void tsc210x_save(QEMUFile *f, void *opaque)
909 struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque;
910 int64_t now = qemu_get_clock(vm_clock);
911 int i;
913 qemu_put_be16(f, s->x);
914 qemu_put_be16(f, s->y);
915 qemu_put_byte(f, s->pressure);
917 qemu_put_byte(f, s->state);
918 qemu_put_byte(f, s->page);
919 qemu_put_byte(f, s->offset);
920 qemu_put_byte(f, s->command);
922 qemu_put_byte(f, s->irq);
923 qemu_put_be16s(f, &s->dav);
925 qemu_put_timer(f, s->timer);
926 qemu_put_byte(f, s->enabled);
927 qemu_put_byte(f, s->host_mode);
928 qemu_put_byte(f, s->function);
929 qemu_put_byte(f, s->nextfunction);
930 qemu_put_byte(f, s->precision);
931 qemu_put_byte(f, s->nextprecision);
932 qemu_put_byte(f, s->filter);
933 qemu_put_byte(f, s->pin_func);
934 qemu_put_byte(f, s->ref);
935 qemu_put_byte(f, s->timing);
936 qemu_put_be32(f, s->noise);
938 qemu_put_be16s(f, &s->audio_ctrl1);
939 qemu_put_be16s(f, &s->audio_ctrl2);
940 qemu_put_be16s(f, &s->audio_ctrl3);
941 qemu_put_be16s(f, &s->pll[0]);
942 qemu_put_be16s(f, &s->pll[1]);
943 qemu_put_be16s(f, &s->volume);
944 qemu_put_be64(f, (uint64_t) (s->volume_change - now));
945 qemu_put_be64(f, (uint64_t) (s->powerdown - now));
946 qemu_put_byte(f, s->softstep);
947 qemu_put_be16s(f, &s->dac_power);
949 for (i = 0; i < 0x14; i ++)
950 qemu_put_be16s(f, &s->filter_data[i]);
953 static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
955 struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque;
956 int64_t now = qemu_get_clock(vm_clock);
957 int i;
959 s->x = qemu_get_be16(f);
960 s->y = qemu_get_be16(f);
961 s->pressure = qemu_get_byte(f);
963 s->state = qemu_get_byte(f);
964 s->page = qemu_get_byte(f);
965 s->offset = qemu_get_byte(f);
966 s->command = qemu_get_byte(f);
968 s->irq = qemu_get_byte(f);
969 qemu_get_be16s(f, &s->dav);
971 qemu_get_timer(f, s->timer);
972 s->enabled = qemu_get_byte(f);
973 s->host_mode = qemu_get_byte(f);
974 s->function = qemu_get_byte(f);
975 s->nextfunction = qemu_get_byte(f);
976 s->precision = qemu_get_byte(f);
977 s->nextprecision = qemu_get_byte(f);
978 s->filter = qemu_get_byte(f);
979 s->pin_func = qemu_get_byte(f);
980 s->ref = qemu_get_byte(f);
981 s->timing = qemu_get_byte(f);
982 s->noise = qemu_get_be32(f);
984 qemu_get_be16s(f, &s->audio_ctrl1);
985 qemu_get_be16s(f, &s->audio_ctrl2);
986 qemu_get_be16s(f, &s->audio_ctrl3);
987 qemu_get_be16s(f, &s->pll[0]);
988 qemu_get_be16s(f, &s->pll[1]);
989 qemu_get_be16s(f, &s->volume);
990 s->volume_change = (int64_t) qemu_get_be64(f) + now;
991 s->powerdown = (int64_t) qemu_get_be64(f) + now;
992 s->softstep = qemu_get_byte(f);
993 qemu_get_be16s(f, &s->dac_power);
995 for (i = 0; i < 0x14; i ++)
996 qemu_get_be16s(f, &s->filter_data[i]);
998 s->busy = qemu_timer_pending(s->timer);
999 qemu_set_irq(s->pint, !s->irq);
1001 return 0;
1004 static int tsc2102_iid = 0;
1006 struct uwire_slave_s *tsc2102_init(qemu_irq pint, AudioState *audio)
1008 struct tsc210x_state_s *s;
1010 s = (struct tsc210x_state_s *)
1011 qemu_mallocz(sizeof(struct tsc210x_state_s));
1012 memset(s, 0, sizeof(struct tsc210x_state_s));
1013 s->x = 160;
1014 s->y = 160;
1015 s->pressure = 0;
1016 s->precision = s->nextprecision = 0;
1017 s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
1018 s->pint = pint;
1019 s->name = "tsc2102";
1020 s->audio = audio;
1022 s->chip.opaque = s;
1023 s->chip.send = (void *) tsc210x_write;
1024 s->chip.receive = (void *) tsc210x_read;
1026 s->codec.opaque = s;
1027 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1028 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1029 s->codec.in.fifo = s->in_fifo;
1030 s->codec.out.fifo = s->out_fifo;
1032 tsc210x_reset(s);
1034 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1035 "QEMU TSC2102-driven Touchscreen");
1037 if (s->audio)
1038 AUD_register_card(s->audio, s->name, &s->card);
1040 qemu_register_reset((void *) tsc210x_reset, s);
1041 register_savevm(s->name, tsc2102_iid ++, 0,
1042 tsc210x_save, tsc210x_load, s);
1044 return &s->chip;
1047 struct i2s_codec_s *tsc210x_codec(struct uwire_slave_s *chip)
1049 struct tsc210x_state_s *s = (struct tsc210x_state_s *) chip->opaque;
1051 return &s->codec;