hw/ppc_oldworld.c

   1 /*
   2  * QEMU OldWorld PowerMac (currently ~G3 B&W) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "nvram.h"
  29 #include "pc.h"
  30 #include "sysemu.h"
  31 #include "net.h"
  32 #include "isa.h"
  33 #include "pci.h"
  34 #include "boards.h"
  35
  36 /* temporary frame buffer OSI calls for the video.x driver. The right
  37    solution is to modify the driver to use VGA PCI I/Os */
  38 /* XXX: to be removed. This is no way related to emulation */
  39 static int vga_osi_call (CPUState *env)
  40 {
  41     static int vga_vbl_enabled;
  42     int linesize;
  43
  44     //    printf("osi_call R5=" REGX "\n", ppc_dump_gpr(env, 5));
  45
  46     /* same handler as PearPC, coming from the original MOL video
  47        driver. */
  48     switch(env->gpr[5]) {
  49     case 4:
  50         break;
  51     case 28: /* set_vmode */
  52         if (env->gpr[6] != 1 || env->gpr[7] != 0)
  53             env->gpr[3] = 1;
  54         else
  55             env->gpr[3] = 0;
  56         break;
  57     case 29: /* get_vmode_info */
  58         if (env->gpr[6] != 0) {
  59             if (env->gpr[6] != 1 || env->gpr[7] != 0) {
  60                 env->gpr[3] = 1;
  61                 break;
  62             }
  63         }
  64         env->gpr[3] = 0;
  65         env->gpr[4] = (1 << 16) | 1; /* num_vmodes, cur_vmode */
  66         env->gpr[5] = (1 << 16) | 0; /* num_depths, cur_depth_mode */
  67         env->gpr[6] = (graphic_width << 16) | graphic_height; /* w, h */
  68         env->gpr[7] = 85 << 16; /* refresh rate */
  69         env->gpr[8] = (graphic_depth + 7) & ~7; /* depth (round to byte) */
  70         linesize = ((graphic_depth + 7) >> 3) * graphic_width;
  71         linesize = (linesize + 3) & ~3;
  72         env->gpr[9] = (linesize << 16) | 0; /* row_bytes, offset */
  73         break;
  74     case 31: /* set_video power */
  75         env->gpr[3] = 0;
  76         break;
  77     case 39: /* video_ctrl */
  78         if (env->gpr[6] == 0 || env->gpr[6] == 1)
  79             vga_vbl_enabled = env->gpr[6];
  80         env->gpr[3] = 0;
  81         break;
  82     case 47:
  83         break;
  84     case 59: /* set_color */
  85         /* R6 = index, R7 = RGB */
  86         env->gpr[3] = 0;
  87         break;
  88     case 64: /* get color */
  89         /* R6 = index */
  90         env->gpr[3] = 0;
  91         break;
  92     case 116: /* set hwcursor */
  93         /* R6 = x, R7 = y, R8 = visible, R9 = data */
  94         break;
  95     default:
  96         fprintf(stderr, "unsupported OSI call R5=" REGX "\n",
  97                 ppc_dump_gpr(env, 5));
  98         break;
  99     }
 100
 101     return 1; /* osi_call handled */
 102 }
 103
 104 static void ppc_heathrow_init (int ram_size, int vga_ram_size,
 105                                const char *boot_device, DisplayState *ds,
 106                                const char *kernel_filename,
 107                                const char *kernel_cmdline,
 108                                const char *initrd_filename,
 109                                const char *cpu_model)
 110 {
 111     CPUState *env = NULL, *envs[MAX_CPUS];
 112     char buf[1024];
 113     qemu_irq *pic, **heathrow_irqs;
 114     nvram_t nvram;
 115     m48t59_t *m48t59;
 116     int linux_boot, i;
 117     unsigned long bios_offset, vga_bios_offset;
 118     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
 119     PCIBus *pci_bus;
 120     MacIONVRAMState *nvr;
 121     int vga_bios_size, bios_size;
 122     qemu_irq *dummy_irq;
 123     int pic_mem_index, nvram_mem_index, dbdma_mem_index, cuda_mem_index;
 124     int ide_mem_index[2];
 125     int ppc_boot_device;
 126
 127     linux_boot = (kernel_filename != NULL);
 128
 129     /* init CPUs */
 130     if (cpu_model == NULL)
 131         cpu_model = "default";
 132     for (i = 0; i < smp_cpus; i++) {
 133         env = cpu_init(cpu_model);
 134         if (!env) {
 135             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 136             exit(1);
 137         }
 138         /* Set time-base frequency to 100 Mhz */
 139         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 140         env->osi_call = vga_osi_call;
 141         qemu_register_reset(&cpu_ppc_reset, env);
 142         register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
 143         envs[i] = env;
 144     }
 145     if (env->nip < 0xFFF80000) {
 146         /* Special test for PowerPC 601:
 147          * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
 148          * But the NVRAM is located at 0xFFF04000...
 149          */
 150         cpu_abort(env, "G3BW Mac hardware can not handle 1 MB BIOS\n");
 151     }
 152
 153     /* allocate RAM */
 154     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 155
 156     /* allocate and load BIOS */
 157     bios_offset = ram_size + vga_ram_size;
 158     if (bios_name == NULL)
 159         bios_name = BIOS_FILENAME;
 160     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 161     bios_size = load_image(buf, phys_ram_base + bios_offset);
 162     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 163         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 164         exit(1);
 165     }
 166     bios_size = (bios_size + 0xfff) & ~0xfff;
 167     if (bios_size > 0x00080000) {
 168         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 169         cpu_abort(env, "G3BW Mac hardware can not handle 1 MB BIOS\n");
 170     }
 171     cpu_register_physical_memory((uint32_t)(-bios_size),
 172                                  bios_size, bios_offset | IO_MEM_ROM);
 173
 174     /* allocate and load VGA BIOS */
 175     vga_bios_offset = bios_offset + bios_size;
 176     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 177     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 178     if (vga_bios_size < 0) {
 179         /* if no bios is present, we can still work */
 180         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 181         vga_bios_size = 0;
 182     } else {
 183         /* set a specific header (XXX: find real Apple format for NDRV
 184            drivers) */
 185         phys_ram_base[vga_bios_offset] = 'N';
 186         phys_ram_base[vga_bios_offset + 1] = 'D';
 187         phys_ram_base[vga_bios_offset + 2] = 'R';
 188         phys_ram_base[vga_bios_offset + 3] = 'V';
 189         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 190                      vga_bios_size);
 191         vga_bios_size += 8;
 192     }
 193     vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
 194
 195     if (linux_boot) {
 196         kernel_base = KERNEL_LOAD_ADDR;
 197         /* now we can load the kernel */
 198         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 199         if (kernel_size < 0) {
 200             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 201                       kernel_filename);
 202             exit(1);
 203         }
 204         /* load initrd */
 205         if (initrd_filename) {
 206             initrd_base = INITRD_LOAD_ADDR;
 207             initrd_size = load_image(initrd_filename,
 208                                      phys_ram_base + initrd_base);
 209             if (initrd_size < 0) {
 210                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 211                           initrd_filename);
 212                 exit(1);
 213             }
 214         } else {
 215             initrd_base = 0;
 216             initrd_size = 0;
 217         }
 218         ppc_boot_device = 'm';
 219     } else {
 220         kernel_base = 0;
 221         kernel_size = 0;
 222         initrd_base = 0;
 223         initrd_size = 0;
 224         ppc_boot_device = '\0';
 225         for (i = 0; boot_device[i] != '\0'; i++) {
 226             /* TOFIX: for now, the second IDE channel is not properly
 227              *        used by OHW. The Mac floppy disk are not emulated.
 228              *        For now, OHW cannot boot from the network.
 229              */
 230 #if 0
 231             if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 232                 ppc_boot_device = boot_device[i];
 233                 break;
 234             }
 235 #else
 236             if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 237                 ppc_boot_device = boot_device[i];
 238                 break;
 239             }
 240 #endif
 241         }
 242         if (ppc_boot_device == '\0') {
 243             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 244             exit(1);
 245         }
 246     }
 247
 248     isa_mem_base = 0x80000000;
 249
 250     /* Register 2 MB of ISA IO space */
 251     isa_mmio_init(0xfe000000, 0x00200000);
 252
 253     /* XXX: we register only 1 output pin for heathrow PIC */
 254     heathrow_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 255     heathrow_irqs[0] =
 256         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * 1);
 257     /* Connect the heathrow PIC outputs to the 6xx bus */
 258     for (i = 0; i < smp_cpus; i++) {
 259         switch (PPC_INPUT(env)) {
 260         case PPC_FLAGS_INPUT_6xx:
 261             heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
 262             heathrow_irqs[i][0] =
 263                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 264             break;
 265         default:
 266             cpu_abort(env, "Bus model not supported on OldWorld Mac machine\n");
 267             exit(1);
 268         }
 269     }
 270
 271     /* init basic PC hardware */
 272     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 273         cpu_abort(env, "Only 6xx bus is supported on heathrow machine\n");
 274         exit(1);
 275     }
 276     pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
 277     pci_bus = pci_grackle_init(0xfec00000, pic);
 278     pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
 279                  ram_size, vga_ram_size,
 280                  vga_bios_offset, vga_bios_size);
 281
 282     /* XXX: suppress that */
 283     dummy_irq = i8259_init(NULL);
 284
 285     /* XXX: use Mac Serial port */
 286     serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
 287
 288     for(i = 0; i < nb_nics; i++) {
 289         if (!nd_table[i].model)
 290             nd_table[i].model = "ne2k_pci";
 291         pci_nic_init(pci_bus, &nd_table[i], -1);
 292     }
 293
 294     /* First IDE channel is a CMD646 on the PCI bus */
 295     pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
 296     /* Second IDE channel is a MAC IDE on the MacIO bus */
 297     ide_mem_index[0] = -1;
 298     ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x0D]);
 299
 300     /* cuda also initialize ADB */
 301     cuda_init(&cuda_mem_index, pic[0x12]);
 302
 303     adb_kbd_init(&adb_bus);
 304     adb_mouse_init(&adb_bus);
 305
 306     nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
 307     pmac_format_nvram_partition(nvr, 0x2000);
 308
 309     dbdma_init(&dbdma_mem_index);
 310
 311     macio_init(pci_bus, 0x0017, 1, pic_mem_index, dbdma_mem_index,
 312                cuda_mem_index, nvr, 2, ide_mem_index);
 313
 314     if (usb_enabled) {
 315         usb_ohci_init_pci(pci_bus, 3, -1);
 316     }
 317
 318     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 319         graphic_depth = 15;
 320
 321     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 322     nvram.opaque = m48t59;
 323     nvram.read_fn = &m48t59_read;
 324     nvram.write_fn = &m48t59_write;
 325     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "HEATHROW", ram_size,
 326                          ppc_boot_device, kernel_base, kernel_size,
 327                          kernel_cmdline,
 328                          initrd_base, initrd_size,
 329                          /* XXX: need an option to load a NVRAM image */
 330                          0,
 331                          graphic_width, graphic_height, graphic_depth);
 332     /* No PCI init: the BIOS will do it */
 333
 334     /* Special port to get debug messages from Open-Firmware */
 335     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 336 }
 337
 338 QEMUMachine heathrow_machine = {
 339     "g3bw",
 340     "Heathrow based PowerMAC",
 341     ppc_heathrow_init,
 342 };