gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "qemu-common.h"
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #endif
  37
  38 #include "qemu_socket.h"
  39 #ifdef _WIN32
  40 /* XXX: these constants may be independent of the host ones even for Unix */
  41 #ifndef SIGTRAP
  42 #define SIGTRAP 5
  43 #endif
  44 #ifndef SIGINT
  45 #define SIGINT 2
  46 #endif
  47 #else
  48 #include <signal.h>
  49 #endif
  50
  51 //#define DEBUG_GDB
  52
  53 enum RSState {
  54     RS_IDLE,
  55     RS_GETLINE,
  56     RS_CHKSUM1,
  57     RS_CHKSUM2,
  58     RS_SYSCALL,
  59 };
  60 typedef struct GDBState {
  61     CPUState *env; /* current CPU */
  62     enum RSState state; /* parsing state */
  63     char line_buf[4096];
  64     int line_buf_index;
  65     int line_csum;
  66     uint8_t last_packet[4100];
  67     int last_packet_len;
  68     int signal;
  69 #ifdef CONFIG_USER_ONLY
  70     int fd;
  71     int running_state;
  72 #else
  73     CharDriverState *chr;
  74 #endif
  75 } GDBState;
  76
  77 /* By default use no IRQs and no timers while single stepping so as to
  78  * make single stepping like an ICE HW step.
  79  */
  80 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
  81
  82 #ifdef CONFIG_USER_ONLY
  83 /* XXX: This is not thread safe.  Do we care?  */
  84 static int gdbserver_fd = -1;
  85
  86 /* XXX: remove this hack.  */
  87 static GDBState gdbserver_state;
  88
  89 static int get_char(GDBState *s)
  90 {
  91     uint8_t ch;
  92     int ret;
  93
  94     for(;;) {
  95         ret = recv(s->fd, &ch, 1, 0);
  96         if (ret < 0) {
  97             if (errno == ECONNRESET)
  98                 s->fd = -1;
  99             if (errno != EINTR && errno != EAGAIN)
 100                 return -1;
 101         } else if (ret == 0) {
 102             close(s->fd);
 103             s->fd = -1;
 104             return -1;
 105         } else {
 106             break;
 107         }
 108     }
 109     return ch;
 110 }
 111 #endif
 112
 113 /* GDB stub state for use by semihosting syscalls.  */
 114 static GDBState *gdb_syscall_state;
 115 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 116
 117 enum {
 118     GDB_SYS_UNKNOWN,
 119     GDB_SYS_ENABLED,
 120     GDB_SYS_DISABLED,
 121 } gdb_syscall_mode;
 122
 123 /* If gdb is connected when the first semihosting syscall occurs then use
 124    remote gdb syscalls.  Otherwise use native file IO.  */
 125 int use_gdb_syscalls(void)
 126 {
 127     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 128         gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
 129                                               : GDB_SYS_DISABLED);
 130     }
 131     return gdb_syscall_mode == GDB_SYS_ENABLED;
 132 }
 133
 134 /* Resume execution.  */
 135 static inline void gdb_continue(GDBState *s)
 136 {
 137 #ifdef CONFIG_USER_ONLY
 138     s->running_state = 1;
 139 #else
 140     vm_start();
 141 #endif
 142 }
 143
 144 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 145 {
 146 #ifdef CONFIG_USER_ONLY
 147     int ret;
 148
 149     while (len > 0) {
 150         ret = send(s->fd, buf, len, 0);
 151         if (ret < 0) {
 152             if (errno != EINTR && errno != EAGAIN)
 153                 return;
 154         } else {
 155             buf += ret;
 156             len -= ret;
 157         }
 158     }
 159 #else
 160     qemu_chr_write(s->chr, buf, len);
 161 #endif
 162 }
 163
 164 static inline int fromhex(int v)
 165 {
 166     if (v >= '0' && v <= '9')
 167         return v - '0';
 168     else if (v >= 'A' && v <= 'F')
 169         return v - 'A' + 10;
 170     else if (v >= 'a' && v <= 'f')
 171         return v - 'a' + 10;
 172     else
 173         return 0;
 174 }
 175
 176 static inline int tohex(int v)
 177 {
 178     if (v < 10)
 179         return v + '0';
 180     else
 181         return v - 10 + 'a';
 182 }
 183
 184 static void memtohex(char *buf, const uint8_t *mem, int len)
 185 {
 186     int i, c;
 187     char *q;
 188     q = buf;
 189     for(i = 0; i < len; i++) {
 190         c = mem[i];
 191         *q++ = tohex(c >> 4);
 192         *q++ = tohex(c & 0xf);
 193     }
 194     *q = '\0';
 195 }
 196
 197 static void hextomem(uint8_t *mem, const char *buf, int len)
 198 {
 199     int i;
 200
 201     for(i = 0; i < len; i++) {
 202         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 203         buf += 2;
 204     }
 205 }
 206
 207 /* return -1 if error, 0 if OK */
 208 static int put_packet(GDBState *s, char *buf)
 209 {
 210     int len, csum, i;
 211     uint8_t *p;
 212
 213 #ifdef DEBUG_GDB
 214     printf("reply='%s'\n", buf);
 215 #endif
 216
 217     for(;;) {
 218         p = s->last_packet;
 219         *(p++) = '$';
 220         len = strlen(buf);
 221         memcpy(p, buf, len);
 222         p += len;
 223         csum = 0;
 224         for(i = 0; i < len; i++) {
 225             csum += buf[i];
 226         }
 227         *(p++) = '#';
 228         *(p++) = tohex((csum >> 4) & 0xf);
 229         *(p++) = tohex((csum) & 0xf);
 230
 231         s->last_packet_len = p - s->last_packet;
 232         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 233
 234 #ifdef CONFIG_USER_ONLY
 235         i = get_char(s);
 236         if (i < 0)
 237             return -1;
 238         if (i == '+')
 239             break;
 240 #else
 241         break;
 242 #endif
 243     }
 244     return 0;
 245 }
 246
 247 #if defined(TARGET_I386)
 248
 249 #ifdef TARGET_X86_64
 250 static const uint8_t gdb_x86_64_regs[16] = {
 251     R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
 252     8, 9, 10, 11, 12, 13, 14, 15,
 253 };
 254 #endif
 255
 256 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 257 {
 258     int i, fpus, nb_regs;
 259     uint8_t *p;
 260
 261     p = mem_buf;
 262 #ifdef TARGET_X86_64
 263     if (env->hflags & HF_CS64_MASK) {
 264         nb_regs = 16;
 265         for(i = 0; i < 16; i++) {
 266             *(uint64_t *)p = tswap64(env->regs[gdb_x86_64_regs[i]]);
 267             p += 8;
 268         }
 269         *(uint64_t *)p = tswap64(env->eip);
 270         p += 8;
 271     } else
 272 #endif
 273     {
 274         nb_regs = 8;
 275         for(i = 0; i < 8; i++) {
 276             *(uint32_t *)p = tswap32(env->regs[i]);
 277             p += 4;
 278         }
 279         *(uint32_t *)p = tswap32(env->eip);
 280         p += 4;
 281     }
 282
 283     *(uint32_t *)p = tswap32(env->eflags);
 284     p += 4;
 285     *(uint32_t *)p = tswap32(env->segs[R_CS].selector);
 286     p += 4;
 287     *(uint32_t *)p = tswap32(env->segs[R_SS].selector);
 288     p += 4;
 289     *(uint32_t *)p = tswap32(env->segs[R_DS].selector);
 290     p += 4;
 291     *(uint32_t *)p = tswap32(env->segs[R_ES].selector);
 292     p += 4;
 293     *(uint32_t *)p = tswap32(env->segs[R_FS].selector);
 294     p += 4;
 295     *(uint32_t *)p = tswap32(env->segs[R_GS].selector);
 296     p += 4;
 297     for(i = 0; i < 8; i++) {
 298         /* XXX: convert floats */
 299 #ifdef USE_X86LDOUBLE
 300         memcpy(p, &env->fpregs[i], 10);
 301 #else
 302         memset(p, 0, 10);
 303 #endif
 304         p += 10;
 305     }
 306     *(uint32_t *)p = tswap32(env->fpuc); /* fctrl */
 307     p += 4;
 308     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 309     *(uint32_t *)p = tswap32(fpus); /* fstat */
 310     p += 4;
 311     *(uint32_t *)p = 0; /* ftag */
 312     p += 4;
 313     *(uint32_t *)p = 0; /* fiseg */
 314     p += 4;
 315     *(uint32_t *)p = 0; /* fioff */
 316     p += 4;
 317     *(uint32_t *)p = 0; /* foseg */
 318     p += 4;
 319     *(uint32_t *)p = 0; /* fooff */
 320     p += 4;
 321     *(uint32_t *)p = 0; /* fop */
 322     p += 4;
 323     for(i = 0; i < nb_regs; i++) {
 324         *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(0));
 325         p += 8;
 326         *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(1));
 327         p += 8;
 328     }
 329     *(uint32_t *)p = tswap32(env->mxcsr);
 330     p += 4;
 331     return p - mem_buf;
 332 }
 333
 334 static inline void cpu_gdb_load_seg(CPUState *env, const uint8_t **pp,
 335                                     int sreg)
 336 {
 337     const uint8_t *p;
 338     uint32_t sel;
 339     p = *pp;
 340     sel = tswap32(*(uint32_t *)p);
 341     p += 4;
 342     if (sel != env->segs[sreg].selector) {
 343 #if defined(CONFIG_USER_ONLY)
 344         cpu_x86_load_seg(env, sreg, sel);
 345 #else
 346         /* XXX: do it with a debug function which does not raise an
 347            exception */
 348 #endif
 349     }
 350     *pp = p;
 351 }
 352
 353 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 354 {
 355     const uint8_t *p = mem_buf;
 356     int i, nb_regs;
 357     uint16_t fpus;
 358
 359 #ifdef TARGET_X86_64
 360     if (env->hflags & HF_CS64_MASK) {
 361         nb_regs = 16;
 362         for(i = 0; i < 16; i++) {
 363             env->regs[gdb_x86_64_regs[i]] = tswap64(*(uint64_t *)p);
 364             p += 8;
 365         }
 366         env->eip = tswap64(*(uint64_t *)p);
 367         p += 8;
 368     } else
 369 #endif
 370     {
 371         nb_regs = 8;
 372         for(i = 0; i < 8; i++) {
 373             env->regs[i] = tswap32(*(uint32_t *)p);
 374             p += 4;
 375         }
 376         env->eip = tswap32(*(uint32_t *)p);
 377         p += 4;
 378     }
 379     env->eflags = tswap32(*(uint32_t *)p);
 380     p += 4;
 381     cpu_gdb_load_seg(env, &p, R_CS);
 382     cpu_gdb_load_seg(env, &p, R_SS);
 383     cpu_gdb_load_seg(env, &p, R_DS);
 384     cpu_gdb_load_seg(env, &p, R_ES);
 385     cpu_gdb_load_seg(env, &p, R_FS);
 386     cpu_gdb_load_seg(env, &p, R_GS);
 387
 388     /* FPU state */
 389     for(i = 0; i < 8; i++) {
 390         /* XXX: convert floats */
 391 #ifdef USE_X86LDOUBLE
 392         memcpy(&env->fpregs[i], p, 10);
 393 #endif
 394         p += 10;
 395     }
 396     env->fpuc = tswap32(*(uint32_t *)p); /* fctrl */
 397     p += 4;
 398     fpus = tswap32(*(uint32_t *)p);
 399     p += 4;
 400     env->fpstt = (fpus >> 11) & 7;
 401     env->fpus = fpus & ~0x3800;
 402     p += 4 * 6;
 403
 404     if (size >= ((p - mem_buf) + 16 * nb_regs + 4)) {
 405         /* SSE state */
 406         for(i = 0; i < nb_regs; i++) {
 407             env->xmm_regs[i].XMM_Q(0) = tswap64(*(uint64_t *)p);
 408             p += 8;
 409             env->xmm_regs[i].XMM_Q(1) = tswap64(*(uint64_t *)p);
 410             p += 8;
 411         }
 412         env->mxcsr = tswap32(*(uint32_t *)p);
 413         p += 4;
 414     }
 415 }
 416
 417 #elif defined (TARGET_PPC)
 418 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 419 {
 420     uint32_t *registers = (uint32_t *)mem_buf, tmp;
 421     int i;
 422
 423     /* fill in gprs */
 424     for(i = 0; i < 32; i++) {
 425         registers[i] = tswapl(env->gpr[i]);
 426     }
 427     /* fill in fprs */
 428     for (i = 0; i < 32; i++) {
 429         registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 430         registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
 431     }
 432     /* nip, msr, ccr, lnk, ctr, xer, mq */
 433     registers[96] = tswapl(env->nip);
 434     registers[97] = tswapl(env->msr);
 435     tmp = 0;
 436     for (i = 0; i < 8; i++)
 437         tmp |= env->crf[i] << (32 - ((i + 1) * 4));
 438     registers[98] = tswapl(tmp);
 439     registers[99] = tswapl(env->lr);
 440     registers[100] = tswapl(env->ctr);
 441     registers[101] = tswapl(ppc_load_xer(env));
 442     registers[102] = 0;
 443
 444     return 103 * 4;
 445 }
 446
 447 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 448 {
 449     uint32_t *registers = (uint32_t *)mem_buf;
 450     int i;
 451
 452     /* fill in gprs */
 453     for (i = 0; i < 32; i++) {
 454         env->gpr[i] = tswapl(registers[i]);
 455     }
 456     /* fill in fprs */
 457     for (i = 0; i < 32; i++) {
 458         *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
 459         *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
 460     }
 461     /* nip, msr, ccr, lnk, ctr, xer, mq */
 462     env->nip = tswapl(registers[96]);
 463     ppc_store_msr(env, tswapl(registers[97]));
 464     registers[98] = tswapl(registers[98]);
 465     for (i = 0; i < 8; i++)
 466         env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
 467     env->lr = tswapl(registers[99]);
 468     env->ctr = tswapl(registers[100]);
 469     ppc_store_xer(env, tswapl(registers[101]));
 470 }
 471 #elif defined (TARGET_SPARC)
 472 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 473 {
 474     target_ulong *registers = (target_ulong *)mem_buf;
 475     int i;
 476
 477     /* fill in g0..g7 */
 478     for(i = 0; i < 8; i++) {
 479         registers[i] = tswapl(env->gregs[i]);
 480     }
 481     /* fill in register window */
 482     for(i = 0; i < 24; i++) {
 483         registers[i + 8] = tswapl(env->regwptr[i]);
 484     }
 485 #ifndef TARGET_SPARC64
 486     /* fill in fprs */
 487     for (i = 0; i < 32; i++) {
 488         registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 489     }
 490     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 491     registers[64] = tswapl(env->y);
 492     {
 493         target_ulong tmp;
 494
 495         tmp = GET_PSR(env);
 496         registers[65] = tswapl(tmp);
 497     }
 498     registers[66] = tswapl(env->wim);
 499     registers[67] = tswapl(env->tbr);
 500     registers[68] = tswapl(env->pc);
 501     registers[69] = tswapl(env->npc);
 502     registers[70] = tswapl(env->fsr);
 503     registers[71] = 0; /* csr */
 504     registers[72] = 0;
 505     return 73 * sizeof(target_ulong);
 506 #else
 507     /* fill in fprs */
 508     for (i = 0; i < 64; i += 2) {
 509         uint64_t tmp;
 510
 511         tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
 512         tmp |= *(uint32_t *)&env->fpr[i + 1];
 513         registers[i / 2 + 32] = tswap64(tmp);
 514     }
 515     registers[64] = tswapl(env->pc);
 516     registers[65] = tswapl(env->npc);
 517     registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
 518                            ((env->asi & 0xff) << 24) |
 519                            ((env->pstate & 0xfff) << 8) |
 520                            GET_CWP64(env));
 521     registers[67] = tswapl(env->fsr);
 522     registers[68] = tswapl(env->fprs);
 523     registers[69] = tswapl(env->y);
 524     return 70 * sizeof(target_ulong);
 525 #endif
 526 }
 527
 528 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 529 {
 530     target_ulong *registers = (target_ulong *)mem_buf;
 531     int i;
 532
 533     /* fill in g0..g7 */
 534     for(i = 0; i < 7; i++) {
 535         env->gregs[i] = tswapl(registers[i]);
 536     }
 537     /* fill in register window */
 538     for(i = 0; i < 24; i++) {
 539         env->regwptr[i] = tswapl(registers[i + 8]);
 540     }
 541 #ifndef TARGET_SPARC64
 542     /* fill in fprs */
 543     for (i = 0; i < 32; i++) {
 544         *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
 545     }
 546     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 547     env->y = tswapl(registers[64]);
 548     PUT_PSR(env, tswapl(registers[65]));
 549     env->wim = tswapl(registers[66]);
 550     env->tbr = tswapl(registers[67]);
 551     env->pc = tswapl(registers[68]);
 552     env->npc = tswapl(registers[69]);
 553     env->fsr = tswapl(registers[70]);
 554 #else
 555     for (i = 0; i < 64; i += 2) {
 556         uint64_t tmp;
 557
 558         tmp = tswap64(registers[i / 2 + 32]);
 559         *((uint32_t *)&env->fpr[i]) = tmp >> 32;
 560         *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
 561     }
 562     env->pc = tswapl(registers[64]);
 563     env->npc = tswapl(registers[65]);
 564     {
 565         uint64_t tmp = tswapl(registers[66]);
 566
 567         PUT_CCR(env, tmp >> 32);
 568         env->asi = (tmp >> 24) & 0xff;
 569         env->pstate = (tmp >> 8) & 0xfff;
 570         PUT_CWP64(env, tmp & 0xff);
 571     }
 572     env->fsr = tswapl(registers[67]);
 573     env->fprs = tswapl(registers[68]);
 574     env->y = tswapl(registers[69]);
 575 #endif
 576 }
 577 #elif defined (TARGET_ARM)
 578 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 579 {
 580     int i;
 581     uint8_t *ptr;
 582
 583     ptr = mem_buf;
 584     /* 16 core integer registers (4 bytes each).  */
 585     for (i = 0; i < 16; i++)
 586       {
 587         *(uint32_t *)ptr = tswapl(env->regs[i]);
 588         ptr += 4;
 589       }
 590     /* 8 FPA registers (12 bytes each), FPS (4 bytes).
 591        Not yet implemented.  */
 592     memset (ptr, 0, 8 * 12 + 4);
 593     ptr += 8 * 12 + 4;
 594     /* CPSR (4 bytes).  */
 595     *(uint32_t *)ptr = tswapl (cpsr_read(env));
 596     ptr += 4;
 597
 598     return ptr - mem_buf;
 599 }
 600
 601 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 602 {
 603     int i;
 604     uint8_t *ptr;
 605
 606     ptr = mem_buf;
 607     /* Core integer registers.  */
 608     for (i = 0; i < 16; i++)
 609       {
 610         env->regs[i] = tswapl(*(uint32_t *)ptr);
 611         ptr += 4;
 612       }
 613     /* Ignore FPA regs and scr.  */
 614     ptr += 8 * 12 + 4;
 615     cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
 616 }
 617 #elif defined (TARGET_M68K)
 618 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 619 {
 620     int i;
 621     uint8_t *ptr;
 622     CPU_DoubleU u;
 623
 624     ptr = mem_buf;
 625     /* D0-D7 */
 626     for (i = 0; i < 8; i++) {
 627         *(uint32_t *)ptr = tswapl(env->dregs[i]);
 628         ptr += 4;
 629     }
 630     /* A0-A7 */
 631     for (i = 0; i < 8; i++) {
 632         *(uint32_t *)ptr = tswapl(env->aregs[i]);
 633         ptr += 4;
 634     }
 635     *(uint32_t *)ptr = tswapl(env->sr);
 636     ptr += 4;
 637     *(uint32_t *)ptr = tswapl(env->pc);
 638     ptr += 4;
 639     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 640        ColdFire has 8-bit double precision registers.  */
 641     for (i = 0; i < 8; i++) {
 642         u.d = env->fregs[i];
 643         *(uint32_t *)ptr = tswap32(u.l.upper);
 644         *(uint32_t *)ptr = tswap32(u.l.lower);
 645     }
 646     /* FP control regs (not implemented).  */
 647     memset (ptr, 0, 3 * 4);
 648     ptr += 3 * 4;
 649
 650     return ptr - mem_buf;
 651 }
 652
 653 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 654 {
 655     int i;
 656     uint8_t *ptr;
 657     CPU_DoubleU u;
 658
 659     ptr = mem_buf;
 660     /* D0-D7 */
 661     for (i = 0; i < 8; i++) {
 662         env->dregs[i] = tswapl(*(uint32_t *)ptr);
 663         ptr += 4;
 664     }
 665     /* A0-A7 */
 666     for (i = 0; i < 8; i++) {
 667         env->aregs[i] = tswapl(*(uint32_t *)ptr);
 668         ptr += 4;
 669     }
 670     env->sr = tswapl(*(uint32_t *)ptr);
 671     ptr += 4;
 672     env->pc = tswapl(*(uint32_t *)ptr);
 673     ptr += 4;
 674     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 675        ColdFire has 8-bit double precision registers.  */
 676     for (i = 0; i < 8; i++) {
 677         u.l.upper = tswap32(*(uint32_t *)ptr);
 678         u.l.lower = tswap32(*(uint32_t *)ptr);
 679         env->fregs[i] = u.d;
 680     }
 681     /* FP control regs (not implemented).  */
 682     ptr += 3 * 4;
 683 }
 684 #elif defined (TARGET_MIPS)
 685 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 686 {
 687     int i;
 688     uint8_t *ptr;
 689
 690     ptr = mem_buf;
 691     for (i = 0; i < 32; i++)
 692       {
 693         *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
 694         ptr += sizeof(target_ulong);
 695       }
 696
 697     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
 698     ptr += sizeof(target_ulong);
 699
 700     *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
 701     ptr += sizeof(target_ulong);
 702
 703     *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
 704     ptr += sizeof(target_ulong);
 705
 706     *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
 707     ptr += sizeof(target_ulong);
 708
 709     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
 710     ptr += sizeof(target_ulong);
 711
 712     *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
 713     ptr += sizeof(target_ulong);
 714
 715     if (env->CP0_Config1 & (1 << CP0C1_FP))
 716       {
 717         for (i = 0; i < 32; i++)
 718           {
 719             if (env->CP0_Status & (1 << CP0St_FR))
 720               *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
 721             else
 722               *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
 723             ptr += sizeof(target_ulong);
 724           }
 725
 726         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
 727         ptr += sizeof(target_ulong);
 728
 729         *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
 730         ptr += sizeof(target_ulong);
 731       }
 732
 733     /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
 734     *(target_ulong *)ptr = 0;
 735     ptr += sizeof(target_ulong);
 736
 737     /* Registers for embedded use, we just pad them. */
 738     for (i = 0; i < 16; i++)
 739       {
 740         *(target_ulong *)ptr = 0;
 741         ptr += sizeof(target_ulong);
 742       }
 743
 744     /* Processor ID. */
 745     *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
 746     ptr += sizeof(target_ulong);
 747
 748     return ptr - mem_buf;
 749 }
 750
 751 /* convert MIPS rounding mode in FCR31 to IEEE library */
 752 static unsigned int ieee_rm[] =
 753   {
 754     float_round_nearest_even,
 755     float_round_to_zero,
 756     float_round_up,
 757     float_round_down
 758   };
 759 #define RESTORE_ROUNDING_MODE \
 760     set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
 761
 762 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 763 {
 764     int i;
 765     uint8_t *ptr;
 766
 767     ptr = mem_buf;
 768     for (i = 0; i < 32; i++)
 769       {
 770         env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
 771         ptr += sizeof(target_ulong);
 772       }
 773
 774     env->CP0_Status = tswapl(*(target_ulong *)ptr);
 775     ptr += sizeof(target_ulong);
 776
 777     env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
 778     ptr += sizeof(target_ulong);
 779
 780     env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
 781     ptr += sizeof(target_ulong);
 782
 783     env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
 784     ptr += sizeof(target_ulong);
 785
 786     env->CP0_Cause = tswapl(*(target_ulong *)ptr);
 787     ptr += sizeof(target_ulong);
 788
 789     env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
 790     ptr += sizeof(target_ulong);
 791
 792     if (env->CP0_Config1 & (1 << CP0C1_FP))
 793       {
 794         for (i = 0; i < 32; i++)
 795           {
 796             if (env->CP0_Status & (1 << CP0St_FR))
 797               env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
 798             else
 799               env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
 800             ptr += sizeof(target_ulong);
 801           }
 802
 803         env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
 804         ptr += sizeof(target_ulong);
 805
 806         /* The remaining registers are assumed to be read-only. */
 807
 808         /* set rounding mode */
 809         RESTORE_ROUNDING_MODE;
 810
 811 #ifndef CONFIG_SOFTFLOAT
 812         /* no floating point exception for native float */
 813         SET_FP_ENABLE(env->fcr31, 0);
 814 #endif
 815       }
 816 }
 817 #elif defined (TARGET_SH4)
 818
 819 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 820
 821 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 822 {
 823   uint32_t *ptr = (uint32_t *)mem_buf;
 824   int i;
 825
 826 #define SAVE(x) *ptr++=tswapl(x)
 827   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 828       for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 829   } else {
 830       for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 831   }
 832   for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
 833   SAVE (env->pc);
 834   SAVE (env->pr);
 835   SAVE (env->gbr);
 836   SAVE (env->vbr);
 837   SAVE (env->mach);
 838   SAVE (env->macl);
 839   SAVE (env->sr);
 840   SAVE (env->fpul);
 841   SAVE (env->fpscr);
 842   for (i = 0; i < 16; i++)
 843       SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 844   SAVE (env->ssr);
 845   SAVE (env->spc);
 846   for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 847   for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 848   return ((uint8_t *)ptr - mem_buf);
 849 }
 850
 851 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 852 {
 853   uint32_t *ptr = (uint32_t *)mem_buf;
 854   int i;
 855
 856 #define LOAD(x) (x)=*ptr++;
 857   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 858       for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 859   } else {
 860       for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 861   }
 862   for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
 863   LOAD (env->pc);
 864   LOAD (env->pr);
 865   LOAD (env->gbr);
 866   LOAD (env->vbr);
 867   LOAD (env->mach);
 868   LOAD (env->macl);
 869   LOAD (env->sr);
 870   LOAD (env->fpul);
 871   LOAD (env->fpscr);
 872   for (i = 0; i < 16; i++)
 873       LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 874   LOAD (env->ssr);
 875   LOAD (env->spc);
 876   for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 877   for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 878 }
 879 #elif defined (TARGET_CRIS)
 880
 881 static int cris_save_32 (unsigned char *d, uint32_t value)
 882 {
 883         *d++ = (value);
 884         *d++ = (value >>= 8);
 885         *d++ = (value >>= 8);
 886         *d++ = (value >>= 8);
 887         return 4;
 888 }
 889 static int cris_save_16 (unsigned char *d, uint32_t value)
 890 {
 891         *d++ = (value);
 892         *d++ = (value >>= 8);
 893         return 2;
 894 }
 895 static int cris_save_8 (unsigned char *d, uint32_t value)
 896 {
 897         *d++ = (value);
 898         return 1;
 899 }
 900
 901 /* FIXME: this will bug on archs not supporting unaligned word accesses.  */
 902 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 903 {
 904   uint8_t *ptr = mem_buf;
 905   uint8_t srs;
 906   int i;
 907
 908   for (i = 0; i < 16; i++)
 909           ptr += cris_save_32 (ptr, env->regs[i]);
 910
 911   srs = env->pregs[PR_SRS];
 912
 913   ptr += cris_save_8 (ptr, env->pregs[0]);
 914   ptr += cris_save_8 (ptr, env->pregs[1]);
 915   ptr += cris_save_32 (ptr, env->pregs[2]);
 916   ptr += cris_save_8 (ptr, srs);
 917   ptr += cris_save_16 (ptr, env->pregs[4]);
 918
 919   for (i = 5; i < 16; i++)
 920           ptr += cris_save_32 (ptr, env->pregs[i]);
 921
 922   ptr += cris_save_32 (ptr, env->pc);
 923
 924   for (i = 0; i < 16; i++)
 925           ptr += cris_save_32 (ptr, env->sregs[srs][i]);
 926
 927   return ((uint8_t *)ptr - mem_buf);
 928 }
 929
 930 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 931 {
 932   uint32_t *ptr = (uint32_t *)mem_buf;
 933   int i;
 934
 935 #define LOAD(x) (x)=*ptr++;
 936   for (i = 0; i < 16; i++) LOAD(env->regs[i]);
 937   LOAD (env->pc);
 938 }
 939 #else
 940 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 941 {
 942     return 0;
 943 }
 944
 945 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 946 {
 947 }
 948
 949 #endif
 950
 951 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
 952 {
 953     const char *p;
 954     int ch, reg_size, type;
 955     char buf[4096];
 956     uint8_t mem_buf[4096];
 957     uint32_t *registers;
 958     target_ulong addr, len;
 959
 960 #ifdef DEBUG_GDB
 961     printf("command='%s'\n", line_buf);
 962 #endif
 963     p = line_buf;
 964     ch = *p++;
 965     switch(ch) {
 966     case '?':
 967         /* TODO: Make this return the correct value for user-mode.  */
 968         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
 969         put_packet(s, buf);
 970         /* Remove all the breakpoints when this query is issued,
 971          * because gdb is doing and initial connect and the state
 972          * should be cleaned up.
 973          */
 974         cpu_breakpoint_remove_all(env);
 975         cpu_watchpoint_remove_all(env);
 976         break;
 977     case 'c':
 978         if (*p != '\0') {
 979             addr = strtoull(p, (char **)&p, 16);
 980 #if defined(TARGET_I386)
 981             env->eip = addr;
 982 #elif defined (TARGET_PPC)
 983             env->nip = addr;
 984 #elif defined (TARGET_SPARC)
 985             env->pc = addr;
 986             env->npc = addr + 4;
 987 #elif defined (TARGET_ARM)
 988             env->regs[15] = addr;
 989 #elif defined (TARGET_SH4)
 990             env->pc = addr;
 991 #elif defined (TARGET_MIPS)
 992             env->PC[env->current_tc] = addr;
 993 #elif defined (TARGET_CRIS)
 994             env->pc = addr;
 995 #endif
 996         }
 997         gdb_continue(s);
 998         return RS_IDLE;
 999     case 'C':
1000         s->signal = strtoul(p, (char **)&p, 16);
1001         gdb_continue(s);
1002         return RS_IDLE;
1003     case 'k':
1004         /* Kill the target */
1005         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1006         exit(0);
1007     case 'D':
1008         /* Detach packet */
1009         cpu_breakpoint_remove_all(env);
1010         cpu_watchpoint_remove_all(env);
1011         gdb_continue(s);
1012         put_packet(s, "OK");
1013         break;
1014     case 's':
1015         if (*p != '\0') {
1016             addr = strtoull(p, (char **)&p, 16);
1017 #if defined(TARGET_I386)
1018             env->eip = addr;
1019 #elif defined (TARGET_PPC)
1020             env->nip = addr;
1021 #elif defined (TARGET_SPARC)
1022             env->pc = addr;
1023             env->npc = addr + 4;
1024 #elif defined (TARGET_ARM)
1025             env->regs[15] = addr;
1026 #elif defined (TARGET_SH4)
1027             env->pc = addr;
1028 #elif defined (TARGET_MIPS)
1029             env->PC[env->current_tc] = addr;
1030 #elif defined (TARGET_CRIS)
1031             env->pc = addr;
1032 #endif
1033         }
1034         cpu_single_step(env, sstep_flags);
1035         gdb_continue(s);
1036         return RS_IDLE;
1037     case 'F':
1038         {
1039             target_ulong ret;
1040             target_ulong err;
1041
1042             ret = strtoull(p, (char **)&p, 16);
1043             if (*p == ',') {
1044                 p++;
1045                 err = strtoull(p, (char **)&p, 16);
1046             } else {
1047                 err = 0;
1048             }
1049             if (*p == ',')
1050                 p++;
1051             type = *p;
1052             if (gdb_current_syscall_cb)
1053                 gdb_current_syscall_cb(s->env, ret, err);
1054             if (type == 'C') {
1055                 put_packet(s, "T02");
1056             } else {
1057                 gdb_continue(s);
1058             }
1059         }
1060         break;
1061     case 'g':
1062         reg_size = cpu_gdb_read_registers(env, mem_buf);
1063         memtohex(buf, mem_buf, reg_size);
1064         put_packet(s, buf);
1065         break;
1066     case 'G':
1067         registers = (void *)mem_buf;
1068         len = strlen(p) / 2;
1069         hextomem((uint8_t *)registers, p, len);
1070         cpu_gdb_write_registers(env, mem_buf, len);
1071         put_packet(s, "OK");
1072         break;
1073     case 'm':
1074         addr = strtoull(p, (char **)&p, 16);
1075         if (*p == ',')
1076             p++;
1077         len = strtoull(p, NULL, 16);
1078         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
1079             put_packet (s, "E14");
1080         } else {
1081             memtohex(buf, mem_buf, len);
1082             put_packet(s, buf);
1083         }
1084         break;
1085     case 'M':
1086         addr = strtoull(p, (char **)&p, 16);
1087         if (*p == ',')
1088             p++;
1089         len = strtoull(p, (char **)&p, 16);
1090         if (*p == ':')
1091             p++;
1092         hextomem(mem_buf, p, len);
1093         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1094             put_packet(s, "E14");
1095         else
1096             put_packet(s, "OK");
1097         break;
1098     case 'Z':
1099         type = strtoul(p, (char **)&p, 16);
1100         if (*p == ',')
1101             p++;
1102         addr = strtoull(p, (char **)&p, 16);
1103         if (*p == ',')
1104             p++;
1105         len = strtoull(p, (char **)&p, 16);
1106         if (type == 0 || type == 1) {
1107             if (cpu_breakpoint_insert(env, addr) < 0)
1108                 goto breakpoint_error;
1109             put_packet(s, "OK");
1110 #ifndef CONFIG_USER_ONLY
1111         } else if (type == 2) {
1112             if (cpu_watchpoint_insert(env, addr) < 0)
1113                 goto breakpoint_error;
1114             put_packet(s, "OK");
1115 #endif
1116         } else {
1117         breakpoint_error:
1118             put_packet(s, "E22");
1119         }
1120         break;
1121     case 'z':
1122         type = strtoul(p, (char **)&p, 16);
1123         if (*p == ',')
1124             p++;
1125         addr = strtoull(p, (char **)&p, 16);
1126         if (*p == ',')
1127             p++;
1128         len = strtoull(p, (char **)&p, 16);
1129         if (type == 0 || type == 1) {
1130             cpu_breakpoint_remove(env, addr);
1131             put_packet(s, "OK");
1132 #ifndef CONFIG_USER_ONLY
1133         } else if (type == 2) {
1134             cpu_watchpoint_remove(env, addr);
1135             put_packet(s, "OK");
1136 #endif
1137         } else {
1138             goto breakpoint_error;
1139         }
1140         break;
1141     case 'q':
1142     case 'Q':
1143         /* parse any 'q' packets here */
1144         if (!strcmp(p,"qemu.sstepbits")) {
1145             /* Query Breakpoint bit definitions */
1146             sprintf(buf,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1147                     SSTEP_ENABLE,
1148                     SSTEP_NOIRQ,
1149                     SSTEP_NOTIMER);
1150             put_packet(s, buf);
1151             break;
1152         } else if (strncmp(p,"qemu.sstep",10) == 0) {
1153             /* Display or change the sstep_flags */
1154             p += 10;
1155             if (*p != '=') {
1156                 /* Display current setting */
1157                 sprintf(buf,"0x%x", sstep_flags);
1158                 put_packet(s, buf);
1159                 break;
1160             }
1161             p++;
1162             type = strtoul(p, (char **)&p, 16);
1163             sstep_flags = type;
1164             put_packet(s, "OK");
1165             break;
1166         }
1167 #ifdef CONFIG_LINUX_USER
1168         else if (strncmp(p, "Offsets", 7) == 0) {
1169             TaskState *ts = env->opaque;
1170
1171             sprintf(buf,
1172                     "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1173                     ";Bss=" TARGET_ABI_FMT_lx,
1174                     ts->info->code_offset,
1175                     ts->info->data_offset,
1176                     ts->info->data_offset);
1177             put_packet(s, buf);
1178             break;
1179         }
1180 #endif
1181         /* Fall through.  */
1182     default:
1183         /* put empty packet */
1184         buf[0] = '\0';
1185         put_packet(s, buf);
1186         break;
1187     }
1188     return RS_IDLE;
1189 }
1190
1191 extern void tb_flush(CPUState *env);
1192
1193 #ifndef CONFIG_USER_ONLY
1194 static void gdb_vm_stopped(void *opaque, int reason)
1195 {
1196     GDBState *s = opaque;
1197     char buf[256];
1198     int ret;
1199
1200     if (s->state == RS_SYSCALL)
1201         return;
1202
1203     /* disable single step if it was enable */
1204     cpu_single_step(s->env, 0);
1205
1206     if (reason == EXCP_DEBUG) {
1207         if (s->env->watchpoint_hit) {
1208             snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1209                      SIGTRAP,
1210                      s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1211             put_packet(s, buf);
1212             s->env->watchpoint_hit = 0;
1213             return;
1214         }
1215         tb_flush(s->env);
1216         ret = SIGTRAP;
1217     } else if (reason == EXCP_INTERRUPT) {
1218         ret = SIGINT;
1219     } else {
1220         ret = 0;
1221     }
1222     snprintf(buf, sizeof(buf), "S%02x", ret);
1223     put_packet(s, buf);
1224 }
1225 #endif
1226
1227 /* Send a gdb syscall request.
1228    This accepts limited printf-style format specifiers, specifically:
1229     %x  - target_ulong argument printed in hex.
1230     %lx - 64-bit argument printed in hex.
1231     %s  - string pointer (target_ulong) and length (int) pair.  */
1232 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1233 {
1234     va_list va;
1235     char buf[256];
1236     char *p;
1237     target_ulong addr;
1238     uint64_t i64;
1239     GDBState *s;
1240
1241     s = gdb_syscall_state;
1242     if (!s)
1243         return;
1244     gdb_current_syscall_cb = cb;
1245     s->state = RS_SYSCALL;
1246 #ifndef CONFIG_USER_ONLY
1247     vm_stop(EXCP_DEBUG);
1248 #endif
1249     s->state = RS_IDLE;
1250     va_start(va, fmt);
1251     p = buf;
1252     *(p++) = 'F';
1253     while (*fmt) {
1254         if (*fmt == '%') {
1255             fmt++;
1256             switch (*fmt++) {
1257             case 'x':
1258                 addr = va_arg(va, target_ulong);
1259                 p += sprintf(p, TARGET_FMT_lx, addr);
1260                 break;
1261             case 'l':
1262                 if (*(fmt++) != 'x')
1263                     goto bad_format;
1264                 i64 = va_arg(va, uint64_t);
1265                 p += sprintf(p, "%" PRIx64, i64);
1266                 break;
1267             case 's':
1268                 addr = va_arg(va, target_ulong);
1269                 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1270                 break;
1271             default:
1272             bad_format:
1273                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1274                         fmt - 1);
1275                 break;
1276             }
1277         } else {
1278             *(p++) = *(fmt++);
1279         }
1280     }
1281     *p = 0;
1282     va_end(va);
1283     put_packet(s, buf);
1284 #ifdef CONFIG_USER_ONLY
1285     gdb_handlesig(s->env, 0);
1286 #else
1287     cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1288 #endif
1289 }
1290
1291 static void gdb_read_byte(GDBState *s, int ch)
1292 {
1293     CPUState *env = s->env;
1294     int i, csum;
1295     uint8_t reply;
1296
1297 #ifndef CONFIG_USER_ONLY
1298     if (s->last_packet_len) {
1299         /* Waiting for a response to the last packet.  If we see the start
1300            of a new command then abandon the previous response.  */
1301         if (ch == '-') {
1302 #ifdef DEBUG_GDB
1303             printf("Got NACK, retransmitting\n");
1304 #endif
1305             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1306         }
1307 #ifdef DEBUG_GDB
1308         else if (ch == '+')
1309             printf("Got ACK\n");
1310         else
1311             printf("Got '%c' when expecting ACK/NACK\n", ch);
1312 #endif
1313         if (ch == '+' || ch == '$')
1314             s->last_packet_len = 0;
1315         if (ch != '$')
1316             return;
1317     }
1318     if (vm_running) {
1319         /* when the CPU is running, we cannot do anything except stop
1320            it when receiving a char */
1321         vm_stop(EXCP_INTERRUPT);
1322     } else
1323 #endif
1324     {
1325         switch(s->state) {
1326         case RS_IDLE:
1327             if (ch == '$') {
1328                 s->line_buf_index = 0;
1329                 s->state = RS_GETLINE;
1330             }
1331             break;
1332         case RS_GETLINE:
1333             if (ch == '#') {
1334             s->state = RS_CHKSUM1;
1335             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1336                 s->state = RS_IDLE;
1337             } else {
1338             s->line_buf[s->line_buf_index++] = ch;
1339             }
1340             break;
1341         case RS_CHKSUM1:
1342             s->line_buf[s->line_buf_index] = '\0';
1343             s->line_csum = fromhex(ch) << 4;
1344             s->state = RS_CHKSUM2;
1345             break;
1346         case RS_CHKSUM2:
1347             s->line_csum |= fromhex(ch);
1348             csum = 0;
1349             for(i = 0; i < s->line_buf_index; i++) {
1350                 csum += s->line_buf[i];
1351             }
1352             if (s->line_csum != (csum & 0xff)) {
1353                 reply = '-';
1354                 put_buffer(s, &reply, 1);
1355                 s->state = RS_IDLE;
1356             } else {
1357                 reply = '+';
1358                 put_buffer(s, &reply, 1);
1359                 s->state = gdb_handle_packet(s, env, s->line_buf);
1360             }
1361             break;
1362         default:
1363             abort();
1364         }
1365     }
1366 }
1367
1368 #ifdef CONFIG_USER_ONLY
1369 int
1370 gdb_handlesig (CPUState *env, int sig)
1371 {
1372   GDBState *s;
1373   char buf[256];
1374   int n;
1375
1376   s = &gdbserver_state;
1377   if (gdbserver_fd < 0 || s->fd < 0)
1378     return sig;
1379
1380   /* disable single step if it was enabled */
1381   cpu_single_step(env, 0);
1382   tb_flush(env);
1383
1384   if (sig != 0)
1385     {
1386       snprintf(buf, sizeof(buf), "S%02x", sig);
1387       put_packet(s, buf);
1388     }
1389   /* put_packet() might have detected that the peer terminated the
1390      connection.  */
1391   if (s->fd < 0)
1392       return sig;
1393
1394   sig = 0;
1395   s->state = RS_IDLE;
1396   s->running_state = 0;
1397   while (s->running_state == 0) {
1398       n = read (s->fd, buf, 256);
1399       if (n > 0)
1400         {
1401           int i;
1402
1403           for (i = 0; i < n; i++)
1404             gdb_read_byte (s, buf[i]);
1405         }
1406       else if (n == 0 || errno != EAGAIN)
1407         {
1408           /* XXX: Connection closed.  Should probably wait for annother
1409              connection before continuing.  */
1410           return sig;
1411         }
1412   }
1413   sig = s->signal;
1414   s->signal = 0;
1415   return sig;
1416 }
1417
1418 /* Tell the remote gdb that the process has exited.  */
1419 void gdb_exit(CPUState *env, int code)
1420 {
1421   GDBState *s;
1422   char buf[4];
1423
1424   s = &gdbserver_state;
1425   if (gdbserver_fd < 0 || s->fd < 0)
1426     return;
1427
1428   snprintf(buf, sizeof(buf), "W%02x", code);
1429   put_packet(s, buf);
1430 }
1431
1432
1433 static void gdb_accept(void *opaque)
1434 {
1435     GDBState *s;
1436     struct sockaddr_in sockaddr;
1437     socklen_t len;
1438     int val, fd;
1439
1440     for(;;) {
1441         len = sizeof(sockaddr);
1442         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1443         if (fd < 0 && errno != EINTR) {
1444             perror("accept");
1445             return;
1446         } else if (fd >= 0) {
1447             break;
1448         }
1449     }
1450
1451     /* set short latency */
1452     val = 1;
1453     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1454
1455     s = &gdbserver_state;
1456     memset (s, 0, sizeof (GDBState));
1457     s->env = first_cpu; /* XXX: allow to change CPU */
1458     s->fd = fd;
1459
1460     gdb_syscall_state = s;
1461
1462     fcntl(fd, F_SETFL, O_NONBLOCK);
1463 }
1464
1465 static int gdbserver_open(int port)
1466 {
1467     struct sockaddr_in sockaddr;
1468     int fd, val, ret;
1469
1470     fd = socket(PF_INET, SOCK_STREAM, 0);
1471     if (fd < 0) {
1472         perror("socket");
1473         return -1;
1474     }
1475
1476     /* allow fast reuse */
1477     val = 1;
1478     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1479
1480     sockaddr.sin_family = AF_INET;
1481     sockaddr.sin_port = htons(port);
1482     sockaddr.sin_addr.s_addr = 0;
1483     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1484     if (ret < 0) {
1485         perror("bind");
1486         return -1;
1487     }
1488     ret = listen(fd, 0);
1489     if (ret < 0) {
1490         perror("listen");
1491         return -1;
1492     }
1493     return fd;
1494 }
1495
1496 int gdbserver_start(int port)
1497 {
1498     gdbserver_fd = gdbserver_open(port);
1499     if (gdbserver_fd < 0)
1500         return -1;
1501     /* accept connections */
1502     gdb_accept (NULL);
1503     return 0;
1504 }
1505 #else
1506 static int gdb_chr_can_receive(void *opaque)
1507 {
1508   return 1;
1509 }
1510
1511 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1512 {
1513     GDBState *s = opaque;
1514     int i;
1515
1516     for (i = 0; i < size; i++) {
1517         gdb_read_byte(s, buf[i]);
1518     }
1519 }
1520
1521 static void gdb_chr_event(void *opaque, int event)
1522 {
1523     switch (event) {
1524     case CHR_EVENT_RESET:
1525         vm_stop(EXCP_INTERRUPT);
1526         gdb_syscall_state = opaque;
1527         break;
1528     default:
1529         break;
1530     }
1531 }
1532
1533 int gdbserver_start(const char *port)
1534 {
1535     GDBState *s;
1536     char gdbstub_port_name[128];
1537     int port_num;
1538     char *p;
1539     CharDriverState *chr;
1540
1541     if (!port || !*port)
1542       return -1;
1543
1544     port_num = strtol(port, &p, 10);
1545     if (*p == 0) {
1546         /* A numeric value is interpreted as a port number.  */
1547         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1548                  "tcp::%d,nowait,nodelay,server", port_num);
1549         port = gdbstub_port_name;
1550     }
1551
1552     chr = qemu_chr_open(port);
1553     if (!chr)
1554         return -1;
1555
1556     s = qemu_mallocz(sizeof(GDBState));
1557     if (!s) {
1558         return -1;
1559     }
1560     s->env = first_cpu; /* XXX: allow to change CPU */
1561     s->chr = chr;
1562     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1563                           gdb_chr_event, s);
1564     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1565     return 0;
1566 }
1567 #endif