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Init dumb display if no others available.
[qemu/mini2440.git] / linux-user / main.c
blobeabb23774164b0c2d1526cc0e336d64d30cd0b71
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28
29 #define DEBUG_LOGFILE "/tmp/qemu.log"
30
31 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
32 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
33
34 #if defined(__i386__) && !defined(CONFIG_STATIC)
35 /* Force usage of an ELF interpreter even if it is an ELF shared
36 object ! */
37 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
38 #endif
39
40 /* for recent libc, we add these dummy symbols which are not declared
41 when generating a linked object (bug in ld ?) */
42 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
43 asm(".globl __preinit_array_start\n"
44 ".globl __preinit_array_end\n"
45 ".globl __init_array_start\n"
46 ".globl __init_array_end\n"
47 ".globl __fini_array_start\n"
48 ".globl __fini_array_end\n"
49 ".section \".rodata\"\n"
50 "__preinit_array_start:\n"
51 "__preinit_array_end:\n"
52 "__init_array_start:\n"
53 "__init_array_end:\n"
54 "__fini_array_start:\n"
55 "__fini_array_end:\n"
56 ".long 0\n");
57 #endif
58
59 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
60 we allocate a bigger stack. Need a better solution, for example
61 by remapping the process stack directly at the right place */
62 unsigned long x86_stack_size = 512 * 1024;
63
64 void gemu_log(const char *fmt, ...)
65 {
66 va_list ap;
67
68 va_start(ap, fmt);
69 vfprintf(stderr, fmt, ap);
70 va_end(ap);
71 }
72
73 void cpu_outb(CPUState *env, int addr, int val)
74 {
75 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
76 }
77
78 void cpu_outw(CPUState *env, int addr, int val)
79 {
80 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
81 }
82
83 void cpu_outl(CPUState *env, int addr, int val)
84 {
85 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
86 }
87
88 int cpu_inb(CPUState *env, int addr)
89 {
90 fprintf(stderr, "inb: port=0x%04x\n", addr);
91 return 0;
92 }
93
94 int cpu_inw(CPUState *env, int addr)
95 {
96 fprintf(stderr, "inw: port=0x%04x\n", addr);
97 return 0;
98 }
99
100 int cpu_inl(CPUState *env, int addr)
101 {
102 fprintf(stderr, "inl: port=0x%04x\n", addr);
103 return 0;
104 }
105
106 int cpu_get_pic_interrupt(CPUState *env)
107 {
108 return -1;
109 }
110
111 /* timers for rdtsc */
112
113 #if 0
114
115 static uint64_t emu_time;
116
117 int64_t cpu_get_real_ticks(void)
118 {
119 return emu_time++;
120 }
121
122 #endif
123
124 #ifdef TARGET_I386
125 /***********************************************************/
126 /* CPUX86 core interface */
127
128 void cpu_smm_update(CPUState *env)
129 {
130 }
131
132 uint64_t cpu_get_tsc(CPUX86State *env)
133 {
134 return cpu_get_real_ticks();
135 }
136
137 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
138 int flags)
139 {
140 unsigned int e1, e2;
141 uint32_t *p;
142 e1 = (addr << 16) | (limit & 0xffff);
143 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
144 e2 |= flags;
145 p = ptr;
146 p[0] = tswapl(e1);
147 p[1] = tswapl(e2);
148 }
149
150 #if TARGET_X86_64
151 uint64_t idt_table[512];
152
153 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
154 uint64_t addr, unsigned int sel)
155 {
156 uint32_t *p, e1, e2;
157 e1 = (addr & 0xffff) | (sel << 16);
158 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
159 p = ptr;
160 p[0] = tswap32(e1);
161 p[1] = tswap32(e2);
162 p[2] = tswap32(addr >> 32);
163 p[3] = 0;
164 }
165 /* only dpl matters as we do only user space emulation */
166 static void set_idt(int n, unsigned int dpl)
167 {
168 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
169 }
170 #else
171 uint64_t idt_table[256];
172
173 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
174 uint32_t addr, unsigned int sel)
175 {
176 uint32_t *p, e1, e2;
177 e1 = (addr & 0xffff) | (sel << 16);
178 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
179 p = ptr;
180 p[0] = tswap32(e1);
181 p[1] = tswap32(e2);
182 }
183
184 /* only dpl matters as we do only user space emulation */
185 static void set_idt(int n, unsigned int dpl)
186 {
187 set_gate(idt_table + n, 0, dpl, 0, 0);
188 }
189 #endif
190
191 void cpu_loop(CPUX86State *env)
192 {
193 int trapnr;
194 abi_ulong pc;
195 target_siginfo_t info;
196
197 for(;;) {
198 trapnr = cpu_x86_exec(env);
199 switch(trapnr) {
200 case 0x80:
201 /* linux syscall from int $0x80 */
202 env->regs[R_EAX] = do_syscall(env,
203 env->regs[R_EAX],
204 env->regs[R_EBX],
205 env->regs[R_ECX],
206 env->regs[R_EDX],
207 env->regs[R_ESI],
208 env->regs[R_EDI],
209 env->regs[R_EBP]);
210 break;
211 #ifndef TARGET_ABI32
212 case EXCP_SYSCALL:
213 /* linux syscall from syscall intruction */
214 env->regs[R_EAX] = do_syscall(env,
215 env->regs[R_EAX],
216 env->regs[R_EDI],
217 env->regs[R_ESI],
218 env->regs[R_EDX],
219 env->regs[10],
220 env->regs[8],
221 env->regs[9]);
222 env->eip = env->exception_next_eip;
223 break;
224 #endif
225 case EXCP0B_NOSEG:
226 case EXCP0C_STACK:
227 info.si_signo = SIGBUS;
228 info.si_errno = 0;
229 info.si_code = TARGET_SI_KERNEL;
230 info._sifields._sigfault._addr = 0;
231 queue_signal(info.si_signo, &info);
232 break;
233 case EXCP0D_GPF:
234 /* XXX: potential problem if ABI32 */
235 #ifndef TARGET_X86_64
236 if (env->eflags & VM_MASK) {
237 handle_vm86_fault(env);
238 } else
239 #endif
240 {
241 info.si_signo = SIGSEGV;
242 info.si_errno = 0;
243 info.si_code = TARGET_SI_KERNEL;
244 info._sifields._sigfault._addr = 0;
245 queue_signal(info.si_signo, &info);
246 }
247 break;
248 case EXCP0E_PAGE:
249 info.si_signo = SIGSEGV;
250 info.si_errno = 0;
251 if (!(env->error_code & 1))
252 info.si_code = TARGET_SEGV_MAPERR;
253 else
254 info.si_code = TARGET_SEGV_ACCERR;
255 info._sifields._sigfault._addr = env->cr[2];
256 queue_signal(info.si_signo, &info);
257 break;
258 case EXCP00_DIVZ:
259 #ifndef TARGET_X86_64
260 if (env->eflags & VM_MASK) {
261 handle_vm86_trap(env, trapnr);
262 } else
263 #endif
264 {
265 /* division by zero */
266 info.si_signo = SIGFPE;
267 info.si_errno = 0;
268 info.si_code = TARGET_FPE_INTDIV;
269 info._sifields._sigfault._addr = env->eip;
270 queue_signal(info.si_signo, &info);
271 }
272 break;
273 case EXCP01_SSTP:
274 case EXCP03_INT3:
275 #ifndef TARGET_X86_64
276 if (env->eflags & VM_MASK) {
277 handle_vm86_trap(env, trapnr);
278 } else
279 #endif
280 {
281 info.si_signo = SIGTRAP;
282 info.si_errno = 0;
283 if (trapnr == EXCP01_SSTP) {
284 info.si_code = TARGET_TRAP_BRKPT;
285 info._sifields._sigfault._addr = env->eip;
286 } else {
287 info.si_code = TARGET_SI_KERNEL;
288 info._sifields._sigfault._addr = 0;
289 }
290 queue_signal(info.si_signo, &info);
291 }
292 break;
293 case EXCP04_INTO:
294 case EXCP05_BOUND:
295 #ifndef TARGET_X86_64
296 if (env->eflags & VM_MASK) {
297 handle_vm86_trap(env, trapnr);
298 } else
299 #endif
300 {
301 info.si_signo = SIGSEGV;
302 info.si_errno = 0;
303 info.si_code = TARGET_SI_KERNEL;
304 info._sifields._sigfault._addr = 0;
305 queue_signal(info.si_signo, &info);
306 }
307 break;
308 case EXCP06_ILLOP:
309 info.si_signo = SIGILL;
310 info.si_errno = 0;
311 info.si_code = TARGET_ILL_ILLOPN;
312 info._sifields._sigfault._addr = env->eip;
313 queue_signal(info.si_signo, &info);
314 break;
315 case EXCP_INTERRUPT:
316 /* just indicate that signals should be handled asap */
317 break;
318 case EXCP_DEBUG:
319 {
320 int sig;
321
322 sig = gdb_handlesig (env, TARGET_SIGTRAP);
323 if (sig)
324 {
325 info.si_signo = sig;
326 info.si_errno = 0;
327 info.si_code = TARGET_TRAP_BRKPT;
328 queue_signal(info.si_signo, &info);
329 }
330 }
331 break;
332 default:
333 pc = env->segs[R_CS].base + env->eip;
334 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
335 (long)pc, trapnr);
336 abort();
337 }
338 process_pending_signals(env);
339 }
340 }
341 #endif
342
343 #ifdef TARGET_ARM
344
345 /* XXX: find a better solution */
346 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
347
348 static void arm_cache_flush(abi_ulong start, abi_ulong last)
349 {
350 abi_ulong addr, last1;
351
352 if (last < start)
353 return;
354 addr = start;
355 for(;;) {
356 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
357 if (last1 > last)
358 last1 = last;
359 tb_invalidate_page_range(addr, last1 + 1);
360 if (last1 == last)
361 break;
362 addr = last1 + 1;
363 }
364 }
365
366 void cpu_loop(CPUARMState *env)
367 {
368 int trapnr;
369 unsigned int n, insn;
370 target_siginfo_t info;
371 uint32_t addr;
372
373 for(;;) {
374 trapnr = cpu_arm_exec(env);
375 switch(trapnr) {
376 case EXCP_UDEF:
377 {
378 TaskState *ts = env->opaque;
379 uint32_t opcode;
380
381 /* we handle the FPU emulation here, as Linux */
382 /* we get the opcode */
383 opcode = tget32(env->regs[15]);
384
385 if (EmulateAll(opcode, &ts->fpa, env) == 0) {
386 info.si_signo = SIGILL;
387 info.si_errno = 0;
388 info.si_code = TARGET_ILL_ILLOPN;
389 info._sifields._sigfault._addr = env->regs[15];
390 queue_signal(info.si_signo, &info);
391 } else {
392 /* increment PC */
393 env->regs[15] += 4;
394 }
395 }
396 break;
397 case EXCP_SWI:
398 case EXCP_BKPT:
399 {
400 env->eabi = 1;
401 /* system call */
402 if (trapnr == EXCP_BKPT) {
403 if (env->thumb) {
404 insn = tget16(env->regs[15]);
405 n = insn & 0xff;
406 env->regs[15] += 2;
407 } else {
408 insn = tget32(env->regs[15]);
409 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
410 env->regs[15] += 4;
411 }
412 } else {
413 if (env->thumb) {
414 insn = tget16(env->regs[15] - 2);
415 n = insn & 0xff;
416 } else {
417 insn = tget32(env->regs[15] - 4);
418 n = insn & 0xffffff;
419 }
420 }
421
422 if (n == ARM_NR_cacheflush) {
423 arm_cache_flush(env->regs[0], env->regs[1]);
424 } else if (n == ARM_NR_semihosting
425 || n == ARM_NR_thumb_semihosting) {
426 env->regs[0] = do_arm_semihosting (env);
427 } else if (n == 0 || n >= ARM_SYSCALL_BASE
428 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
429 /* linux syscall */
430 if (env->thumb || n == 0) {
431 n = env->regs[7];
432 } else {
433 n -= ARM_SYSCALL_BASE;
434 env->eabi = 0;
435 }
436 env->regs[0] = do_syscall(env,
437 n,
438 env->regs[0],
439 env->regs[1],
440 env->regs[2],
441 env->regs[3],
442 env->regs[4],
443 env->regs[5]);
444 } else {
445 goto error;
446 }
447 }
448 break;
449 case EXCP_INTERRUPT:
450 /* just indicate that signals should be handled asap */
451 break;
452 case EXCP_PREFETCH_ABORT:
453 addr = env->cp15.c6_data;
454 goto do_segv;
455 case EXCP_DATA_ABORT:
456 addr = env->cp15.c6_insn;
457 goto do_segv;
458 do_segv:
459 {
460 info.si_signo = SIGSEGV;
461 info.si_errno = 0;
462 /* XXX: check env->error_code */
463 info.si_code = TARGET_SEGV_MAPERR;
464 info._sifields._sigfault._addr = addr;
465 queue_signal(info.si_signo, &info);
466 }
467 break;
468 case EXCP_DEBUG:
469 {
470 int sig;
471
472 sig = gdb_handlesig (env, TARGET_SIGTRAP);
473 if (sig)
474 {
475 info.si_signo = sig;
476 info.si_errno = 0;
477 info.si_code = TARGET_TRAP_BRKPT;
478 queue_signal(info.si_signo, &info);
479 }
480 }
481 break;
482 default:
483 error:
484 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
485 trapnr);
486 cpu_dump_state(env, stderr, fprintf, 0);
487 abort();
488 }
489 process_pending_signals(env);
490 }
491 }
492
493 #endif
494
495 #ifdef TARGET_SPARC
496
497 //#define DEBUG_WIN
498
499 /* WARNING: dealing with register windows _is_ complicated. More info
500 can be found at http://www.sics.se/~psm/sparcstack.html */
501 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
502 {
503 index = (index + cwp * 16) & (16 * NWINDOWS - 1);
504 /* wrap handling : if cwp is on the last window, then we use the
505 registers 'after' the end */
506 if (index < 8 && env->cwp == (NWINDOWS - 1))
507 index += (16 * NWINDOWS);
508 return index;
509 }
510
511 /* save the register window 'cwp1' */
512 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
513 {
514 unsigned int i;
515 abi_ulong sp_ptr;
516
517 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
518 #if defined(DEBUG_WIN)
519 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
520 (int)sp_ptr, cwp1);
521 #endif
522 for(i = 0; i < 16; i++) {
523 tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
524 sp_ptr += sizeof(abi_ulong);
525 }
526 }
527
528 static void save_window(CPUSPARCState *env)
529 {
530 #ifndef TARGET_SPARC64
531 unsigned int new_wim;
532 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
533 ((1LL << NWINDOWS) - 1);
534 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
535 env->wim = new_wim;
536 #else
537 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
538 env->cansave++;
539 env->canrestore--;
540 #endif
541 }
542
543 static void restore_window(CPUSPARCState *env)
544 {
545 unsigned int new_wim, i, cwp1;
546 abi_ulong sp_ptr;
547
548 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
549 ((1LL << NWINDOWS) - 1);
550
551 /* restore the invalid window */
552 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
553 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
554 #if defined(DEBUG_WIN)
555 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
556 (int)sp_ptr, cwp1);
557 #endif
558 for(i = 0; i < 16; i++) {
559 env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
560 sp_ptr += sizeof(abi_ulong);
561 }
562 env->wim = new_wim;
563 #ifdef TARGET_SPARC64
564 env->canrestore++;
565 if (env->cleanwin < NWINDOWS - 1)
566 env->cleanwin++;
567 env->cansave--;
568 #endif
569 }
570
571 static void flush_windows(CPUSPARCState *env)
572 {
573 int offset, cwp1;
574
575 offset = 1;
576 for(;;) {
577 /* if restore would invoke restore_window(), then we can stop */
578 cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
579 if (env->wim & (1 << cwp1))
580 break;
581 save_window_offset(env, cwp1);
582 offset++;
583 }
584 /* set wim so that restore will reload the registers */
585 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
586 env->wim = 1 << cwp1;
587 #if defined(DEBUG_WIN)
588 printf("flush_windows: nb=%d\n", offset - 1);
589 #endif
590 }
591
592 void cpu_loop (CPUSPARCState *env)
593 {
594 int trapnr, ret;
595 target_siginfo_t info;
596
597 while (1) {
598 trapnr = cpu_sparc_exec (env);
599
600 switch (trapnr) {
601 #ifndef TARGET_SPARC64
602 case 0x88:
603 case 0x90:
604 #else
605 case 0x110:
606 case 0x16d:
607 #endif
608 ret = do_syscall (env, env->gregs[1],
609 env->regwptr[0], env->regwptr[1],
610 env->regwptr[2], env->regwptr[3],
611 env->regwptr[4], env->regwptr[5]);
612 if ((unsigned int)ret >= (unsigned int)(-515)) {
613 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
614 env->xcc |= PSR_CARRY;
615 #else
616 env->psr |= PSR_CARRY;
617 #endif
618 ret = -ret;
619 } else {
620 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
621 env->xcc &= ~PSR_CARRY;
622 #else
623 env->psr &= ~PSR_CARRY;
624 #endif
625 }
626 env->regwptr[0] = ret;
627 /* next instruction */
628 env->pc = env->npc;
629 env->npc = env->npc + 4;
630 break;
631 case 0x83: /* flush windows */
632 #ifdef TARGET_ABI32
633 case 0x103:
634 #endif
635 flush_windows(env);
636 /* next instruction */
637 env->pc = env->npc;
638 env->npc = env->npc + 4;
639 break;
640 #ifndef TARGET_SPARC64
641 case TT_WIN_OVF: /* window overflow */
642 save_window(env);
643 break;
644 case TT_WIN_UNF: /* window underflow */
645 restore_window(env);
646 break;
647 case TT_TFAULT:
648 case TT_DFAULT:
649 {
650 info.si_signo = SIGSEGV;
651 info.si_errno = 0;
652 /* XXX: check env->error_code */
653 info.si_code = TARGET_SEGV_MAPERR;
654 info._sifields._sigfault._addr = env->mmuregs[4];
655 queue_signal(info.si_signo, &info);
656 }
657 break;
658 #else
659 case TT_SPILL: /* window overflow */
660 save_window(env);
661 break;
662 case TT_FILL: /* window underflow */
663 restore_window(env);
664 break;
665 case TT_TFAULT:
666 case TT_DFAULT:
667 {
668 info.si_signo = SIGSEGV;
669 info.si_errno = 0;
670 /* XXX: check env->error_code */
671 info.si_code = TARGET_SEGV_MAPERR;
672 if (trapnr == TT_DFAULT)
673 info._sifields._sigfault._addr = env->dmmuregs[4];
674 else
675 info._sifields._sigfault._addr = env->tpc[env->tl];
676 queue_signal(info.si_signo, &info);
677 }
678 break;
679 #ifndef TARGET_ABI32
680 case 0x16e:
681 flush_windows(env);
682 sparc64_get_context(env);
683 break;
684 case 0x16f:
685 flush_windows(env);
686 sparc64_set_context(env);
687 break;
688 #endif
689 #endif
690 case EXCP_INTERRUPT:
691 /* just indicate that signals should be handled asap */
692 break;
693 case EXCP_DEBUG:
694 {
695 int sig;
696
697 sig = gdb_handlesig (env, TARGET_SIGTRAP);
698 if (sig)
699 {
700 info.si_signo = sig;
701 info.si_errno = 0;
702 info.si_code = TARGET_TRAP_BRKPT;
703 queue_signal(info.si_signo, &info);
704 }
705 }
706 break;
707 default:
708 printf ("Unhandled trap: 0x%x\n", trapnr);
709 cpu_dump_state(env, stderr, fprintf, 0);
710 exit (1);
711 }
712 process_pending_signals (env);
713 }
714 }
715
716 #endif
717
718 #ifdef TARGET_PPC
719 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
720 {
721 /* TO FIX */
722 return 0;
723 }
724
725 uint32_t cpu_ppc_load_tbl (CPUState *env)
726 {
727 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
728 }
729
730 uint32_t cpu_ppc_load_tbu (CPUState *env)
731 {
732 return cpu_ppc_get_tb(env) >> 32;
733 }
734
735 uint32_t cpu_ppc_load_atbl (CPUState *env)
736 {
737 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
738 }
739
740 uint32_t cpu_ppc_load_atbu (CPUState *env)
741 {
742 return cpu_ppc_get_tb(env) >> 32;
743 }
744
745 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
746 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
747
748 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
749 {
750 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
751 }
752
753 /* XXX: to be fixed */
754 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
755 {
756 return -1;
757 }
758
759 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
760 {
761 return -1;
762 }
763
764 #define EXCP_DUMP(env, fmt, args...) \
765 do { \
766 fprintf(stderr, fmt , ##args); \
767 cpu_dump_state(env, stderr, fprintf, 0); \
768 if (loglevel != 0) { \
769 fprintf(logfile, fmt , ##args); \
770 cpu_dump_state(env, logfile, fprintf, 0); \
771 } \
772 } while (0)
773
774 void cpu_loop(CPUPPCState *env)
775 {
776 target_siginfo_t info;
777 int trapnr;
778 uint32_t ret;
779
780 for(;;) {
781 trapnr = cpu_ppc_exec(env);
782 switch(trapnr) {
783 case POWERPC_EXCP_NONE:
784 /* Just go on */
785 break;
786 case POWERPC_EXCP_CRITICAL: /* Critical input */
787 cpu_abort(env, "Critical interrupt while in user mode. "
788 "Aborting\n");
789 break;
790 case POWERPC_EXCP_MCHECK: /* Machine check exception */
791 cpu_abort(env, "Machine check exception while in user mode. "
792 "Aborting\n");
793 break;
794 case POWERPC_EXCP_DSI: /* Data storage exception */
795 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
796 env->spr[SPR_DAR]);
797 /* XXX: check this. Seems bugged */
798 switch (env->error_code & 0xFF000000) {
799 case 0x40000000:
800 info.si_signo = TARGET_SIGSEGV;
801 info.si_errno = 0;
802 info.si_code = TARGET_SEGV_MAPERR;
803 break;
804 case 0x04000000:
805 info.si_signo = TARGET_SIGILL;
806 info.si_errno = 0;
807 info.si_code = TARGET_ILL_ILLADR;
808 break;
809 case 0x08000000:
810 info.si_signo = TARGET_SIGSEGV;
811 info.si_errno = 0;
812 info.si_code = TARGET_SEGV_ACCERR;
813 break;
814 default:
815 /* Let's send a regular segfault... */
816 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
817 env->error_code);
818 info.si_signo = TARGET_SIGSEGV;
819 info.si_errno = 0;
820 info.si_code = TARGET_SEGV_MAPERR;
821 break;
822 }
823 info._sifields._sigfault._addr = env->nip;
824 queue_signal(info.si_signo, &info);
825 break;
826 case POWERPC_EXCP_ISI: /* Instruction storage exception */
827 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
828 env->spr[SPR_SRR0]);
829 /* XXX: check this */
830 switch (env->error_code & 0xFF000000) {
831 case 0x40000000:
832 info.si_signo = TARGET_SIGSEGV;
833 info.si_errno = 0;
834 info.si_code = TARGET_SEGV_MAPERR;
835 break;
836 case 0x10000000:
837 case 0x08000000:
838 info.si_signo = TARGET_SIGSEGV;
839 info.si_errno = 0;
840 info.si_code = TARGET_SEGV_ACCERR;
841 break;
842 default:
843 /* Let's send a regular segfault... */
844 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
845 env->error_code);
846 info.si_signo = TARGET_SIGSEGV;
847 info.si_errno = 0;
848 info.si_code = TARGET_SEGV_MAPERR;
849 break;
850 }
851 info._sifields._sigfault._addr = env->nip - 4;
852 queue_signal(info.si_signo, &info);
853 break;
854 case POWERPC_EXCP_EXTERNAL: /* External input */
855 cpu_abort(env, "External interrupt while in user mode. "
856 "Aborting\n");
857 break;
858 case POWERPC_EXCP_ALIGN: /* Alignment exception */
859 EXCP_DUMP(env, "Unaligned memory access\n");
860 /* XXX: check this */
861 info.si_signo = TARGET_SIGBUS;
862 info.si_errno = 0;
863 info.si_code = TARGET_BUS_ADRALN;
864 info._sifields._sigfault._addr = env->nip - 4;
865 queue_signal(info.si_signo, &info);
866 break;
867 case POWERPC_EXCP_PROGRAM: /* Program exception */
868 /* XXX: check this */
869 switch (env->error_code & ~0xF) {
870 case POWERPC_EXCP_FP:
871 EXCP_DUMP(env, "Floating point program exception\n");
872 info.si_signo = TARGET_SIGFPE;
873 info.si_errno = 0;
874 switch (env->error_code & 0xF) {
875 case POWERPC_EXCP_FP_OX:
876 info.si_code = TARGET_FPE_FLTOVF;
877 break;
878 case POWERPC_EXCP_FP_UX:
879 info.si_code = TARGET_FPE_FLTUND;
880 break;
881 case POWERPC_EXCP_FP_ZX:
882 case POWERPC_EXCP_FP_VXZDZ:
883 info.si_code = TARGET_FPE_FLTDIV;
884 break;
885 case POWERPC_EXCP_FP_XX:
886 info.si_code = TARGET_FPE_FLTRES;
887 break;
888 case POWERPC_EXCP_FP_VXSOFT:
889 info.si_code = TARGET_FPE_FLTINV;
890 break;
891 case POWERPC_EXCP_FP_VXSNAN:
892 case POWERPC_EXCP_FP_VXISI:
893 case POWERPC_EXCP_FP_VXIDI:
894 case POWERPC_EXCP_FP_VXIMZ:
895 case POWERPC_EXCP_FP_VXVC:
896 case POWERPC_EXCP_FP_VXSQRT:
897 case POWERPC_EXCP_FP_VXCVI:
898 info.si_code = TARGET_FPE_FLTSUB;
899 break;
900 default:
901 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
902 env->error_code);
903 break;
904 }
905 break;
906 case POWERPC_EXCP_INVAL:
907 EXCP_DUMP(env, "Invalid instruction\n");
908 info.si_signo = TARGET_SIGILL;
909 info.si_errno = 0;
910 switch (env->error_code & 0xF) {
911 case POWERPC_EXCP_INVAL_INVAL:
912 info.si_code = TARGET_ILL_ILLOPC;
913 break;
914 case POWERPC_EXCP_INVAL_LSWX:
915 info.si_code = TARGET_ILL_ILLOPN;
916 break;
917 case POWERPC_EXCP_INVAL_SPR:
918 info.si_code = TARGET_ILL_PRVREG;
919 break;
920 case POWERPC_EXCP_INVAL_FP:
921 info.si_code = TARGET_ILL_COPROC;
922 break;
923 default:
924 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
925 env->error_code & 0xF);
926 info.si_code = TARGET_ILL_ILLADR;
927 break;
928 }
929 break;
930 case POWERPC_EXCP_PRIV:
931 EXCP_DUMP(env, "Privilege violation\n");
932 info.si_signo = TARGET_SIGILL;
933 info.si_errno = 0;
934 switch (env->error_code & 0xF) {
935 case POWERPC_EXCP_PRIV_OPC:
936 info.si_code = TARGET_ILL_PRVOPC;
937 break;
938 case POWERPC_EXCP_PRIV_REG:
939 info.si_code = TARGET_ILL_PRVREG;
940 break;
941 default:
942 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
943 env->error_code & 0xF);
944 info.si_code = TARGET_ILL_PRVOPC;
945 break;
946 }
947 break;
948 case POWERPC_EXCP_TRAP:
949 cpu_abort(env, "Tried to call a TRAP\n");
950 break;
951 default:
952 /* Should not happen ! */
953 cpu_abort(env, "Unknown program exception (%02x)\n",
954 env->error_code);
955 break;
956 }
957 info._sifields._sigfault._addr = env->nip - 4;
958 queue_signal(info.si_signo, &info);
959 break;
960 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
961 EXCP_DUMP(env, "No floating point allowed\n");
962 info.si_signo = TARGET_SIGILL;
963 info.si_errno = 0;
964 info.si_code = TARGET_ILL_COPROC;
965 info._sifields._sigfault._addr = env->nip - 4;
966 queue_signal(info.si_signo, &info);
967 break;
968 case POWERPC_EXCP_SYSCALL: /* System call exception */
969 cpu_abort(env, "Syscall exception while in user mode. "
970 "Aborting\n");
971 break;
972 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
973 EXCP_DUMP(env, "No APU instruction allowed\n");
974 info.si_signo = TARGET_SIGILL;
975 info.si_errno = 0;
976 info.si_code = TARGET_ILL_COPROC;
977 info._sifields._sigfault._addr = env->nip - 4;
978 queue_signal(info.si_signo, &info);
979 break;
980 case POWERPC_EXCP_DECR: /* Decrementer exception */
981 cpu_abort(env, "Decrementer interrupt while in user mode. "
982 "Aborting\n");
983 break;
984 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
985 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
986 "Aborting\n");
987 break;
988 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
989 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
990 "Aborting\n");
991 break;
992 case POWERPC_EXCP_DTLB: /* Data TLB error */
993 cpu_abort(env, "Data TLB exception while in user mode. "
994 "Aborting\n");
995 break;
996 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
997 cpu_abort(env, "Instruction TLB exception while in user mode. "
998 "Aborting\n");
999 break;
1000 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1001 /* XXX: check this */
1002 {
1003 int sig;
1004
1005 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1006 if (sig) {
1007 info.si_signo = sig;
1008 info.si_errno = 0;
1009 info.si_code = TARGET_TRAP_BRKPT;
1010 queue_signal(info.si_signo, &info);
1011 }
1012 }
1013 break;
1014 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1015 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1016 info.si_signo = TARGET_SIGILL;
1017 info.si_errno = 0;
1018 info.si_code = TARGET_ILL_COPROC;
1019 info._sifields._sigfault._addr = env->nip - 4;
1020 queue_signal(info.si_signo, &info);
1021 break;
1022 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1023 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1024 break;
1025 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1026 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1027 break;
1028 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1029 cpu_abort(env, "Performance monitor exception not handled\n");
1030 break;
1031 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1032 cpu_abort(env, "Doorbell interrupt while in user mode. "
1033 "Aborting\n");
1034 break;
1035 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1036 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1037 "Aborting\n");
1038 break;
1039 case POWERPC_EXCP_RESET: /* System reset exception */
1040 cpu_abort(env, "Reset interrupt while in user mode. "
1041 "Aborting\n");
1042 break;
1043 #if defined(TARGET_PPC64) && !defined(TARGET_ABI32) /* PowerPC 64 */
1044 case POWERPC_EXCP_DSEG: /* Data segment exception */
1045 cpu_abort(env, "Data segment exception while in user mode. "
1046 "Aborting\n");
1047 break;
1048 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1049 cpu_abort(env, "Instruction segment exception "
1050 "while in user mode. Aborting\n");
1051 break;
1052 #endif /* defined(TARGET_PPC64) && !defined(TARGET_ABI32) */
1053 #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
1054 /* PowerPC 64 with hypervisor mode support */
1055 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1056 cpu_abort(env, "Hypervisor decrementer interrupt "
1057 "while in user mode. Aborting\n");
1058 break;
1059 #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */
1060 case POWERPC_EXCP_TRACE: /* Trace exception */
1061 /* Nothing to do:
1062 * we use this exception to emulate step-by-step execution mode.
1063 */
1064 break;
1065 #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
1066 /* PowerPC 64 with hypervisor mode support */
1067 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1068 cpu_abort(env, "Hypervisor data storage exception "
1069 "while in user mode. Aborting\n");
1070 break;
1071 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1072 cpu_abort(env, "Hypervisor instruction storage exception "
1073 "while in user mode. Aborting\n");
1074 break;
1075 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1076 cpu_abort(env, "Hypervisor data segment exception "
1077 "while in user mode. Aborting\n");
1078 break;
1079 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1080 cpu_abort(env, "Hypervisor instruction segment exception "
1081 "while in user mode. Aborting\n");
1082 break;
1083 #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */
1084 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1085 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1086 info.si_signo = TARGET_SIGILL;
1087 info.si_errno = 0;
1088 info.si_code = TARGET_ILL_COPROC;
1089 info._sifields._sigfault._addr = env->nip - 4;
1090 queue_signal(info.si_signo, &info);
1091 break;
1092 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1093 cpu_abort(env, "Programable interval timer interrupt "
1094 "while in user mode. Aborting\n");
1095 break;
1096 case POWERPC_EXCP_IO: /* IO error exception */
1097 cpu_abort(env, "IO error exception while in user mode. "
1098 "Aborting\n");
1099 break;
1100 case POWERPC_EXCP_RUNM: /* Run mode exception */
1101 cpu_abort(env, "Run mode exception while in user mode. "
1102 "Aborting\n");
1103 break;
1104 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1105 cpu_abort(env, "Emulation trap exception not handled\n");
1106 break;
1107 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1108 cpu_abort(env, "Instruction fetch TLB exception "
1109 "while in user-mode. Aborting");
1110 break;
1111 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1112 cpu_abort(env, "Data load TLB exception while in user-mode. "
1113 "Aborting");
1114 break;
1115 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1116 cpu_abort(env, "Data store TLB exception while in user-mode. "
1117 "Aborting");
1118 break;
1119 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1120 cpu_abort(env, "Floating-point assist exception not handled\n");
1121 break;
1122 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1123 cpu_abort(env, "Instruction address breakpoint exception "
1124 "not handled\n");
1125 break;
1126 case POWERPC_EXCP_SMI: /* System management interrupt */
1127 cpu_abort(env, "System management interrupt while in user mode. "
1128 "Aborting\n");
1129 break;
1130 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1131 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1132 "Aborting\n");
1133 break;
1134 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1135 cpu_abort(env, "Performance monitor exception not handled\n");
1136 break;
1137 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1138 cpu_abort(env, "Vector assist exception not handled\n");
1139 break;
1140 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1141 cpu_abort(env, "Soft patch exception not handled\n");
1142 break;
1143 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1144 cpu_abort(env, "Maintenance exception while in user mode. "
1145 "Aborting\n");
1146 break;
1147 case POWERPC_EXCP_STOP: /* stop translation */
1148 /* We did invalidate the instruction cache. Go on */
1149 break;
1150 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1151 /* We just stopped because of a branch. Go on */
1152 break;
1153 case POWERPC_EXCP_SYSCALL_USER:
1154 /* system call in user-mode emulation */
1155 /* WARNING:
1156 * PPC ABI uses overflow flag in cr0 to signal an error
1157 * in syscalls.
1158 */
1159 #if 0
1160 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1161 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1162 #endif
1163 env->crf[0] &= ~0x1;
1164 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1165 env->gpr[5], env->gpr[6], env->gpr[7],
1166 env->gpr[8]);
1167 if (ret > (uint32_t)(-515)) {
1168 env->crf[0] |= 0x1;
1169 ret = -ret;
1170 }
1171 env->gpr[3] = ret;
1172 #if 0
1173 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1174 #endif
1175 break;
1176 case EXCP_INTERRUPT:
1177 /* just indicate that signals should be handled asap */
1178 break;
1179 default:
1180 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1181 break;
1182 }
1183 process_pending_signals(env);
1184 }
1185 }
1186 #endif
1187
1188 #ifdef TARGET_MIPS
1189
1190 #define MIPS_SYS(name, args) args,
1191
1192 static const uint8_t mips_syscall_args[] = {
1193 MIPS_SYS(sys_syscall , 0) /* 4000 */
1194 MIPS_SYS(sys_exit , 1)
1195 MIPS_SYS(sys_fork , 0)
1196 MIPS_SYS(sys_read , 3)
1197 MIPS_SYS(sys_write , 3)
1198 MIPS_SYS(sys_open , 3) /* 4005 */
1199 MIPS_SYS(sys_close , 1)
1200 MIPS_SYS(sys_waitpid , 3)
1201 MIPS_SYS(sys_creat , 2)
1202 MIPS_SYS(sys_link , 2)
1203 MIPS_SYS(sys_unlink , 1) /* 4010 */
1204 MIPS_SYS(sys_execve , 0)
1205 MIPS_SYS(sys_chdir , 1)
1206 MIPS_SYS(sys_time , 1)
1207 MIPS_SYS(sys_mknod , 3)
1208 MIPS_SYS(sys_chmod , 2) /* 4015 */
1209 MIPS_SYS(sys_lchown , 3)
1210 MIPS_SYS(sys_ni_syscall , 0)
1211 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1212 MIPS_SYS(sys_lseek , 3)
1213 MIPS_SYS(sys_getpid , 0) /* 4020 */
1214 MIPS_SYS(sys_mount , 5)
1215 MIPS_SYS(sys_oldumount , 1)
1216 MIPS_SYS(sys_setuid , 1)
1217 MIPS_SYS(sys_getuid , 0)
1218 MIPS_SYS(sys_stime , 1) /* 4025 */
1219 MIPS_SYS(sys_ptrace , 4)
1220 MIPS_SYS(sys_alarm , 1)
1221 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1222 MIPS_SYS(sys_pause , 0)
1223 MIPS_SYS(sys_utime , 2) /* 4030 */
1224 MIPS_SYS(sys_ni_syscall , 0)
1225 MIPS_SYS(sys_ni_syscall , 0)
1226 MIPS_SYS(sys_access , 2)
1227 MIPS_SYS(sys_nice , 1)
1228 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1229 MIPS_SYS(sys_sync , 0)
1230 MIPS_SYS(sys_kill , 2)
1231 MIPS_SYS(sys_rename , 2)
1232 MIPS_SYS(sys_mkdir , 2)
1233 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1234 MIPS_SYS(sys_dup , 1)
1235 MIPS_SYS(sys_pipe , 0)
1236 MIPS_SYS(sys_times , 1)
1237 MIPS_SYS(sys_ni_syscall , 0)
1238 MIPS_SYS(sys_brk , 1) /* 4045 */
1239 MIPS_SYS(sys_setgid , 1)
1240 MIPS_SYS(sys_getgid , 0)
1241 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1242 MIPS_SYS(sys_geteuid , 0)
1243 MIPS_SYS(sys_getegid , 0) /* 4050 */
1244 MIPS_SYS(sys_acct , 0)
1245 MIPS_SYS(sys_umount , 2)
1246 MIPS_SYS(sys_ni_syscall , 0)
1247 MIPS_SYS(sys_ioctl , 3)
1248 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1249 MIPS_SYS(sys_ni_syscall , 2)
1250 MIPS_SYS(sys_setpgid , 2)
1251 MIPS_SYS(sys_ni_syscall , 0)
1252 MIPS_SYS(sys_olduname , 1)
1253 MIPS_SYS(sys_umask , 1) /* 4060 */
1254 MIPS_SYS(sys_chroot , 1)
1255 MIPS_SYS(sys_ustat , 2)
1256 MIPS_SYS(sys_dup2 , 2)
1257 MIPS_SYS(sys_getppid , 0)
1258 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1259 MIPS_SYS(sys_setsid , 0)
1260 MIPS_SYS(sys_sigaction , 3)
1261 MIPS_SYS(sys_sgetmask , 0)
1262 MIPS_SYS(sys_ssetmask , 1)
1263 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1264 MIPS_SYS(sys_setregid , 2)
1265 MIPS_SYS(sys_sigsuspend , 0)
1266 MIPS_SYS(sys_sigpending , 1)
1267 MIPS_SYS(sys_sethostname , 2)
1268 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1269 MIPS_SYS(sys_getrlimit , 2)
1270 MIPS_SYS(sys_getrusage , 2)
1271 MIPS_SYS(sys_gettimeofday, 2)
1272 MIPS_SYS(sys_settimeofday, 2)
1273 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1274 MIPS_SYS(sys_setgroups , 2)
1275 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1276 MIPS_SYS(sys_symlink , 2)
1277 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1278 MIPS_SYS(sys_readlink , 3) /* 4085 */
1279 MIPS_SYS(sys_uselib , 1)
1280 MIPS_SYS(sys_swapon , 2)
1281 MIPS_SYS(sys_reboot , 3)
1282 MIPS_SYS(old_readdir , 3)
1283 MIPS_SYS(old_mmap , 6) /* 4090 */
1284 MIPS_SYS(sys_munmap , 2)
1285 MIPS_SYS(sys_truncate , 2)
1286 MIPS_SYS(sys_ftruncate , 2)
1287 MIPS_SYS(sys_fchmod , 2)
1288 MIPS_SYS(sys_fchown , 3) /* 4095 */
1289 MIPS_SYS(sys_getpriority , 2)
1290 MIPS_SYS(sys_setpriority , 3)
1291 MIPS_SYS(sys_ni_syscall , 0)
1292 MIPS_SYS(sys_statfs , 2)
1293 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1294 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1295 MIPS_SYS(sys_socketcall , 2)
1296 MIPS_SYS(sys_syslog , 3)
1297 MIPS_SYS(sys_setitimer , 3)
1298 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1299 MIPS_SYS(sys_newstat , 2)
1300 MIPS_SYS(sys_newlstat , 2)
1301 MIPS_SYS(sys_newfstat , 2)
1302 MIPS_SYS(sys_uname , 1)
1303 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1304 MIPS_SYS(sys_vhangup , 0)
1305 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1306 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1307 MIPS_SYS(sys_wait4 , 4)
1308 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1309 MIPS_SYS(sys_sysinfo , 1)
1310 MIPS_SYS(sys_ipc , 6)
1311 MIPS_SYS(sys_fsync , 1)
1312 MIPS_SYS(sys_sigreturn , 0)
1313 MIPS_SYS(sys_clone , 0) /* 4120 */
1314 MIPS_SYS(sys_setdomainname, 2)
1315 MIPS_SYS(sys_newuname , 1)
1316 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1317 MIPS_SYS(sys_adjtimex , 1)
1318 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1319 MIPS_SYS(sys_sigprocmask , 3)
1320 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1321 MIPS_SYS(sys_init_module , 5)
1322 MIPS_SYS(sys_delete_module, 1)
1323 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1324 MIPS_SYS(sys_quotactl , 0)
1325 MIPS_SYS(sys_getpgid , 1)
1326 MIPS_SYS(sys_fchdir , 1)
1327 MIPS_SYS(sys_bdflush , 2)
1328 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1329 MIPS_SYS(sys_personality , 1)
1330 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1331 MIPS_SYS(sys_setfsuid , 1)
1332 MIPS_SYS(sys_setfsgid , 1)
1333 MIPS_SYS(sys_llseek , 5) /* 4140 */
1334 MIPS_SYS(sys_getdents , 3)
1335 MIPS_SYS(sys_select , 5)
1336 MIPS_SYS(sys_flock , 2)
1337 MIPS_SYS(sys_msync , 3)
1338 MIPS_SYS(sys_readv , 3) /* 4145 */
1339 MIPS_SYS(sys_writev , 3)
1340 MIPS_SYS(sys_cacheflush , 3)
1341 MIPS_SYS(sys_cachectl , 3)
1342 MIPS_SYS(sys_sysmips , 4)
1343 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1344 MIPS_SYS(sys_getsid , 1)
1345 MIPS_SYS(sys_fdatasync , 0)
1346 MIPS_SYS(sys_sysctl , 1)
1347 MIPS_SYS(sys_mlock , 2)
1348 MIPS_SYS(sys_munlock , 2) /* 4155 */
1349 MIPS_SYS(sys_mlockall , 1)
1350 MIPS_SYS(sys_munlockall , 0)
1351 MIPS_SYS(sys_sched_setparam, 2)
1352 MIPS_SYS(sys_sched_getparam, 2)
1353 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1354 MIPS_SYS(sys_sched_getscheduler, 1)
1355 MIPS_SYS(sys_sched_yield , 0)
1356 MIPS_SYS(sys_sched_get_priority_max, 1)
1357 MIPS_SYS(sys_sched_get_priority_min, 1)
1358 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1359 MIPS_SYS(sys_nanosleep, 2)
1360 MIPS_SYS(sys_mremap , 4)
1361 MIPS_SYS(sys_accept , 3)
1362 MIPS_SYS(sys_bind , 3)
1363 MIPS_SYS(sys_connect , 3) /* 4170 */
1364 MIPS_SYS(sys_getpeername , 3)
1365 MIPS_SYS(sys_getsockname , 3)
1366 MIPS_SYS(sys_getsockopt , 5)
1367 MIPS_SYS(sys_listen , 2)
1368 MIPS_SYS(sys_recv , 4) /* 4175 */
1369 MIPS_SYS(sys_recvfrom , 6)
1370 MIPS_SYS(sys_recvmsg , 3)
1371 MIPS_SYS(sys_send , 4)
1372 MIPS_SYS(sys_sendmsg , 3)
1373 MIPS_SYS(sys_sendto , 6) /* 4180 */
1374 MIPS_SYS(sys_setsockopt , 5)
1375 MIPS_SYS(sys_shutdown , 2)
1376 MIPS_SYS(sys_socket , 3)
1377 MIPS_SYS(sys_socketpair , 4)
1378 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1379 MIPS_SYS(sys_getresuid , 3)
1380 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1381 MIPS_SYS(sys_poll , 3)
1382 MIPS_SYS(sys_nfsservctl , 3)
1383 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1384 MIPS_SYS(sys_getresgid , 3)
1385 MIPS_SYS(sys_prctl , 5)
1386 MIPS_SYS(sys_rt_sigreturn, 0)
1387 MIPS_SYS(sys_rt_sigaction, 4)
1388 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1389 MIPS_SYS(sys_rt_sigpending, 2)
1390 MIPS_SYS(sys_rt_sigtimedwait, 4)
1391 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1392 MIPS_SYS(sys_rt_sigsuspend, 0)
1393 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1394 MIPS_SYS(sys_pwrite64 , 6)
1395 MIPS_SYS(sys_chown , 3)
1396 MIPS_SYS(sys_getcwd , 2)
1397 MIPS_SYS(sys_capget , 2)
1398 MIPS_SYS(sys_capset , 2) /* 4205 */
1399 MIPS_SYS(sys_sigaltstack , 0)
1400 MIPS_SYS(sys_sendfile , 4)
1401 MIPS_SYS(sys_ni_syscall , 0)
1402 MIPS_SYS(sys_ni_syscall , 0)
1403 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1404 MIPS_SYS(sys_truncate64 , 4)
1405 MIPS_SYS(sys_ftruncate64 , 4)
1406 MIPS_SYS(sys_stat64 , 2)
1407 MIPS_SYS(sys_lstat64 , 2)
1408 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1409 MIPS_SYS(sys_pivot_root , 2)
1410 MIPS_SYS(sys_mincore , 3)
1411 MIPS_SYS(sys_madvise , 3)
1412 MIPS_SYS(sys_getdents64 , 3)
1413 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1414 MIPS_SYS(sys_ni_syscall , 0)
1415 MIPS_SYS(sys_gettid , 0)
1416 MIPS_SYS(sys_readahead , 5)
1417 MIPS_SYS(sys_setxattr , 5)
1418 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1419 MIPS_SYS(sys_fsetxattr , 5)
1420 MIPS_SYS(sys_getxattr , 4)
1421 MIPS_SYS(sys_lgetxattr , 4)
1422 MIPS_SYS(sys_fgetxattr , 4)
1423 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1424 MIPS_SYS(sys_llistxattr , 3)
1425 MIPS_SYS(sys_flistxattr , 3)
1426 MIPS_SYS(sys_removexattr , 2)
1427 MIPS_SYS(sys_lremovexattr, 2)
1428 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1429 MIPS_SYS(sys_tkill , 2)
1430 MIPS_SYS(sys_sendfile64 , 5)
1431 MIPS_SYS(sys_futex , 2)
1432 MIPS_SYS(sys_sched_setaffinity, 3)
1433 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1434 MIPS_SYS(sys_io_setup , 2)
1435 MIPS_SYS(sys_io_destroy , 1)
1436 MIPS_SYS(sys_io_getevents, 5)
1437 MIPS_SYS(sys_io_submit , 3)
1438 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1439 MIPS_SYS(sys_exit_group , 1)
1440 MIPS_SYS(sys_lookup_dcookie, 3)
1441 MIPS_SYS(sys_epoll_create, 1)
1442 MIPS_SYS(sys_epoll_ctl , 4)
1443 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1444 MIPS_SYS(sys_remap_file_pages, 5)
1445 MIPS_SYS(sys_set_tid_address, 1)
1446 MIPS_SYS(sys_restart_syscall, 0)
1447 MIPS_SYS(sys_fadvise64_64, 7)
1448 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1449 MIPS_SYS(sys_fstatfs64 , 2)
1450 MIPS_SYS(sys_timer_create, 3)
1451 MIPS_SYS(sys_timer_settime, 4)
1452 MIPS_SYS(sys_timer_gettime, 2)
1453 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1454 MIPS_SYS(sys_timer_delete, 1)
1455 MIPS_SYS(sys_clock_settime, 2)
1456 MIPS_SYS(sys_clock_gettime, 2)
1457 MIPS_SYS(sys_clock_getres, 2)
1458 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1459 MIPS_SYS(sys_tgkill , 3)
1460 MIPS_SYS(sys_utimes , 2)
1461 MIPS_SYS(sys_mbind , 4)
1462 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1463 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1464 MIPS_SYS(sys_mq_open , 4)
1465 MIPS_SYS(sys_mq_unlink , 1)
1466 MIPS_SYS(sys_mq_timedsend, 5)
1467 MIPS_SYS(sys_mq_timedreceive, 5)
1468 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1469 MIPS_SYS(sys_mq_getsetattr, 3)
1470 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1471 MIPS_SYS(sys_waitid , 4)
1472 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1473 MIPS_SYS(sys_add_key , 5)
1474 MIPS_SYS(sys_request_key, 4)
1475 MIPS_SYS(sys_keyctl , 5)
1476 MIPS_SYS(sys_set_thread_area, 1)
1477 MIPS_SYS(sys_inotify_init, 0)
1478 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1479 MIPS_SYS(sys_inotify_rm_watch, 2)
1480 MIPS_SYS(sys_migrate_pages, 4)
1481 MIPS_SYS(sys_openat, 4)
1482 MIPS_SYS(sys_mkdirat, 3)
1483 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1484 MIPS_SYS(sys_fchownat, 5)
1485 MIPS_SYS(sys_futimesat, 3)
1486 MIPS_SYS(sys_fstatat64, 4)
1487 MIPS_SYS(sys_unlinkat, 3)
1488 MIPS_SYS(sys_renameat, 4) /* 4295 */
1489 MIPS_SYS(sys_linkat, 5)
1490 MIPS_SYS(sys_symlinkat, 3)
1491 MIPS_SYS(sys_readlinkat, 4)
1492 MIPS_SYS(sys_fchmodat, 3)
1493 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1494 MIPS_SYS(sys_pselect6, 6)
1495 MIPS_SYS(sys_ppoll, 5)
1496 MIPS_SYS(sys_unshare, 1)
1497 MIPS_SYS(sys_splice, 4)
1498 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1499 MIPS_SYS(sys_tee, 4)
1500 MIPS_SYS(sys_vmsplice, 4)
1501 MIPS_SYS(sys_move_pages, 6)
1502 MIPS_SYS(sys_set_robust_list, 2)
1503 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1504 MIPS_SYS(sys_kexec_load, 4)
1505 MIPS_SYS(sys_getcpu, 3)
1506 MIPS_SYS(sys_epoll_pwait, 6)
1507 MIPS_SYS(sys_ioprio_set, 3)
1508 MIPS_SYS(sys_ioprio_get, 2)
1509 };
1510
1511 #undef MIPS_SYS
1512
1513 void cpu_loop(CPUMIPSState *env)
1514 {
1515 target_siginfo_t info;
1516 int trapnr, ret;
1517 unsigned int syscall_num;
1518
1519 for(;;) {
1520 trapnr = cpu_mips_exec(env);
1521 switch(trapnr) {
1522 case EXCP_SYSCALL:
1523 syscall_num = env->gpr[2][env->current_tc] - 4000;
1524 env->PC[env->current_tc] += 4;
1525 if (syscall_num >= sizeof(mips_syscall_args)) {
1526 ret = -ENOSYS;
1527 } else {
1528 int nb_args;
1529 abi_ulong sp_reg;
1530 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1531
1532 nb_args = mips_syscall_args[syscall_num];
1533 sp_reg = env->gpr[29][env->current_tc];
1534 switch (nb_args) {
1535 /* these arguments are taken from the stack */
1536 case 8: arg8 = tgetl(sp_reg + 28);
1537 case 7: arg7 = tgetl(sp_reg + 24);
1538 case 6: arg6 = tgetl(sp_reg + 20);
1539 case 5: arg5 = tgetl(sp_reg + 16);
1540 default:
1541 break;
1542 }
1543 ret = do_syscall(env, env->gpr[2][env->current_tc],
1544 env->gpr[4][env->current_tc],
1545 env->gpr[5][env->current_tc],
1546 env->gpr[6][env->current_tc],
1547 env->gpr[7][env->current_tc],
1548 arg5, arg6/*, arg7, arg8*/);
1549 }
1550 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1551 env->gpr[7][env->current_tc] = 1; /* error flag */
1552 ret = -ret;
1553 } else {
1554 env->gpr[7][env->current_tc] = 0; /* error flag */
1555 }
1556 env->gpr[2][env->current_tc] = ret;
1557 break;
1558 case EXCP_TLBL:
1559 case EXCP_TLBS:
1560 case EXCP_CpU:
1561 case EXCP_RI:
1562 info.si_signo = TARGET_SIGILL;
1563 info.si_errno = 0;
1564 info.si_code = 0;
1565 queue_signal(info.si_signo, &info);
1566 break;
1567 case EXCP_INTERRUPT:
1568 /* just indicate that signals should be handled asap */
1569 break;
1570 case EXCP_DEBUG:
1571 {
1572 int sig;
1573
1574 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1575 if (sig)
1576 {
1577 info.si_signo = sig;
1578 info.si_errno = 0;
1579 info.si_code = TARGET_TRAP_BRKPT;
1580 queue_signal(info.si_signo, &info);
1581 }
1582 }
1583 break;
1584 default:
1585 // error:
1586 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1587 trapnr);
1588 cpu_dump_state(env, stderr, fprintf, 0);
1589 abort();
1590 }
1591 process_pending_signals(env);
1592 }
1593 }
1594 #endif
1595
1596 #ifdef TARGET_SH4
1597 void cpu_loop (CPUState *env)
1598 {
1599 int trapnr, ret;
1600 target_siginfo_t info;
1601
1602 while (1) {
1603 trapnr = cpu_sh4_exec (env);
1604
1605 switch (trapnr) {
1606 case 0x160:
1607 ret = do_syscall(env,
1608 env->gregs[3],
1609 env->gregs[4],
1610 env->gregs[5],
1611 env->gregs[6],
1612 env->gregs[7],
1613 env->gregs[0],
1614 0);
1615 env->gregs[0] = ret;
1616 env->pc += 2;
1617 break;
1618 case EXCP_DEBUG:
1619 {
1620 int sig;
1621
1622 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1623 if (sig)
1624 {
1625 info.si_signo = sig;
1626 info.si_errno = 0;
1627 info.si_code = TARGET_TRAP_BRKPT;
1628 queue_signal(info.si_signo, &info);
1629 }
1630 }
1631 break;
1632 default:
1633 printf ("Unhandled trap: 0x%x\n", trapnr);
1634 cpu_dump_state(env, stderr, fprintf, 0);
1635 exit (1);
1636 }
1637 process_pending_signals (env);
1638 }
1639 }
1640 #endif
1641
1642 #ifdef TARGET_CRIS
1643 void cpu_loop (CPUState *env)
1644 {
1645 int trapnr, ret;
1646 target_siginfo_t info;
1647
1648 while (1) {
1649 trapnr = cpu_cris_exec (env);
1650 switch (trapnr) {
1651 case 0xaa:
1652 {
1653 info.si_signo = SIGSEGV;
1654 info.si_errno = 0;
1655 /* XXX: check env->error_code */
1656 info.si_code = TARGET_SEGV_MAPERR;
1657 info._sifields._sigfault._addr = env->debug1;
1658 queue_signal(info.si_signo, &info);
1659 }
1660 break;
1661 case EXCP_BREAK:
1662 ret = do_syscall(env,
1663 env->regs[9],
1664 env->regs[10],
1665 env->regs[11],
1666 env->regs[12],
1667 env->regs[13],
1668 env->pregs[7],
1669 env->pregs[11]);
1670 env->regs[10] = ret;
1671 env->pc += 2;
1672 break;
1673 case EXCP_DEBUG:
1674 {
1675 int sig;
1676
1677 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1678 if (sig)
1679 {
1680 info.si_signo = sig;
1681 info.si_errno = 0;
1682 info.si_code = TARGET_TRAP_BRKPT;
1683 queue_signal(info.si_signo, &info);
1684 }
1685 }
1686 break;
1687 default:
1688 printf ("Unhandled trap: 0x%x\n", trapnr);
1689 cpu_dump_state(env, stderr, fprintf, 0);
1690 exit (1);
1691 }
1692 process_pending_signals (env);
1693 }
1694 }
1695 #endif
1696
1697 #ifdef TARGET_M68K
1698
1699 void cpu_loop(CPUM68KState *env)
1700 {
1701 int trapnr;
1702 unsigned int n;
1703 target_siginfo_t info;
1704 TaskState *ts = env->opaque;
1705
1706 for(;;) {
1707 trapnr = cpu_m68k_exec(env);
1708 switch(trapnr) {
1709 case EXCP_ILLEGAL:
1710 {
1711 if (ts->sim_syscalls) {
1712 uint16_t nr;
1713 nr = lduw(env->pc + 2);
1714 env->pc += 4;
1715 do_m68k_simcall(env, nr);
1716 } else {
1717 goto do_sigill;
1718 }
1719 }
1720 break;
1721 case EXCP_HALT_INSN:
1722 /* Semihosing syscall. */
1723 env->pc += 4;
1724 do_m68k_semihosting(env, env->dregs[0]);
1725 break;
1726 case EXCP_LINEA:
1727 case EXCP_LINEF:
1728 case EXCP_UNSUPPORTED:
1729 do_sigill:
1730 info.si_signo = SIGILL;
1731 info.si_errno = 0;
1732 info.si_code = TARGET_ILL_ILLOPN;
1733 info._sifields._sigfault._addr = env->pc;
1734 queue_signal(info.si_signo, &info);
1735 break;
1736 case EXCP_TRAP0:
1737 {
1738 ts->sim_syscalls = 0;
1739 n = env->dregs[0];
1740 env->pc += 2;
1741 env->dregs[0] = do_syscall(env,
1742 n,
1743 env->dregs[1],
1744 env->dregs[2],
1745 env->dregs[3],
1746 env->dregs[4],
1747 env->dregs[5],
1748 env->dregs[6]);
1749 }
1750 break;
1751 case EXCP_INTERRUPT:
1752 /* just indicate that signals should be handled asap */
1753 break;
1754 case EXCP_ACCESS:
1755 {
1756 info.si_signo = SIGSEGV;
1757 info.si_errno = 0;
1758 /* XXX: check env->error_code */
1759 info.si_code = TARGET_SEGV_MAPERR;
1760 info._sifields._sigfault._addr = env->mmu.ar;
1761 queue_signal(info.si_signo, &info);
1762 }
1763 break;
1764 case EXCP_DEBUG:
1765 {
1766 int sig;
1767
1768 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1769 if (sig)
1770 {
1771 info.si_signo = sig;
1772 info.si_errno = 0;
1773 info.si_code = TARGET_TRAP_BRKPT;
1774 queue_signal(info.si_signo, &info);
1775 }
1776 }
1777 break;
1778 default:
1779 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1780 trapnr);
1781 cpu_dump_state(env, stderr, fprintf, 0);
1782 abort();
1783 }
1784 process_pending_signals(env);
1785 }
1786 }
1787 #endif /* TARGET_M68K */
1788
1789 #ifdef TARGET_ALPHA
1790 void cpu_loop (CPUState *env)
1791 {
1792 int trapnr;
1793 target_siginfo_t info;
1794
1795 while (1) {
1796 trapnr = cpu_alpha_exec (env);
1797
1798 switch (trapnr) {
1799 case EXCP_RESET:
1800 fprintf(stderr, "Reset requested. Exit\n");
1801 exit(1);
1802 break;
1803 case EXCP_MCHK:
1804 fprintf(stderr, "Machine check exception. Exit\n");
1805 exit(1);
1806 break;
1807 case EXCP_ARITH:
1808 fprintf(stderr, "Arithmetic trap.\n");
1809 exit(1);
1810 break;
1811 case EXCP_HW_INTERRUPT:
1812 fprintf(stderr, "External interrupt. Exit\n");
1813 exit(1);
1814 break;
1815 case EXCP_DFAULT:
1816 fprintf(stderr, "MMU data fault\n");
1817 exit(1);
1818 break;
1819 case EXCP_DTB_MISS_PAL:
1820 fprintf(stderr, "MMU data TLB miss in PALcode\n");
1821 exit(1);
1822 break;
1823 case EXCP_ITB_MISS:
1824 fprintf(stderr, "MMU instruction TLB miss\n");
1825 exit(1);
1826 break;
1827 case EXCP_ITB_ACV:
1828 fprintf(stderr, "MMU instruction access violation\n");
1829 exit(1);
1830 break;
1831 case EXCP_DTB_MISS_NATIVE:
1832 fprintf(stderr, "MMU data TLB miss\n");
1833 exit(1);
1834 break;
1835 case EXCP_UNALIGN:
1836 fprintf(stderr, "Unaligned access\n");
1837 exit(1);
1838 break;
1839 case EXCP_OPCDEC:
1840 fprintf(stderr, "Invalid instruction\n");
1841 exit(1);
1842 break;
1843 case EXCP_FEN:
1844 fprintf(stderr, "Floating-point not allowed\n");
1845 exit(1);
1846 break;
1847 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
1848 fprintf(stderr, "Call to PALcode\n");
1849 call_pal(env, (trapnr >> 6) | 0x80);
1850 break;
1851 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
1852 fprintf(stderr, "Privileged call to PALcode\n");
1853 exit(1);
1854 break;
1855 case EXCP_DEBUG:
1856 {
1857 int sig;
1858
1859 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1860 if (sig)
1861 {
1862 info.si_signo = sig;
1863 info.si_errno = 0;
1864 info.si_code = TARGET_TRAP_BRKPT;
1865 queue_signal(info.si_signo, &info);
1866 }
1867 }
1868 break;
1869 default:
1870 printf ("Unhandled trap: 0x%x\n", trapnr);
1871 cpu_dump_state(env, stderr, fprintf, 0);
1872 exit (1);
1873 }
1874 process_pending_signals (env);
1875 }
1876 }
1877 #endif /* TARGET_ALPHA */
1878
1879 void usage(void)
1880 {
1881 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n"
1882 "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n"
1883 "Linux CPU emulator (compiled for %s emulation)\n"
1884 "\n"
1885 "-h print this help\n"
1886 "-g port wait gdb connection to port\n"
1887 "-L path set the elf interpreter prefix (default=%s)\n"
1888 "-s size set the stack size in bytes (default=%ld)\n"
1889 "-cpu model select CPU (-cpu ? for list)\n"
1890 "-drop-ld-preload drop LD_PRELOAD for target process\n"
1891 "\n"
1892 "debug options:\n"
1893 "-d options activate log (logfile=%s)\n"
1894 "-p pagesize set the host page size to 'pagesize'\n"
1895 "-strace log system calls\n",
1896 TARGET_ARCH,
1897 interp_prefix,
1898 x86_stack_size,
1899 DEBUG_LOGFILE);
1900 _exit(1);
1901 }
1902
1903 /* XXX: currently only used for async signals (see signal.c) */
1904 CPUState *global_env;
1905
1906 /* used to free thread contexts */
1907 TaskState *first_task_state;
1908
1909 int main(int argc, char **argv)
1910 {
1911 const char *filename;
1912 const char *cpu_model;
1913 struct target_pt_regs regs1, *regs = &regs1;
1914 struct image_info info1, *info = &info1;
1915 TaskState ts1, *ts = &ts1;
1916 CPUState *env;
1917 int optind;
1918 const char *r;
1919 int gdbstub_port = 0;
1920 int drop_ld_preload = 0, environ_count = 0;
1921 char **target_environ, **wrk, **dst;
1922
1923 if (argc <= 1)
1924 usage();
1925
1926 /* init debug */
1927 cpu_set_log_filename(DEBUG_LOGFILE);
1928
1929 cpu_model = NULL;
1930 optind = 1;
1931 for(;;) {
1932 if (optind >= argc)
1933 break;
1934 r = argv[optind];
1935 if (r[0] != '-')
1936 break;
1937 optind++;
1938 r++;
1939 if (!strcmp(r, "-")) {
1940 break;
1941 } else if (!strcmp(r, "d")) {
1942 int mask;
1943 CPULogItem *item;
1944
1945 if (optind >= argc)
1946 break;
1947
1948 r = argv[optind++];
1949 mask = cpu_str_to_log_mask(r);
1950 if (!mask) {
1951 printf("Log items (comma separated):\n");
1952 for(item = cpu_log_items; item->mask != 0; item++) {
1953 printf("%-10s %s\n", item->name, item->help);
1954 }
1955 exit(1);
1956 }
1957 cpu_set_log(mask);
1958 } else if (!strcmp(r, "s")) {
1959 r = argv[optind++];
1960 x86_stack_size = strtol(r, (char **)&r, 0);
1961 if (x86_stack_size <= 0)
1962 usage();
1963 if (*r == 'M')
1964 x86_stack_size *= 1024 * 1024;
1965 else if (*r == 'k' || *r == 'K')
1966 x86_stack_size *= 1024;
1967 } else if (!strcmp(r, "L")) {
1968 interp_prefix = argv[optind++];
1969 } else if (!strcmp(r, "p")) {
1970 qemu_host_page_size = atoi(argv[optind++]);
1971 if (qemu_host_page_size == 0 ||
1972 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
1973 fprintf(stderr, "page size must be a power of two\n");
1974 exit(1);
1975 }
1976 } else if (!strcmp(r, "g")) {
1977 gdbstub_port = atoi(argv[optind++]);
1978 } else if (!strcmp(r, "r")) {
1979 qemu_uname_release = argv[optind++];
1980 } else if (!strcmp(r, "cpu")) {
1981 cpu_model = argv[optind++];
1982 if (strcmp(cpu_model, "?") == 0) {
1983 /* XXX: implement xxx_cpu_list for targets that still miss it */
1984 #if defined(cpu_list)
1985 cpu_list(stdout, &fprintf);
1986 #endif
1987 _exit(1);
1988 }
1989 } else if (!strcmp(r, "drop-ld-preload")) {
1990 drop_ld_preload = 1;
1991 } else if (!strcmp(r, "strace")) {
1992 do_strace = 1;
1993 } else
1994 {
1995 usage();
1996 }
1997 }
1998 if (optind >= argc)
1999 usage();
2000 filename = argv[optind];
2001
2002 /* Zero out regs */
2003 memset(regs, 0, sizeof(struct target_pt_regs));
2004
2005 /* Zero out image_info */
2006 memset(info, 0, sizeof(struct image_info));
2007
2008 /* Scan interp_prefix dir for replacement files. */
2009 init_paths(interp_prefix);
2010
2011 if (cpu_model == NULL) {
2012 #if defined(TARGET_I386)
2013 #ifdef TARGET_X86_64
2014 cpu_model = "qemu64";
2015 #else
2016 cpu_model = "qemu32";
2017 #endif
2018 #elif defined(TARGET_ARM)
2019 cpu_model = "arm926";
2020 #elif defined(TARGET_M68K)
2021 cpu_model = "any";
2022 #elif defined(TARGET_SPARC)
2023 #ifdef TARGET_SPARC64
2024 cpu_model = "TI UltraSparc II";
2025 #else
2026 cpu_model = "Fujitsu MB86904";
2027 #endif
2028 #elif defined(TARGET_MIPS)
2029 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2030 cpu_model = "20Kc";
2031 #else
2032 cpu_model = "24Kf";
2033 #endif
2034 #elif defined(TARGET_PPC)
2035 #ifdef TARGET_PPC64
2036 cpu_model = "970";
2037 #else
2038 cpu_model = "750";
2039 #endif
2040 #else
2041 cpu_model = "any";
2042 #endif
2043 }
2044 /* NOTE: we need to init the CPU at this stage to get
2045 qemu_host_page_size */
2046 env = cpu_init(cpu_model);
2047 if (!env) {
2048 fprintf(stderr, "Unable to find CPU definition\n");
2049 exit(1);
2050 }
2051 global_env = env;
2052
2053 if (getenv("QEMU_STRACE")) {
2054 do_strace = 1;
2055 }
2056
2057 wrk = environ;
2058 while (*(wrk++))
2059 environ_count++;
2060
2061 target_environ = malloc((environ_count + 1) * sizeof(char *));
2062 if (!target_environ)
2063 abort();
2064 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2065 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2066 continue;
2067 *(dst++) = strdup(*wrk);
2068 }
2069 *dst = NULL; /* NULL terminate target_environ */
2070
2071 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2072 printf("Error loading %s\n", filename);
2073 _exit(1);
2074 }
2075
2076 for (wrk = target_environ; *wrk; wrk++) {
2077 free(*wrk);
2078 }
2079
2080 free(target_environ);
2081
2082 if (loglevel) {
2083 page_dump(logfile);
2084
2085 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2086 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2087 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2088 info->start_code);
2089 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2090 info->start_data);
2091 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2092 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2093 info->start_stack);
2094 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2095 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2096 }
2097
2098 target_set_brk(info->brk);
2099 syscall_init();
2100 signal_init();
2101
2102 /* build Task State */
2103 memset(ts, 0, sizeof(TaskState));
2104 env->opaque = ts;
2105 ts->used = 1;
2106 ts->info = info;
2107 env->user_mode_only = 1;
2108
2109 #if defined(TARGET_I386)
2110 cpu_x86_set_cpl(env, 3);
2111
2112 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2113 env->hflags |= HF_PE_MASK;
2114 if (env->cpuid_features & CPUID_SSE) {
2115 env->cr[4] |= CR4_OSFXSR_MASK;
2116 env->hflags |= HF_OSFXSR_MASK;
2117 }
2118 #ifndef TARGET_ABI32
2119 /* enable 64 bit mode if possible */
2120 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2121 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2122 exit(1);
2123 }
2124 env->cr[4] |= CR4_PAE_MASK;
2125 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2126 env->hflags |= HF_LMA_MASK;
2127 #endif
2128
2129 /* flags setup : we activate the IRQs by default as in user mode */
2130 env->eflags |= IF_MASK;
2131
2132 /* linux register setup */
2133 #ifndef TARGET_ABI32
2134 env->regs[R_EAX] = regs->rax;
2135 env->regs[R_EBX] = regs->rbx;
2136 env->regs[R_ECX] = regs->rcx;
2137 env->regs[R_EDX] = regs->rdx;
2138 env->regs[R_ESI] = regs->rsi;
2139 env->regs[R_EDI] = regs->rdi;
2140 env->regs[R_EBP] = regs->rbp;
2141 env->regs[R_ESP] = regs->rsp;
2142 env->eip = regs->rip;
2143 #else
2144 env->regs[R_EAX] = regs->eax;
2145 env->regs[R_EBX] = regs->ebx;
2146 env->regs[R_ECX] = regs->ecx;
2147 env->regs[R_EDX] = regs->edx;
2148 env->regs[R_ESI] = regs->esi;
2149 env->regs[R_EDI] = regs->edi;
2150 env->regs[R_EBP] = regs->ebp;
2151 env->regs[R_ESP] = regs->esp;
2152 env->eip = regs->eip;
2153 #endif
2154
2155 /* linux interrupt setup */
2156 env->idt.base = h2g(idt_table);
2157 env->idt.limit = sizeof(idt_table) - 1;
2158 set_idt(0, 0);
2159 set_idt(1, 0);
2160 set_idt(2, 0);
2161 set_idt(3, 3);
2162 set_idt(4, 3);
2163 set_idt(5, 3);
2164 set_idt(6, 0);
2165 set_idt(7, 0);
2166 set_idt(8, 0);
2167 set_idt(9, 0);
2168 set_idt(10, 0);
2169 set_idt(11, 0);
2170 set_idt(12, 0);
2171 set_idt(13, 0);
2172 set_idt(14, 0);
2173 set_idt(15, 0);
2174 set_idt(16, 0);
2175 set_idt(17, 0);
2176 set_idt(18, 0);
2177 set_idt(19, 0);
2178 set_idt(0x80, 3);
2179
2180 /* linux segment setup */
2181 {
2182 uint64_t *gdt_table;
2183 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2184 env->gdt.base = h2g((unsigned long)gdt_table);
2185 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2186 #ifdef TARGET_ABI32
2187 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2188 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2189 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2190 #else
2191 /* 64 bit code segment */
2192 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2193 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2194 DESC_L_MASK |
2195 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2196 #endif
2197 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2198 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2199 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2200 }
2201 cpu_x86_load_seg(env, R_CS, __USER_CS);
2202 cpu_x86_load_seg(env, R_SS, __USER_DS);
2203 #ifdef TARGET_ABI32
2204 cpu_x86_load_seg(env, R_DS, __USER_DS);
2205 cpu_x86_load_seg(env, R_ES, __USER_DS);
2206 cpu_x86_load_seg(env, R_FS, __USER_DS);
2207 cpu_x86_load_seg(env, R_GS, __USER_DS);
2208 /* This hack makes Wine work... */
2209 env->segs[R_FS].selector = 0;
2210 #else
2211 cpu_x86_load_seg(env, R_DS, 0);
2212 cpu_x86_load_seg(env, R_ES, 0);
2213 cpu_x86_load_seg(env, R_FS, 0);
2214 cpu_x86_load_seg(env, R_GS, 0);
2215 #endif
2216 #elif defined(TARGET_ARM)
2217 {
2218 int i;
2219 cpsr_write(env, regs->uregs[16], 0xffffffff);
2220 for(i = 0; i < 16; i++) {
2221 env->regs[i] = regs->uregs[i];
2222 }
2223 }
2224 #elif defined(TARGET_SPARC)
2225 {
2226 int i;
2227 env->pc = regs->pc;
2228 env->npc = regs->npc;
2229 env->y = regs->y;
2230 for(i = 0; i < 8; i++)
2231 env->gregs[i] = regs->u_regs[i];
2232 for(i = 0; i < 8; i++)
2233 env->regwptr[i] = regs->u_regs[i + 8];
2234 }
2235 #elif defined(TARGET_PPC)
2236 {
2237 int i;
2238
2239 #if defined(TARGET_PPC64)
2240 #if defined(TARGET_ABI32)
2241 env->msr &= ~((target_ulong)1 << MSR_SF);
2242 #else
2243 env->msr |= (target_ulong)1 << MSR_SF;
2244 #endif
2245 #endif
2246 env->nip = regs->nip;
2247 for(i = 0; i < 32; i++) {
2248 env->gpr[i] = regs->gpr[i];
2249 }
2250 }
2251 #elif defined(TARGET_M68K)
2252 {
2253 env->pc = regs->pc;
2254 env->dregs[0] = regs->d0;
2255 env->dregs[1] = regs->d1;
2256 env->dregs[2] = regs->d2;
2257 env->dregs[3] = regs->d3;
2258 env->dregs[4] = regs->d4;
2259 env->dregs[5] = regs->d5;
2260 env->dregs[6] = regs->d6;
2261 env->dregs[7] = regs->d7;
2262 env->aregs[0] = regs->a0;
2263 env->aregs[1] = regs->a1;
2264 env->aregs[2] = regs->a2;
2265 env->aregs[3] = regs->a3;
2266 env->aregs[4] = regs->a4;
2267 env->aregs[5] = regs->a5;
2268 env->aregs[6] = regs->a6;
2269 env->aregs[7] = regs->usp;
2270 env->sr = regs->sr;
2271 ts->sim_syscalls = 1;
2272 }
2273 #elif defined(TARGET_MIPS)
2274 {
2275 int i;
2276
2277 for(i = 0; i < 32; i++) {
2278 env->gpr[i][env->current_tc] = regs->regs[i];
2279 }
2280 env->PC[env->current_tc] = regs->cp0_epc;
2281 }
2282 #elif defined(TARGET_SH4)
2283 {
2284 int i;
2285
2286 for(i = 0; i < 16; i++) {
2287 env->gregs[i] = regs->regs[i];
2288 }
2289 env->pc = regs->pc;
2290 }
2291 #elif defined(TARGET_ALPHA)
2292 {
2293 int i;
2294
2295 for(i = 0; i < 28; i++) {
2296 env->ir[i] = ((abi_ulong *)regs)[i];
2297 }
2298 env->ipr[IPR_USP] = regs->usp;
2299 env->ir[30] = regs->usp;
2300 env->pc = regs->pc;
2301 env->unique = regs->unique;
2302 }
2303 #elif defined(TARGET_CRIS)
2304 {
2305 env->regs[0] = regs->r0;
2306 env->regs[1] = regs->r1;
2307 env->regs[2] = regs->r2;
2308 env->regs[3] = regs->r3;
2309 env->regs[4] = regs->r4;
2310 env->regs[5] = regs->r5;
2311 env->regs[6] = regs->r6;
2312 env->regs[7] = regs->r7;
2313 env->regs[8] = regs->r8;
2314 env->regs[9] = regs->r9;
2315 env->regs[10] = regs->r10;
2316 env->regs[11] = regs->r11;
2317 env->regs[12] = regs->r12;
2318 env->regs[13] = regs->r13;
2319 env->regs[14] = info->start_stack;
2320 env->regs[15] = regs->acr;
2321 env->pc = regs->erp;
2322 }
2323 #else
2324 #error unsupported target CPU
2325 #endif
2326
2327 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2328 ts->stack_base = info->start_stack;
2329 ts->heap_base = info->brk;
2330 /* This will be filled in on the first SYS_HEAPINFO call. */
2331 ts->heap_limit = 0;
2332 #endif
2333
2334 if (gdbstub_port) {
2335 gdbserver_start (gdbstub_port);
2336 gdb_handlesig(env, 0);
2337 }
2338 cpu_loop(env);
2339 /* never exits */
2340 return 0;
2341 }
Samsung s3c2440 and arm920t support for the mini2440 dev board