2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #ifdef CONFIG_DYNGEN_OP
27 /* legacy dyngen operations */
31 int gen_new_label(void);
33 static inline void tcg_gen_op1(int opc
, TCGv arg1
)
36 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
39 static inline void tcg_gen_op1i(int opc
, TCGArg arg1
)
42 *gen_opparam_ptr
++ = arg1
;
45 static inline void tcg_gen_op2(int opc
, TCGv arg1
, TCGv arg2
)
48 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
49 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
52 static inline void tcg_gen_op2i(int opc
, TCGv arg1
, TCGArg arg2
)
55 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
56 *gen_opparam_ptr
++ = arg2
;
59 static inline void tcg_gen_op2ii(int opc
, TCGArg arg1
, TCGArg arg2
)
62 *gen_opparam_ptr
++ = arg1
;
63 *gen_opparam_ptr
++ = arg2
;
66 static inline void tcg_gen_op3(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
)
69 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
70 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
71 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
74 static inline void tcg_gen_op3i(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
)
77 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
78 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
79 *gen_opparam_ptr
++ = arg3
;
82 static inline void tcg_gen_op4(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
86 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
87 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
88 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
89 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
92 static inline void tcg_gen_op4i(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
96 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
97 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
98 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
99 *gen_opparam_ptr
++ = arg4
;
102 static inline void tcg_gen_op4ii(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
,
105 *gen_opc_ptr
++ = opc
;
106 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
107 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
108 *gen_opparam_ptr
++ = arg3
;
109 *gen_opparam_ptr
++ = arg4
;
112 static inline void tcg_gen_op5(int opc
, TCGv arg1
, TCGv arg2
,
113 TCGv arg3
, TCGv arg4
,
116 *gen_opc_ptr
++ = opc
;
117 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
118 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
119 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
120 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
121 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
124 static inline void tcg_gen_op5i(int opc
, TCGv arg1
, TCGv arg2
,
125 TCGv arg3
, TCGv arg4
,
128 *gen_opc_ptr
++ = opc
;
129 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
130 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
131 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
132 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
133 *gen_opparam_ptr
++ = arg5
;
136 static inline void tcg_gen_op6(int opc
, TCGv arg1
, TCGv arg2
,
137 TCGv arg3
, TCGv arg4
,
138 TCGv arg5
, TCGv arg6
)
140 *gen_opc_ptr
++ = opc
;
141 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
142 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
143 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
144 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
145 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
146 *gen_opparam_ptr
++ = GET_TCGV(arg6
);
149 static inline void tcg_gen_op6ii(int opc
, TCGv arg1
, TCGv arg2
,
150 TCGv arg3
, TCGv arg4
,
151 TCGArg arg5
, TCGArg arg6
)
153 *gen_opc_ptr
++ = opc
;
154 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
155 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
156 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
157 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
158 *gen_opparam_ptr
++ = arg5
;
159 *gen_opparam_ptr
++ = arg6
;
162 static inline void gen_set_label(int n
)
164 tcg_gen_op1i(INDEX_op_set_label
, n
);
167 static inline void tcg_gen_br(int label
)
169 tcg_gen_op1i(INDEX_op_br
, label
);
172 static inline void tcg_gen_mov_i32(TCGv ret
, TCGv arg
)
174 if (GET_TCGV(ret
) != GET_TCGV(arg
))
175 tcg_gen_op2(INDEX_op_mov_i32
, ret
, arg
);
178 static inline void tcg_gen_movi_i32(TCGv ret
, int32_t arg
)
180 tcg_gen_op2i(INDEX_op_movi_i32
, ret
, arg
);
184 #define TCG_HELPER_CALL_FLAGS 0
186 static inline void tcg_gen_helper_0_0(void *func
)
189 t0
= tcg_const_ptr((tcg_target_long
)func
);
190 tcg_gen_call(&tcg_ctx
,
191 t0
, TCG_HELPER_CALL_FLAGS
,
196 static inline void tcg_gen_helper_0_1(void *func
, TCGv arg
)
199 t0
= tcg_const_ptr((tcg_target_long
)func
);
200 tcg_gen_call(&tcg_ctx
,
201 t0
, TCG_HELPER_CALL_FLAGS
,
206 static inline void tcg_gen_helper_0_2(void *func
, TCGv arg1
, TCGv arg2
)
212 t0
= tcg_const_ptr((tcg_target_long
)func
);
213 tcg_gen_call(&tcg_ctx
,
214 t0
, TCG_HELPER_CALL_FLAGS
,
219 static inline void tcg_gen_helper_0_3(void *func
,
220 TCGv arg1
, TCGv arg2
, TCGv arg3
)
227 t0
= tcg_const_ptr((tcg_target_long
)func
);
228 tcg_gen_call(&tcg_ctx
,
229 t0
, TCG_HELPER_CALL_FLAGS
,
234 static inline void tcg_gen_helper_0_4(void *func
, TCGv arg1
, TCGv arg2
,
235 TCGv arg3
, TCGv arg4
)
243 t0
= tcg_const_ptr((tcg_target_long
)func
);
244 tcg_gen_call(&tcg_ctx
,
245 t0
, TCG_HELPER_CALL_FLAGS
,
250 static inline void tcg_gen_helper_1_0(void *func
, TCGv ret
)
253 t0
= tcg_const_ptr((tcg_target_long
)func
);
254 tcg_gen_call(&tcg_ctx
,
255 t0
, TCG_HELPER_CALL_FLAGS
,
260 static inline void tcg_gen_helper_1_1(void *func
, TCGv ret
, TCGv arg1
)
263 t0
= tcg_const_ptr((tcg_target_long
)func
);
264 tcg_gen_call(&tcg_ctx
,
265 t0
, TCG_HELPER_CALL_FLAGS
,
270 static inline void tcg_gen_helper_1_2(void *func
, TCGv ret
,
271 TCGv arg1
, TCGv arg2
)
277 t0
= tcg_const_ptr((tcg_target_long
)func
);
278 tcg_gen_call(&tcg_ctx
,
279 t0
, TCG_HELPER_CALL_FLAGS
,
284 static inline void tcg_gen_helper_1_3(void *func
, TCGv ret
,
285 TCGv arg1
, TCGv arg2
, TCGv arg3
)
292 t0
= tcg_const_ptr((tcg_target_long
)func
);
293 tcg_gen_call(&tcg_ctx
,
294 t0
, TCG_HELPER_CALL_FLAGS
,
299 static inline void tcg_gen_helper_1_4(void *func
, TCGv ret
,
300 TCGv arg1
, TCGv arg2
, TCGv arg3
,
309 t0
= tcg_const_ptr((tcg_target_long
)func
);
310 tcg_gen_call(&tcg_ctx
,
311 t0
, TCG_HELPER_CALL_FLAGS
,
318 static inline void tcg_gen_ld8u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
320 tcg_gen_op3i(INDEX_op_ld8u_i32
, ret
, arg2
, offset
);
323 static inline void tcg_gen_ld8s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
325 tcg_gen_op3i(INDEX_op_ld8s_i32
, ret
, arg2
, offset
);
328 static inline void tcg_gen_ld16u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
330 tcg_gen_op3i(INDEX_op_ld16u_i32
, ret
, arg2
, offset
);
333 static inline void tcg_gen_ld16s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
335 tcg_gen_op3i(INDEX_op_ld16s_i32
, ret
, arg2
, offset
);
338 static inline void tcg_gen_ld_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
340 tcg_gen_op3i(INDEX_op_ld_i32
, ret
, arg2
, offset
);
343 static inline void tcg_gen_st8_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
345 tcg_gen_op3i(INDEX_op_st8_i32
, arg1
, arg2
, offset
);
348 static inline void tcg_gen_st16_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
350 tcg_gen_op3i(INDEX_op_st16_i32
, arg1
, arg2
, offset
);
353 static inline void tcg_gen_st_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
355 tcg_gen_op3i(INDEX_op_st_i32
, arg1
, arg2
, offset
);
358 static inline void tcg_gen_add_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
360 tcg_gen_op3(INDEX_op_add_i32
, ret
, arg1
, arg2
);
363 static inline void tcg_gen_addi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
365 /* some cases can be optimized here */
367 tcg_gen_mov_i32(ret
, arg1
);
369 TCGv t0
= tcg_const_i32(arg2
);
370 tcg_gen_add_i32(ret
, arg1
, t0
);
375 static inline void tcg_gen_sub_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
377 tcg_gen_op3(INDEX_op_sub_i32
, ret
, arg1
, arg2
);
380 static inline void tcg_gen_subfi_i32(TCGv ret
, int32_t arg1
, TCGv arg2
)
382 TCGv t0
= tcg_const_i32(arg1
);
383 tcg_gen_sub_i32(ret
, t0
, arg2
);
387 static inline void tcg_gen_subi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
389 /* some cases can be optimized here */
391 tcg_gen_mov_i32(ret
, arg1
);
393 TCGv t0
= tcg_const_i32(arg2
);
394 tcg_gen_sub_i32(ret
, arg1
, t0
);
399 static inline void tcg_gen_and_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
401 tcg_gen_op3(INDEX_op_and_i32
, ret
, arg1
, arg2
);
404 static inline void tcg_gen_andi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
406 /* some cases can be optimized here */
408 tcg_gen_movi_i32(ret
, 0);
409 } else if (arg2
== 0xffffffff) {
410 tcg_gen_mov_i32(ret
, arg1
);
412 TCGv t0
= tcg_const_i32(arg2
);
413 tcg_gen_and_i32(ret
, arg1
, t0
);
418 static inline void tcg_gen_or_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
420 tcg_gen_op3(INDEX_op_or_i32
, ret
, arg1
, arg2
);
423 static inline void tcg_gen_ori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
425 /* some cases can be optimized here */
426 if (arg2
== 0xffffffff) {
427 tcg_gen_movi_i32(ret
, 0xffffffff);
428 } else if (arg2
== 0) {
429 tcg_gen_mov_i32(ret
, arg1
);
431 TCGv t0
= tcg_const_i32(arg2
);
432 tcg_gen_or_i32(ret
, arg1
, t0
);
437 static inline void tcg_gen_xor_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
439 tcg_gen_op3(INDEX_op_xor_i32
, ret
, arg1
, arg2
);
442 static inline void tcg_gen_xori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
444 /* some cases can be optimized here */
446 tcg_gen_mov_i32(ret
, arg1
);
448 TCGv t0
= tcg_const_i32(arg2
);
449 tcg_gen_xor_i32(ret
, arg1
, t0
);
454 static inline void tcg_gen_shl_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
456 tcg_gen_op3(INDEX_op_shl_i32
, ret
, arg1
, arg2
);
459 static inline void tcg_gen_shli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
462 tcg_gen_mov_i32(ret
, arg1
);
464 TCGv t0
= tcg_const_i32(arg2
);
465 tcg_gen_shl_i32(ret
, arg1
, t0
);
470 static inline void tcg_gen_shr_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
472 tcg_gen_op3(INDEX_op_shr_i32
, ret
, arg1
, arg2
);
475 static inline void tcg_gen_shri_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
478 tcg_gen_mov_i32(ret
, arg1
);
480 TCGv t0
= tcg_const_i32(arg2
);
481 tcg_gen_shr_i32(ret
, arg1
, t0
);
486 static inline void tcg_gen_sar_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
488 tcg_gen_op3(INDEX_op_sar_i32
, ret
, arg1
, arg2
);
491 static inline void tcg_gen_sari_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
494 tcg_gen_mov_i32(ret
, arg1
);
496 TCGv t0
= tcg_const_i32(arg2
);
497 tcg_gen_sar_i32(ret
, arg1
, t0
);
502 static inline void tcg_gen_brcond_i32(int cond
, TCGv arg1
, TCGv arg2
,
505 tcg_gen_op4ii(INDEX_op_brcond_i32
, arg1
, arg2
, cond
, label_index
);
508 static inline void tcg_gen_brcondi_i32(int cond
, TCGv arg1
, int32_t arg2
,
511 TCGv t0
= tcg_const_i32(arg2
);
512 tcg_gen_brcond_i32(cond
, arg1
, t0
, label_index
);
516 static inline void tcg_gen_mul_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
518 tcg_gen_op3(INDEX_op_mul_i32
, ret
, arg1
, arg2
);
521 static inline void tcg_gen_muli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
523 TCGv t0
= tcg_const_i32(arg2
);
524 tcg_gen_mul_i32(ret
, arg1
, t0
);
528 #ifdef TCG_TARGET_HAS_div_i32
529 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
531 tcg_gen_op3(INDEX_op_div_i32
, ret
, arg1
, arg2
);
534 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
536 tcg_gen_op3(INDEX_op_rem_i32
, ret
, arg1
, arg2
);
539 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
541 tcg_gen_op3(INDEX_op_divu_i32
, ret
, arg1
, arg2
);
544 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
546 tcg_gen_op3(INDEX_op_remu_i32
, ret
, arg1
, arg2
);
549 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
552 t0
= tcg_temp_new(TCG_TYPE_I32
);
553 tcg_gen_sari_i32(t0
, arg1
, 31);
554 tcg_gen_op5(INDEX_op_div2_i32
, ret
, t0
, arg1
, t0
, arg2
);
558 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
561 t0
= tcg_temp_new(TCG_TYPE_I32
);
562 tcg_gen_sari_i32(t0
, arg1
, 31);
563 tcg_gen_op5(INDEX_op_div2_i32
, t0
, ret
, arg1
, t0
, arg2
);
567 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
570 t0
= tcg_temp_new(TCG_TYPE_I32
);
571 tcg_gen_movi_i32(t0
, 0);
572 tcg_gen_op5(INDEX_op_divu2_i32
, ret
, t0
, arg1
, t0
, arg2
);
576 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
579 t0
= tcg_temp_new(TCG_TYPE_I32
);
580 tcg_gen_movi_i32(t0
, 0);
581 tcg_gen_op5(INDEX_op_divu2_i32
, t0
, ret
, arg1
, t0
, arg2
);
586 #if TCG_TARGET_REG_BITS == 32
588 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
590 if (GET_TCGV(ret
) != GET_TCGV(arg
)) {
591 tcg_gen_mov_i32(ret
, arg
);
592 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg
));
596 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
598 tcg_gen_movi_i32(ret
, arg
);
599 tcg_gen_movi_i32(TCGV_HIGH(ret
), arg
>> 32);
602 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
604 tcg_gen_ld8u_i32(ret
, arg2
, offset
);
605 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
608 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
610 tcg_gen_ld8s_i32(ret
, arg2
, offset
);
611 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
614 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
616 tcg_gen_ld16u_i32(ret
, arg2
, offset
);
617 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
620 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
622 tcg_gen_ld16s_i32(ret
, arg2
, offset
);
623 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
626 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
628 tcg_gen_ld_i32(ret
, arg2
, offset
);
629 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
632 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
634 tcg_gen_ld_i32(ret
, arg2
, offset
);
635 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
638 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
640 /* since arg2 and ret have different types, they cannot be the
642 #ifdef TCG_TARGET_WORDS_BIGENDIAN
643 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
);
644 tcg_gen_ld_i32(ret
, arg2
, offset
+ 4);
646 tcg_gen_ld_i32(ret
, arg2
, offset
);
647 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
+ 4);
651 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
653 tcg_gen_st8_i32(arg1
, arg2
, offset
);
656 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
658 tcg_gen_st16_i32(arg1
, arg2
, offset
);
661 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
663 tcg_gen_st_i32(arg1
, arg2
, offset
);
666 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
668 #ifdef TCG_TARGET_WORDS_BIGENDIAN
669 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
);
670 tcg_gen_st_i32(arg1
, arg2
, offset
+ 4);
672 tcg_gen_st_i32(arg1
, arg2
, offset
);
673 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
+ 4);
677 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
679 tcg_gen_op6(INDEX_op_add2_i32
, ret
, TCGV_HIGH(ret
),
680 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
683 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
685 tcg_gen_op6(INDEX_op_sub2_i32
, ret
, TCGV_HIGH(ret
),
686 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
689 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
691 tcg_gen_and_i32(ret
, arg1
, arg2
);
692 tcg_gen_and_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
695 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
697 tcg_gen_andi_i32(ret
, arg1
, arg2
);
698 tcg_gen_andi_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
701 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
703 tcg_gen_or_i32(ret
, arg1
, arg2
);
704 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
707 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
709 tcg_gen_ori_i32(ret
, arg1
, arg2
);
710 tcg_gen_ori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
713 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
715 tcg_gen_xor_i32(ret
, arg1
, arg2
);
716 tcg_gen_xor_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
719 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
721 tcg_gen_xori_i32(ret
, arg1
, arg2
);
722 tcg_gen_xori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
725 /* XXX: use generic code when basic block handling is OK or CPU
726 specific code (x86) */
727 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
729 tcg_gen_helper_1_2(tcg_helper_shl_i64
, ret
, arg1
, arg2
);
732 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
734 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 0, 0);
737 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
739 tcg_gen_helper_1_2(tcg_helper_shr_i64
, ret
, arg1
, arg2
);
742 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
744 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 0);
747 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
749 tcg_gen_helper_1_2(tcg_helper_sar_i64
, ret
, arg1
, arg2
);
752 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
754 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 1);
757 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
760 tcg_gen_op6ii(INDEX_op_brcond2_i32
,
761 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
),
765 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
769 t0
= tcg_temp_new(TCG_TYPE_I64
);
770 t1
= tcg_temp_new(TCG_TYPE_I32
);
772 tcg_gen_op4(INDEX_op_mulu2_i32
, t0
, TCGV_HIGH(t0
), arg1
, arg2
);
774 tcg_gen_mul_i32(t1
, arg1
, TCGV_HIGH(arg2
));
775 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
776 tcg_gen_mul_i32(t1
, TCGV_HIGH(arg1
), arg2
);
777 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
779 tcg_gen_mov_i64(ret
, t0
);
784 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
786 tcg_gen_helper_1_2(tcg_helper_div_i64
, ret
, arg1
, arg2
);
789 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
791 tcg_gen_helper_1_2(tcg_helper_rem_i64
, ret
, arg1
, arg2
);
794 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
796 tcg_gen_helper_1_2(tcg_helper_divu_i64
, ret
, arg1
, arg2
);
799 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
801 tcg_gen_helper_1_2(tcg_helper_remu_i64
, ret
, arg1
, arg2
);
806 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
808 if (GET_TCGV(ret
) != GET_TCGV(arg
))
809 tcg_gen_op2(INDEX_op_mov_i64
, ret
, arg
);
812 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
814 tcg_gen_op2i(INDEX_op_movi_i64
, ret
, arg
);
817 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
,
818 tcg_target_long offset
)
820 tcg_gen_op3i(INDEX_op_ld8u_i64
, ret
, arg2
, offset
);
823 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
,
824 tcg_target_long offset
)
826 tcg_gen_op3i(INDEX_op_ld8s_i64
, ret
, arg2
, offset
);
829 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
,
830 tcg_target_long offset
)
832 tcg_gen_op3i(INDEX_op_ld16u_i64
, ret
, arg2
, offset
);
835 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
,
836 tcg_target_long offset
)
838 tcg_gen_op3i(INDEX_op_ld16s_i64
, ret
, arg2
, offset
);
841 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
,
842 tcg_target_long offset
)
844 tcg_gen_op3i(INDEX_op_ld32u_i64
, ret
, arg2
, offset
);
847 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
,
848 tcg_target_long offset
)
850 tcg_gen_op3i(INDEX_op_ld32s_i64
, ret
, arg2
, offset
);
853 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
855 tcg_gen_op3i(INDEX_op_ld_i64
, ret
, arg2
, offset
);
858 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
,
859 tcg_target_long offset
)
861 tcg_gen_op3i(INDEX_op_st8_i64
, arg1
, arg2
, offset
);
864 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
,
865 tcg_target_long offset
)
867 tcg_gen_op3i(INDEX_op_st16_i64
, arg1
, arg2
, offset
);
870 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
,
871 tcg_target_long offset
)
873 tcg_gen_op3i(INDEX_op_st32_i64
, arg1
, arg2
, offset
);
876 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
878 tcg_gen_op3i(INDEX_op_st_i64
, arg1
, arg2
, offset
);
881 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
883 tcg_gen_op3(INDEX_op_add_i64
, ret
, arg1
, arg2
);
886 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
888 tcg_gen_op3(INDEX_op_sub_i64
, ret
, arg1
, arg2
);
891 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
893 tcg_gen_op3(INDEX_op_and_i64
, ret
, arg1
, arg2
);
896 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
898 TCGv t0
= tcg_const_i64(arg2
);
899 tcg_gen_and_i64(ret
, arg1
, t0
);
903 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
905 tcg_gen_op3(INDEX_op_or_i64
, ret
, arg1
, arg2
);
908 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
910 TCGv t0
= tcg_const_i64(arg2
);
911 tcg_gen_or_i64(ret
, arg1
, t0
);
915 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
917 tcg_gen_op3(INDEX_op_xor_i64
, ret
, arg1
, arg2
);
920 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
922 TCGv t0
= tcg_const_i64(arg2
);
923 tcg_gen_xor_i64(ret
, arg1
, t0
);
927 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
929 tcg_gen_op3(INDEX_op_shl_i64
, ret
, arg1
, arg2
);
932 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
935 tcg_gen_mov_i64(ret
, arg1
);
937 TCGv t0
= tcg_const_i64(arg2
);
938 tcg_gen_shl_i64(ret
, arg1
, t0
);
943 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
945 tcg_gen_op3(INDEX_op_shr_i64
, ret
, arg1
, arg2
);
948 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
951 tcg_gen_mov_i64(ret
, arg1
);
953 TCGv t0
= tcg_const_i64(arg2
);
954 tcg_gen_shr_i64(ret
, arg1
, t0
);
959 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
961 tcg_gen_op3(INDEX_op_sar_i64
, ret
, arg1
, arg2
);
964 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
967 tcg_gen_mov_i64(ret
, arg1
);
969 TCGv t0
= tcg_const_i64(arg2
);
970 tcg_gen_sar_i64(ret
, arg1
, t0
);
975 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
978 tcg_gen_op4ii(INDEX_op_brcond_i64
, arg1
, arg2
, cond
, label_index
);
981 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
983 tcg_gen_op3(INDEX_op_mul_i64
, ret
, arg1
, arg2
);
986 #ifdef TCG_TARGET_HAS_div_i64
987 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
989 tcg_gen_op3(INDEX_op_div_i64
, ret
, arg1
, arg2
);
992 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
994 tcg_gen_op3(INDEX_op_rem_i64
, ret
, arg1
, arg2
);
997 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
999 tcg_gen_op3(INDEX_op_divu_i64
, ret
, arg1
, arg2
);
1002 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1004 tcg_gen_op3(INDEX_op_remu_i64
, ret
, arg1
, arg2
);
1007 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1010 t0
= tcg_temp_new(TCG_TYPE_I64
);
1011 tcg_gen_sari_i64(t0
, arg1
, 63);
1012 tcg_gen_op5(INDEX_op_div2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1016 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1019 t0
= tcg_temp_new(TCG_TYPE_I64
);
1020 tcg_gen_sari_i64(t0
, arg1
, 63);
1021 tcg_gen_op5(INDEX_op_div2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1025 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1028 t0
= tcg_temp_new(TCG_TYPE_I64
);
1029 tcg_gen_movi_i64(t0
, 0);
1030 tcg_gen_op5(INDEX_op_divu2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1034 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1037 t0
= tcg_temp_new(TCG_TYPE_I64
);
1038 tcg_gen_movi_i64(t0
, 0);
1039 tcg_gen_op5(INDEX_op_divu2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1046 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
1048 /* some cases can be optimized here */
1050 tcg_gen_mov_i64(ret
, arg1
);
1052 TCGv t0
= tcg_const_i64(arg2
);
1053 tcg_gen_add_i64(ret
, arg1
, t0
);
1058 static inline void tcg_gen_subfi_i64(TCGv ret
, int64_t arg1
, TCGv arg2
)
1060 TCGv t0
= tcg_const_i64(arg1
);
1061 tcg_gen_sub_i64(ret
, t0
, arg2
);
1065 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
1067 /* some cases can be optimized here */
1069 tcg_gen_mov_i64(ret
, arg1
);
1071 TCGv t0
= tcg_const_i64(arg2
);
1072 tcg_gen_sub_i64(ret
, arg1
, t0
);
1076 static inline void tcg_gen_brcondi_i64(int cond
, TCGv arg1
, int64_t arg2
,
1079 TCGv t0
= tcg_const_i64(arg2
);
1080 tcg_gen_brcond_i64(cond
, arg1
, t0
, label_index
);
1084 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
1086 TCGv t0
= tcg_const_i64(arg2
);
1087 tcg_gen_mul_i64(ret
, arg1
, t0
);
1092 /***************************************/
1093 /* optional operations */
1095 static inline void tcg_gen_ext8s_i32(TCGv ret
, TCGv arg
)
1097 #ifdef TCG_TARGET_HAS_ext8s_i32
1098 tcg_gen_op2(INDEX_op_ext8s_i32
, ret
, arg
);
1100 tcg_gen_shli_i32(ret
, arg
, 24);
1101 tcg_gen_sari_i32(ret
, ret
, 24);
1105 static inline void tcg_gen_ext16s_i32(TCGv ret
, TCGv arg
)
1107 #ifdef TCG_TARGET_HAS_ext16s_i32
1108 tcg_gen_op2(INDEX_op_ext16s_i32
, ret
, arg
);
1110 tcg_gen_shli_i32(ret
, arg
, 16);
1111 tcg_gen_sari_i32(ret
, ret
, 16);
1115 /* These are currently just for convenience.
1116 We assume a target will recognise these automatically . */
1117 static inline void tcg_gen_ext8u_i32(TCGv ret
, TCGv arg
)
1119 tcg_gen_andi_i32(ret
, arg
, 0xffu
);
1122 static inline void tcg_gen_ext16u_i32(TCGv ret
, TCGv arg
)
1124 tcg_gen_andi_i32(ret
, arg
, 0xffffu
);
1127 /* Note: we assume the two high bytes are set to zero */
1128 static inline void tcg_gen_bswap16_i32(TCGv ret
, TCGv arg
)
1130 #ifdef TCG_TARGET_HAS_bswap16_i32
1131 tcg_gen_op2(INDEX_op_bswap16_i32
, ret
, arg
);
1134 t0
= tcg_temp_new(TCG_TYPE_I32
);
1135 t1
= tcg_temp_new(TCG_TYPE_I32
);
1137 tcg_gen_shri_i32(t0
, arg
, 8);
1138 tcg_gen_andi_i32(t1
, arg
, 0x000000ff);
1139 tcg_gen_shli_i32(t1
, t1
, 8);
1140 tcg_gen_or_i32(ret
, t0
, t1
);
1146 static inline void tcg_gen_bswap_i32(TCGv ret
, TCGv arg
)
1148 #ifdef TCG_TARGET_HAS_bswap_i32
1149 tcg_gen_op2(INDEX_op_bswap_i32
, ret
, arg
);
1152 t0
= tcg_temp_new(TCG_TYPE_I32
);
1153 t1
= tcg_temp_new(TCG_TYPE_I32
);
1155 tcg_gen_shli_i32(t0
, arg
, 24);
1157 tcg_gen_andi_i32(t1
, arg
, 0x0000ff00);
1158 tcg_gen_shli_i32(t1
, t1
, 8);
1159 tcg_gen_or_i32(t0
, t0
, t1
);
1161 tcg_gen_shri_i32(t1
, arg
, 8);
1162 tcg_gen_andi_i32(t1
, t1
, 0x0000ff00);
1163 tcg_gen_or_i32(t0
, t0
, t1
);
1165 tcg_gen_shri_i32(t1
, arg
, 24);
1166 tcg_gen_or_i32(ret
, t0
, t1
);
1172 #if TCG_TARGET_REG_BITS == 32
1173 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1175 tcg_gen_ext8s_i32(ret
, arg
);
1176 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1179 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1181 tcg_gen_ext16s_i32(ret
, arg
);
1182 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1185 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1187 tcg_gen_mov_i32(ret
, arg
);
1188 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1191 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1193 tcg_gen_ext8u_i32(ret
, arg
);
1194 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1197 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1199 tcg_gen_ext16u_i32(ret
, arg
);
1200 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1203 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1205 tcg_gen_mov_i32(ret
, arg
);
1206 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1209 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1211 tcg_gen_mov_i32(ret
, arg
);
1214 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1216 tcg_gen_mov_i32(ret
, arg
);
1217 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1220 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1222 tcg_gen_mov_i32(ret
, arg
);
1223 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1226 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1229 t0
= tcg_temp_new(TCG_TYPE_I32
);
1230 t1
= tcg_temp_new(TCG_TYPE_I32
);
1232 tcg_gen_bswap_i32(t0
, arg
);
1233 tcg_gen_bswap_i32(t1
, TCGV_HIGH(arg
));
1234 tcg_gen_mov_i32(ret
, t1
);
1235 tcg_gen_mov_i32(TCGV_HIGH(ret
), t0
);
1241 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1243 #ifdef TCG_TARGET_HAS_ext8s_i64
1244 tcg_gen_op2(INDEX_op_ext8s_i64
, ret
, arg
);
1246 tcg_gen_shli_i64(ret
, arg
, 56);
1247 tcg_gen_sari_i64(ret
, ret
, 56);
1251 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1253 #ifdef TCG_TARGET_HAS_ext16s_i64
1254 tcg_gen_op2(INDEX_op_ext16s_i64
, ret
, arg
);
1256 tcg_gen_shli_i64(ret
, arg
, 48);
1257 tcg_gen_sari_i64(ret
, ret
, 48);
1261 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1263 #ifdef TCG_TARGET_HAS_ext32s_i64
1264 tcg_gen_op2(INDEX_op_ext32s_i64
, ret
, arg
);
1266 tcg_gen_shli_i64(ret
, arg
, 32);
1267 tcg_gen_sari_i64(ret
, ret
, 32);
1271 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1273 tcg_gen_andi_i64(ret
, arg
, 0xffu
);
1276 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1278 tcg_gen_andi_i64(ret
, arg
, 0xffffu
);
1281 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1283 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1286 /* Note: we assume the target supports move between 32 and 64 bit
1287 registers. This will probably break MIPS64 targets. */
1288 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1290 tcg_gen_mov_i32(ret
, arg
);
1293 /* Note: we assume the target supports move between 32 and 64 bit
1295 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1297 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1300 /* Note: we assume the target supports move between 32 and 64 bit
1302 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1304 tcg_gen_ext32s_i64(ret
, arg
);
1307 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1309 #ifdef TCG_TARGET_HAS_bswap_i64
1310 tcg_gen_op2(INDEX_op_bswap_i64
, ret
, arg
);
1313 t0
= tcg_temp_new(TCG_TYPE_I32
);
1314 t1
= tcg_temp_new(TCG_TYPE_I32
);
1316 tcg_gen_shli_i64(t0
, arg
, 56);
1318 tcg_gen_andi_i64(t1
, arg
, 0x0000ff00);
1319 tcg_gen_shli_i64(t1
, t1
, 40);
1320 tcg_gen_or_i64(t0
, t0
, t1
);
1322 tcg_gen_andi_i64(t1
, arg
, 0x00ff0000);
1323 tcg_gen_shli_i64(t1
, t1
, 24);
1324 tcg_gen_or_i64(t0
, t0
, t1
);
1326 tcg_gen_andi_i64(t1
, arg
, 0xff000000);
1327 tcg_gen_shli_i64(t1
, t1
, 8);
1328 tcg_gen_or_i64(t0
, t0
, t1
);
1330 tcg_gen_shri_i64(t1
, arg
, 8);
1331 tcg_gen_andi_i64(t1
, t1
, 0xff000000);
1332 tcg_gen_or_i64(t0
, t0
, t1
);
1334 tcg_gen_shri_i64(t1
, arg
, 24);
1335 tcg_gen_andi_i64(t1
, t1
, 0x00ff0000);
1336 tcg_gen_or_i64(t0
, t0
, t1
);
1338 tcg_gen_shri_i64(t1
, arg
, 40);
1339 tcg_gen_andi_i64(t1
, t1
, 0x0000ff00);
1340 tcg_gen_or_i64(t0
, t0
, t1
);
1342 tcg_gen_shri_i64(t1
, arg
, 56);
1343 tcg_gen_or_i64(ret
, t0
, t1
);
1351 static inline void tcg_gen_neg_i32(TCGv ret
, TCGv arg
)
1353 #ifdef TCG_TARGET_HAS_neg_i32
1354 tcg_gen_op2(INDEX_op_neg_i32
, ret
, arg
);
1356 TCGv t0
= tcg_const_i32(0);
1357 tcg_gen_sub_i32(ret
, t0
, arg
);
1362 static inline void tcg_gen_neg_i64(TCGv ret
, TCGv arg
)
1364 #ifdef TCG_TARGET_HAS_neg_i64
1365 tcg_gen_op2(INDEX_op_neg_i64
, ret
, arg
);
1367 TCGv t0
= tcg_const_i64(0);
1368 tcg_gen_sub_i64(ret
, t0
, arg
);
1373 static inline void tcg_gen_not_i32(TCGv ret
, TCGv arg
)
1375 tcg_gen_xori_i32(ret
, arg
, -1);
1378 static inline void tcg_gen_not_i64(TCGv ret
, TCGv arg
)
1380 tcg_gen_xori_i64(ret
, arg
, -1);
1383 static inline void tcg_gen_discard_i32(TCGv arg
)
1385 tcg_gen_op1(INDEX_op_discard
, arg
);
1388 #if TCG_TARGET_REG_BITS == 32
1389 static inline void tcg_gen_discard_i64(TCGv arg
)
1391 tcg_gen_discard_i32(arg
);
1392 tcg_gen_discard_i32(TCGV_HIGH(arg
));
1395 static inline void tcg_gen_discard_i64(TCGv arg
)
1397 tcg_gen_op1(INDEX_op_discard
, arg
);
1401 static inline void tcg_gen_concat_i32_i64(TCGv dest
, TCGv low
, TCGv high
)
1403 #if TCG_TARGET_REG_BITS == 32
1404 tcg_gen_mov_i32(dest
, low
);
1405 tcg_gen_mov_i32(TCGV_HIGH(dest
), high
);
1407 TCGv tmp
= tcg_temp_new (TCG_TYPE_I64
);
1408 /* This extension is only needed for type correctness.
1409 We may be able to do better given target specific information. */
1410 tcg_gen_extu_i32_i64(tmp
, high
);
1411 tcg_gen_shli_i64(tmp
, tmp
, 32);
1412 tcg_gen_extu_i32_i64(dest
, low
);
1413 tcg_gen_or_i64(dest
, dest
, tmp
);
1418 static inline void tcg_gen_concat32_i64(TCGv dest
, TCGv low
, TCGv high
)
1420 #if TCG_TARGET_REG_BITS == 32
1421 tcg_gen_concat_i32_i64(dest
, low
, high
);
1423 TCGv tmp
= tcg_temp_new(TCG_TYPE_I64
);
1424 tcg_gen_ext32u_i64(dest
, low
);
1425 tcg_gen_shli_i64(tmp
, high
, 32);
1426 tcg_gen_or_i64(dest
, dest
, tmp
);
1431 static inline void tcg_gen_andc_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1434 t0
= tcg_temp_new(TCG_TYPE_I32
);
1435 tcg_gen_not_i32(t0
, arg2
);
1436 tcg_gen_and_i32(ret
, arg1
, t0
);
1440 static inline void tcg_gen_andc_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1443 t0
= tcg_temp_new(TCG_TYPE_I64
);
1444 tcg_gen_not_i64(t0
, arg2
);
1445 tcg_gen_and_i64(ret
, arg1
, t0
);
1449 static inline void tcg_gen_eqv_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1452 t0
= tcg_temp_new(TCG_TYPE_I32
);
1453 tcg_gen_xor_i32(t0
, arg1
, arg2
);
1454 tcg_gen_not_i32(ret
, t0
);
1458 static inline void tcg_gen_eqv_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1461 t0
= tcg_temp_new(TCG_TYPE_I64
);
1462 tcg_gen_xor_i64(t0
, arg1
, arg2
);
1463 tcg_gen_not_i64(ret
, t0
);
1467 static inline void tcg_gen_nand_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1470 t0
= tcg_temp_new(TCG_TYPE_I32
);
1471 tcg_gen_and_i32(t0
, arg1
, arg2
);
1472 tcg_gen_not_i32(ret
, t0
);
1476 static inline void tcg_gen_nand_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1479 t0
= tcg_temp_new(TCG_TYPE_I64
);
1480 tcg_gen_and_i64(t0
, arg1
, arg2
);
1481 tcg_gen_not_i64(ret
, t0
);
1485 static inline void tcg_gen_nor_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1488 t0
= tcg_temp_new(TCG_TYPE_I32
);
1489 tcg_gen_or_i32(t0
, arg1
, arg2
);
1490 tcg_gen_not_i32(ret
, t0
);
1494 static inline void tcg_gen_nor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1497 t0
= tcg_temp_new(TCG_TYPE_I64
);
1498 tcg_gen_or_i64(t0
, arg1
, arg2
);
1499 tcg_gen_not_i64(ret
, t0
);
1503 static inline void tcg_gen_orc_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1506 t0
= tcg_temp_new(TCG_TYPE_I32
);
1507 tcg_gen_not_i32(t0
, arg2
);
1508 tcg_gen_or_i32(ret
, arg1
, t0
);
1512 static inline void tcg_gen_orc_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1515 t0
= tcg_temp_new(TCG_TYPE_I64
);
1516 tcg_gen_not_i64(t0
, arg2
);
1517 tcg_gen_or_i64(ret
, arg1
, t0
);
1521 static inline void tcg_gen_rotl_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1525 t0
= tcg_temp_new(TCG_TYPE_I32
);
1526 t1
= tcg_temp_new(TCG_TYPE_I32
);
1527 tcg_gen_shl_i32(t0
, arg1
, arg2
);
1528 tcg_gen_subfi_i32(t1
, 32, arg2
);
1529 tcg_gen_shr_i32(t1
, arg1
, t1
);
1530 tcg_gen_or_i32(ret
, t0
, t1
);
1535 static inline void tcg_gen_rotl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1539 t0
= tcg_temp_new(TCG_TYPE_I64
);
1540 t1
= tcg_temp_new(TCG_TYPE_I64
);
1541 tcg_gen_shl_i64(t0
, arg1
, arg2
);
1542 tcg_gen_subfi_i64(t1
, 64, arg2
);
1543 tcg_gen_shr_i64(t1
, arg1
, t1
);
1544 tcg_gen_or_i64(ret
, t0
, t1
);
1549 static inline void tcg_gen_rotli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
1551 /* some cases can be optimized here */
1553 tcg_gen_mov_i32(ret
, arg1
);
1556 t0
= tcg_temp_new(TCG_TYPE_I32
);
1557 t1
= tcg_temp_new(TCG_TYPE_I32
);
1558 tcg_gen_shli_i32(t0
, arg1
, arg2
);
1559 tcg_gen_shri_i32(t1
, arg1
, 32 - arg2
);
1560 tcg_gen_or_i32(ret
, t0
, t1
);
1566 static inline void tcg_gen_rotli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
1568 /* some cases can be optimized here */
1570 tcg_gen_mov_i64(ret
, arg1
);
1573 t0
= tcg_temp_new(TCG_TYPE_I64
);
1574 t1
= tcg_temp_new(TCG_TYPE_I64
);
1575 tcg_gen_shli_i64(t0
, arg1
, arg2
);
1576 tcg_gen_shri_i64(t1
, arg1
, 64 - arg2
);
1577 tcg_gen_or_i64(ret
, t0
, t1
);
1583 static inline void tcg_gen_rotr_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
1587 t0
= tcg_temp_new(TCG_TYPE_I32
);
1588 t1
= tcg_temp_new(TCG_TYPE_I32
);
1589 tcg_gen_shr_i32(t0
, arg1
, arg2
);
1590 tcg_gen_subfi_i32(t1
, 32, arg2
);
1591 tcg_gen_shl_i32(t1
, arg1
, t1
);
1592 tcg_gen_or_i32(ret
, t0
, t1
);
1597 static inline void tcg_gen_rotr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1601 t0
= tcg_temp_new(TCG_TYPE_I64
);
1602 t1
= tcg_temp_new(TCG_TYPE_I64
);
1603 tcg_gen_shl_i64(t0
, arg1
, arg2
);
1604 tcg_gen_subfi_i64(t1
, 64, arg2
);
1605 tcg_gen_shl_i64(t1
, arg1
, t1
);
1606 tcg_gen_or_i64(ret
, t0
, t1
);
1611 static inline void tcg_gen_rotri_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
1613 /* some cases can be optimized here */
1615 tcg_gen_mov_i32(ret
, arg1
);
1617 tcg_gen_rotli_i32(ret
, arg1
, 32 - arg2
);
1621 static inline void tcg_gen_rotri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
1623 /* some cases can be optimized here */
1625 tcg_gen_mov_i64(ret
, arg1
);
1627 tcg_gen_rotli_i64(ret
, arg1
, 64 - arg2
);
1631 /***************************************/
1632 /* QEMU specific operations. Their type depend on the QEMU CPU
1634 #ifndef TARGET_LONG_BITS
1635 #error must include QEMU headers
1638 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1639 static inline void tcg_gen_debug_insn_start(uint64_t pc
)
1641 /* XXX: must really use a 32 bit size for TCGArg in all cases */
1642 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1643 tcg_gen_op2ii(INDEX_op_debug_insn_start
,
1644 (uint32_t)(pc
), (uint32_t)(pc
>> 32));
1646 tcg_gen_op1i(INDEX_op_debug_insn_start
, pc
);
1650 static inline void tcg_gen_exit_tb(tcg_target_long val
)
1652 tcg_gen_op1i(INDEX_op_exit_tb
, val
);
1655 static inline void tcg_gen_goto_tb(int idx
)
1657 tcg_gen_op1i(INDEX_op_goto_tb
, idx
);
1660 #if TCG_TARGET_REG_BITS == 32
1661 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1663 #if TARGET_LONG_BITS == 32
1664 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1666 tcg_gen_op4i(INDEX_op_qemu_ld8u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1667 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1671 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1673 #if TARGET_LONG_BITS == 32
1674 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1676 tcg_gen_op4i(INDEX_op_qemu_ld8s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1677 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1681 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1683 #if TARGET_LONG_BITS == 32
1684 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1686 tcg_gen_op4i(INDEX_op_qemu_ld16u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1687 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1691 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1693 #if TARGET_LONG_BITS == 32
1694 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1696 tcg_gen_op4i(INDEX_op_qemu_ld16s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1697 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1701 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1703 #if TARGET_LONG_BITS == 32
1704 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1706 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1707 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1711 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1713 #if TARGET_LONG_BITS == 32
1714 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1716 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1717 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1721 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1723 #if TARGET_LONG_BITS == 32
1724 tcg_gen_op4i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
), addr
, mem_index
);
1726 tcg_gen_op5i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
),
1727 addr
, TCGV_HIGH(addr
), mem_index
);
1731 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1733 #if TARGET_LONG_BITS == 32
1734 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1736 tcg_gen_op4i(INDEX_op_qemu_st8
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1740 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1742 #if TARGET_LONG_BITS == 32
1743 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1745 tcg_gen_op4i(INDEX_op_qemu_st16
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1749 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1751 #if TARGET_LONG_BITS == 32
1752 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1754 tcg_gen_op4i(INDEX_op_qemu_st32
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1758 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1760 #if TARGET_LONG_BITS == 32
1761 tcg_gen_op4i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
), addr
, mem_index
);
1763 tcg_gen_op5i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
),
1764 addr
, TCGV_HIGH(addr
), mem_index
);
1768 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1769 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1771 #else /* TCG_TARGET_REG_BITS == 32 */
1773 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1775 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1778 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1780 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1783 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1785 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1788 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1790 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1793 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1795 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1798 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1800 tcg_gen_op3i(INDEX_op_qemu_ld32s
, ret
, addr
, mem_index
);
1803 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1805 tcg_gen_op3i(INDEX_op_qemu_ld64
, ret
, addr
, mem_index
);
1808 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1810 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1813 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1815 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1818 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1820 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1823 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1825 tcg_gen_op3i(INDEX_op_qemu_st64
, arg
, addr
, mem_index
);
1828 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1829 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1831 #endif /* TCG_TARGET_REG_BITS != 32 */
1833 #if TARGET_LONG_BITS == 64
1834 #define TCG_TYPE_TL TCG_TYPE_I64
1835 #define tcg_gen_movi_tl tcg_gen_movi_i64
1836 #define tcg_gen_mov_tl tcg_gen_mov_i64
1837 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1838 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1839 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1840 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1841 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1842 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1843 #define tcg_gen_ld_tl tcg_gen_ld_i64
1844 #define tcg_gen_st8_tl tcg_gen_st8_i64
1845 #define tcg_gen_st16_tl tcg_gen_st16_i64
1846 #define tcg_gen_st32_tl tcg_gen_st32_i64
1847 #define tcg_gen_st_tl tcg_gen_st_i64
1848 #define tcg_gen_add_tl tcg_gen_add_i64
1849 #define tcg_gen_addi_tl tcg_gen_addi_i64
1850 #define tcg_gen_sub_tl tcg_gen_sub_i64
1851 #define tcg_gen_neg_tl tcg_gen_neg_i64
1852 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
1853 #define tcg_gen_subi_tl tcg_gen_subi_i64
1854 #define tcg_gen_and_tl tcg_gen_and_i64
1855 #define tcg_gen_andi_tl tcg_gen_andi_i64
1856 #define tcg_gen_or_tl tcg_gen_or_i64
1857 #define tcg_gen_ori_tl tcg_gen_ori_i64
1858 #define tcg_gen_xor_tl tcg_gen_xor_i64
1859 #define tcg_gen_xori_tl tcg_gen_xori_i64
1860 #define tcg_gen_not_tl tcg_gen_not_i64
1861 #define tcg_gen_shl_tl tcg_gen_shl_i64
1862 #define tcg_gen_shli_tl tcg_gen_shli_i64
1863 #define tcg_gen_shr_tl tcg_gen_shr_i64
1864 #define tcg_gen_shri_tl tcg_gen_shri_i64
1865 #define tcg_gen_sar_tl tcg_gen_sar_i64
1866 #define tcg_gen_sari_tl tcg_gen_sari_i64
1867 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1868 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1869 #define tcg_gen_mul_tl tcg_gen_mul_i64
1870 #define tcg_gen_muli_tl tcg_gen_muli_i64
1871 #define tcg_gen_discard_tl tcg_gen_discard_i64
1872 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1873 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1874 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1875 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1876 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1877 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1878 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1879 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1880 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1881 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1882 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1883 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1884 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1885 #define tcg_gen_andc_tl tcg_gen_andc_i64
1886 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
1887 #define tcg_gen_nand_tl tcg_gen_nand_i64
1888 #define tcg_gen_nor_tl tcg_gen_nor_i64
1889 #define tcg_gen_orc_tl tcg_gen_orc_i64
1890 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
1891 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
1892 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
1893 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
1894 #define tcg_const_tl tcg_const_i64
1895 #define tcg_const_local_tl tcg_const_local_i64
1897 #define TCG_TYPE_TL TCG_TYPE_I32
1898 #define tcg_gen_movi_tl tcg_gen_movi_i32
1899 #define tcg_gen_mov_tl tcg_gen_mov_i32
1900 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1901 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1902 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1903 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1904 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1905 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1906 #define tcg_gen_ld_tl tcg_gen_ld_i32
1907 #define tcg_gen_st8_tl tcg_gen_st8_i32
1908 #define tcg_gen_st16_tl tcg_gen_st16_i32
1909 #define tcg_gen_st32_tl tcg_gen_st_i32
1910 #define tcg_gen_st_tl tcg_gen_st_i32
1911 #define tcg_gen_add_tl tcg_gen_add_i32
1912 #define tcg_gen_addi_tl tcg_gen_addi_i32
1913 #define tcg_gen_sub_tl tcg_gen_sub_i32
1914 #define tcg_gen_neg_tl tcg_gen_neg_i32
1915 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
1916 #define tcg_gen_subi_tl tcg_gen_subi_i32
1917 #define tcg_gen_and_tl tcg_gen_and_i32
1918 #define tcg_gen_andi_tl tcg_gen_andi_i32
1919 #define tcg_gen_or_tl tcg_gen_or_i32
1920 #define tcg_gen_ori_tl tcg_gen_ori_i32
1921 #define tcg_gen_xor_tl tcg_gen_xor_i32
1922 #define tcg_gen_xori_tl tcg_gen_xori_i32
1923 #define tcg_gen_not_tl tcg_gen_not_i32
1924 #define tcg_gen_shl_tl tcg_gen_shl_i32
1925 #define tcg_gen_shli_tl tcg_gen_shli_i32
1926 #define tcg_gen_shr_tl tcg_gen_shr_i32
1927 #define tcg_gen_shri_tl tcg_gen_shri_i32
1928 #define tcg_gen_sar_tl tcg_gen_sar_i32
1929 #define tcg_gen_sari_tl tcg_gen_sari_i32
1930 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1931 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1932 #define tcg_gen_mul_tl tcg_gen_mul_i32
1933 #define tcg_gen_muli_tl tcg_gen_muli_i32
1934 #define tcg_gen_discard_tl tcg_gen_discard_i32
1935 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1936 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
1937 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1938 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1939 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1940 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1941 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1942 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1943 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1944 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1945 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1946 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1947 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1948 #define tcg_gen_andc_tl tcg_gen_andc_i32
1949 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1950 #define tcg_gen_nand_tl tcg_gen_nand_i32
1951 #define tcg_gen_nor_tl tcg_gen_nor_i32
1952 #define tcg_gen_orc_tl tcg_gen_orc_i32
1953 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
1954 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
1955 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
1956 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
1957 #define tcg_const_tl tcg_const_i32
1958 #define tcg_const_local_tl tcg_const_local_i32
1961 #if TCG_TARGET_REG_BITS == 32
1962 #define tcg_gen_add_ptr tcg_gen_add_i32
1963 #define tcg_gen_addi_ptr tcg_gen_addi_i32
1964 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
1965 #else /* TCG_TARGET_REG_BITS == 32 */
1966 #define tcg_gen_add_ptr tcg_gen_add_i64
1967 #define tcg_gen_addi_ptr tcg_gen_addi_i64
1968 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
1969 #endif /* TCG_TARGET_REG_BITS != 32 */