hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "vl.h"
  25
  26 /* output Bochs bios info messages */
  27 //#define DEBUG_BIOS
  28
  29 #define BIOS_FILENAME "bios.bin"
  30 #define VGABIOS_FILENAME "vgabios.bin"
  31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
  33
  34 #define KERNEL_LOAD_ADDR     0x00100000
  35 #define INITRD_LOAD_ADDR     0x00600000
  36 #define KERNEL_PARAMS_ADDR   0x00090000
  37 #define KERNEL_CMDLINE_ADDR  0x00099000
  38
  39 static fdctrl_t *floppy_controller;
  40 static RTCState *rtc_state;
  41 static PITState *pit;
  42 static IOAPICState *ioapic;
  43 static USBPort *usb_root_ports[2];
  44
  45 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  46 {
  47 }
  48
  49 /* MSDOS compatibility mode FPU exception support */
  50 /* XXX: add IGNNE support */
  51 void cpu_set_ferr(CPUX86State *s)
  52 {
  53     pic_set_irq(13, 1);
  54 }
  55
  56 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  57 {
  58     pic_set_irq(13, 0);
  59 }
  60
  61 /* TSC handling */
  62
  63 uint64_t cpu_get_tsc(CPUX86State *env)
  64 {
  65     return qemu_get_clock(vm_clock);
  66 }
  67
  68 /* IRQ handling */
  69 int cpu_get_pic_interrupt(CPUState *env)
  70 {
  71     int intno;
  72
  73     intno = apic_get_interrupt(env);
  74     if (intno >= 0) {
  75         /* set irq request if a PIC irq is still pending */
  76         /* XXX: improve that */
  77         pic_update_irq(isa_pic);
  78         return intno;
  79     }
  80     /* read the irq from the PIC */
  81     intno = pic_read_irq(isa_pic);
  82     return intno;
  83 }
  84
  85 static void pic_irq_request(void *opaque, int level)
  86 {
  87     CPUState *env = opaque;
  88     if (level)
  89         cpu_interrupt(env, CPU_INTERRUPT_HARD);
  90     else
  91         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
  92 }
  93
  94 /* PC cmos mappings */
  95
  96 #define REG_EQUIPMENT_BYTE          0x14
  97 #define REG_IBM_CENTURY_BYTE        0x32
  98 #define REG_IBM_PS2_CENTURY_BYTE    0x37
  99
 100
 101 static inline int to_bcd(RTCState *s, int a)
 102 {
 103     return ((a / 10) << 4) | (a % 10);
 104 }
 105
 106 static int cmos_get_fd_drive_type(int fd0)
 107 {
 108     int val;
 109
 110     switch (fd0) {
 111     case 0:
 112         /* 1.44 Mb 3"5 drive */
 113         val = 4;
 114         break;
 115     case 1:
 116         /* 2.88 Mb 3"5 drive */
 117         val = 5;
 118         break;
 119     case 2:
 120         /* 1.2 Mb 5"5 drive */
 121         val = 2;
 122         break;
 123     default:
 124         val = 0;
 125         break;
 126     }
 127     return val;
 128 }
 129
 130 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 131 {
 132     RTCState *s = rtc_state;
 133     int cylinders, heads, sectors;
 134     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 135     rtc_set_memory(s, type_ofs, 47);
 136     rtc_set_memory(s, info_ofs, cylinders);
 137     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 138     rtc_set_memory(s, info_ofs + 2, heads);
 139     rtc_set_memory(s, info_ofs + 3, 0xff);
 140     rtc_set_memory(s, info_ofs + 4, 0xff);
 141     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 142     rtc_set_memory(s, info_ofs + 6, cylinders);
 143     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 144     rtc_set_memory(s, info_ofs + 8, sectors);
 145 }
 146
 147 /* hd_table must contain 4 block drivers */
 148 static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
 149 {
 150     RTCState *s = rtc_state;
 151     int val;
 152     int fd0, fd1, nb;
 153     time_t ti;
 154     struct tm *tm;
 155     int i;
 156
 157     /* set the CMOS date */
 158     time(&ti);
 159     if (rtc_utc)
 160         tm = gmtime(&ti);
 161     else
 162         tm = localtime(&ti);
 163     rtc_set_date(s, tm);
 164
 165     val = to_bcd(s, (tm->tm_year / 100) + 19);
 166     rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
 167     rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
 168
 169     /* various important CMOS locations needed by PC/Bochs bios */
 170
 171     /* memory size */
 172     val = 640; /* base memory in K */
 173     rtc_set_memory(s, 0x15, val);
 174     rtc_set_memory(s, 0x16, val >> 8);
 175
 176     val = (ram_size / 1024) - 1024;
 177     if (val > 65535)
 178         val = 65535;
 179     rtc_set_memory(s, 0x17, val);
 180     rtc_set_memory(s, 0x18, val >> 8);
 181     rtc_set_memory(s, 0x30, val);
 182     rtc_set_memory(s, 0x31, val >> 8);
 183
 184     if (ram_size > (16 * 1024 * 1024))
 185         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 186     else
 187         val = 0;
 188     if (val > 65535)
 189         val = 65535;
 190     rtc_set_memory(s, 0x34, val);
 191     rtc_set_memory(s, 0x35, val >> 8);
 192
 193     switch(boot_device) {
 194     case 'a':
 195     case 'b':
 196         rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
 197         break;
 198     default:
 199     case 'c':
 200         rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
 201         break;
 202     case 'd':
 203         rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
 204         break;
 205     }
 206
 207     /* floppy type */
 208
 209     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 210     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 211
 212     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 213     rtc_set_memory(s, 0x10, val);
 214
 215     val = 0;
 216     nb = 0;
 217     if (fd0 < 3)
 218         nb++;
 219     if (fd1 < 3)
 220         nb++;
 221     switch (nb) {
 222     case 0:
 223         break;
 224     case 1:
 225         val |= 0x01; /* 1 drive, ready for boot */
 226         break;
 227     case 2:
 228         val |= 0x41; /* 2 drives, ready for boot */
 229         break;
 230     }
 231     val |= 0x02; /* FPU is there */
 232     val |= 0x04; /* PS/2 mouse installed */
 233     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 234
 235     /* hard drives */
 236
 237     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 238     if (hd_table[0])
 239         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 240     if (hd_table[1])
 241         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 242
 243     val = 0;
 244     for (i = 0; i < 4; i++) {
 245         if (hd_table[i]) {
 246             int cylinders, heads, sectors, translation;
 247             /* NOTE: bdrv_get_geometry_hint() returns the physical
 248                 geometry.  It is always such that: 1 <= sects <= 63, 1
 249                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 250                 geometry can be different if a translation is done. */
 251             translation = bdrv_get_translation_hint(hd_table[i]);
 252             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 253                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 254                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 255                     /* No translation. */
 256                     translation = 0;
 257                 } else {
 258                     /* LBA translation. */
 259                     translation = 1;
 260                 }
 261             } else {
 262                 translation--;
 263             }
 264             val |= translation << (i * 2);
 265         }
 266     }
 267     rtc_set_memory(s, 0x39, val);
 268
 269     /* Disable check of 0x55AA signature on the last two bytes of
 270        first sector of disk. XXX: make it the default ? */
 271     //    rtc_set_memory(s, 0x38, 1);
 272 }
 273
 274 void ioport_set_a20(int enable)
 275 {
 276     /* XXX: send to all CPUs ? */
 277     cpu_x86_set_a20(first_cpu, enable);
 278 }
 279
 280 int ioport_get_a20(void)
 281 {
 282     return ((first_cpu->a20_mask >> 20) & 1);
 283 }
 284
 285 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 286 {
 287     ioport_set_a20((val >> 1) & 1);
 288     /* XXX: bit 0 is fast reset */
 289 }
 290
 291 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 292 {
 293     return ioport_get_a20() << 1;
 294 }
 295
 296 /***********************************************************/
 297 /* Bochs BIOS debug ports */
 298
 299 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 300 {
 301     static const char shutdown_str[8] = "Shutdown";
 302     static int shutdown_index = 0;
 303
 304     switch(addr) {
 305         /* Bochs BIOS messages */
 306     case 0x400:
 307     case 0x401:
 308         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 309         exit(1);
 310     case 0x402:
 311     case 0x403:
 312 #ifdef DEBUG_BIOS
 313         fprintf(stderr, "%c", val);
 314 #endif
 315         break;
 316     case 0x8900:
 317         /* same as Bochs power off */
 318         if (val == shutdown_str[shutdown_index]) {
 319             shutdown_index++;
 320             if (shutdown_index == 8) {
 321                 shutdown_index = 0;
 322                 qemu_system_shutdown_request();
 323             }
 324         } else {
 325             shutdown_index = 0;
 326         }
 327         break;
 328
 329         /* LGPL'ed VGA BIOS messages */
 330     case 0x501:
 331     case 0x502:
 332         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 333         exit(1);
 334     case 0x500:
 335     case 0x503:
 336 #ifdef DEBUG_BIOS
 337         fprintf(stderr, "%c", val);
 338 #endif
 339         break;
 340     }
 341 }
 342
 343 void bochs_bios_init(void)
 344 {
 345     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 346     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 347     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 348     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 349     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 350
 351     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 352     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 353     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 354     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 355 }
 356
 357
 358 int load_kernel(const char *filename, uint8_t *addr,
 359                 uint8_t *real_addr)
 360 {
 361     int fd, size;
 362     int setup_sects;
 363
 364     fd = open(filename, O_RDONLY | O_BINARY);
 365     if (fd < 0)
 366         return -1;
 367
 368     /* load 16 bit code */
 369     if (read(fd, real_addr, 512) != 512)
 370         goto fail;
 371     setup_sects = real_addr[0x1F1];
 372     if (!setup_sects)
 373         setup_sects = 4;
 374     if (read(fd, real_addr + 512, setup_sects * 512) !=
 375         setup_sects * 512)
 376         goto fail;
 377
 378     /* load 32 bit code */
 379     size = read(fd, addr, 16 * 1024 * 1024);
 380     if (size < 0)
 381         goto fail;
 382     close(fd);
 383     return size;
 384  fail:
 385     close(fd);
 386     return -1;
 387 }
 388
 389 static void main_cpu_reset(void *opaque)
 390 {
 391     CPUState *env = opaque;
 392     cpu_reset(env);
 393 }
 394
 395 /*************************************************/
 396
 397 static void putb(uint8_t **pp, int val)
 398 {
 399     uint8_t *q;
 400     q = *pp;
 401     *q++ = val;
 402     *pp = q;
 403 }
 404
 405 static void putstr(uint8_t **pp, const char *str)
 406 {
 407     uint8_t *q;
 408     q = *pp;
 409     while (*str)
 410         *q++ = *str++;
 411     *pp = q;
 412 }
 413
 414 static void putle16(uint8_t **pp, int val)
 415 {
 416     uint8_t *q;
 417     q = *pp;
 418     *q++ = val;
 419     *q++ = val >> 8;
 420     *pp = q;
 421 }
 422
 423 static void putle32(uint8_t **pp, int val)
 424 {
 425     uint8_t *q;
 426     q = *pp;
 427     *q++ = val;
 428     *q++ = val >> 8;
 429     *q++ = val >> 16;
 430     *q++ = val >> 24;
 431     *pp = q;
 432 }
 433
 434 static int mpf_checksum(const uint8_t *data, int len)
 435 {
 436     int sum, i;
 437     sum = 0;
 438     for(i = 0; i < len; i++)
 439         sum += data[i];
 440     return sum & 0xff;
 441 }
 442
 443 /* Build the Multi Processor table in the BIOS. Same values as Bochs. */
 444 static void bios_add_mptable(uint8_t *bios_data)
 445 {
 446     uint8_t *mp_config_table, *q, *float_pointer_struct;
 447     int ioapic_id, offset, i, len;
 448
 449     if (smp_cpus <= 1)
 450         return;
 451
 452     mp_config_table = bios_data + 0xb000;
 453     q = mp_config_table;
 454     putstr(&q, "PCMP"); /* "PCMP signature */
 455     putle16(&q, 0); /* table length (patched later) */
 456     putb(&q, 4); /* spec rev */
 457     putb(&q, 0); /* checksum (patched later) */
 458     putstr(&q, "QEMUCPU "); /* OEM id */
 459     putstr(&q, "0.1         "); /* vendor id */
 460     putle32(&q, 0); /* OEM table ptr */
 461     putle16(&q, 0); /* OEM table size */
 462     putle16(&q, 20); /* entry count */
 463     putle32(&q, 0xfee00000); /* local APIC addr */
 464     putle16(&q, 0); /* ext table length */
 465     putb(&q, 0); /* ext table checksum */
 466     putb(&q, 0); /* reserved */
 467
 468     for(i = 0; i < smp_cpus; i++) {
 469         putb(&q, 0); /* entry type = processor */
 470         putb(&q, i); /* APIC id */
 471         putb(&q, 0x11); /* local APIC version number */
 472         if (i == 0)
 473             putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
 474         else
 475             putb(&q, 1); /* cpu flags: enabled */
 476         putb(&q, 0); /* cpu signature */
 477         putb(&q, 6);
 478         putb(&q, 0);
 479         putb(&q, 0);
 480         putle16(&q, 0x201); /* feature flags */
 481         putle16(&q, 0);
 482
 483         putle16(&q, 0); /* reserved */
 484         putle16(&q, 0);
 485         putle16(&q, 0);
 486         putle16(&q, 0);
 487     }
 488
 489     /* isa bus */
 490     putb(&q, 1); /* entry type = bus */
 491     putb(&q, 0); /* bus ID */
 492     putstr(&q, "ISA   ");
 493
 494     /* ioapic */
 495     ioapic_id = smp_cpus;
 496     putb(&q, 2); /* entry type = I/O APIC */
 497     putb(&q, ioapic_id); /* apic ID */
 498     putb(&q, 0x11); /* I/O APIC version number */
 499     putb(&q, 1); /* enable */
 500     putle32(&q, 0xfec00000); /* I/O APIC addr */
 501
 502     /* irqs */
 503     for(i = 0; i < 16; i++) {
 504         putb(&q, 3); /* entry type = I/O interrupt */
 505         putb(&q, 0); /* interrupt type = vectored interrupt */
 506         putb(&q, 0); /* flags: po=0, el=0 */
 507         putb(&q, 0);
 508         putb(&q, 0); /* source bus ID = ISA */
 509         putb(&q, i); /* source bus IRQ */
 510         putb(&q, ioapic_id); /* dest I/O APIC ID */
 511         putb(&q, i); /* dest I/O APIC interrupt in */
 512     }
 513     /* patch length */
 514     len = q - mp_config_table;
 515     mp_config_table[4] = len;
 516     mp_config_table[5] = len >> 8;
 517
 518     mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
 519
 520     /* align to 16 */
 521     offset = q - bios_data;
 522     offset = (offset + 15) & ~15;
 523     float_pointer_struct = bios_data + offset;
 524
 525     /* floating pointer structure */
 526     q = float_pointer_struct;
 527     putstr(&q, "_MP_");
 528     /* pointer to MP config table */
 529     putle32(&q, mp_config_table - bios_data + 0x000f0000);
 530
 531     putb(&q, 1); /* length in 16 byte units */
 532     putb(&q, 4); /* MP spec revision */
 533     putb(&q, 0); /* checksum (patched later) */
 534     putb(&q, 0); /* MP feature byte 1 */
 535
 536     putb(&q, 0);
 537     putb(&q, 0);
 538     putb(&q, 0);
 539     putb(&q, 0);
 540     float_pointer_struct[10] =
 541         -mpf_checksum(float_pointer_struct, q - float_pointer_struct);
 542 }
 543
 544
 545 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 546 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 547 static const int ide_irq[2] = { 14, 15 };
 548
 549 #define NE2000_NB_MAX 6
 550
 551 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 552 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 553
 554 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 555 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 556
 557 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 558 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 559
 560 #ifdef HAS_AUDIO
 561 static void audio_init (PCIBus *pci_bus)
 562 {
 563     struct soundhw *c;
 564     int audio_enabled = 0;
 565
 566     for (c = soundhw; !audio_enabled && c->name; ++c) {
 567         audio_enabled = c->enabled;
 568     }
 569
 570     if (audio_enabled) {
 571         AudioState *s;
 572
 573         s = AUD_init ();
 574         if (s) {
 575             for (c = soundhw; c->name; ++c) {
 576                 if (c->enabled) {
 577                     if (c->isa) {
 578                         c->init.init_isa (s);
 579                     }
 580                     else {
 581                         if (pci_bus) {
 582                             c->init.init_pci (pci_bus, s);
 583                         }
 584                     }
 585                 }
 586             }
 587         }
 588     }
 589 }
 590 #endif
 591
 592 static void pc_init_ne2k_isa(NICInfo *nd)
 593 {
 594     static int nb_ne2k = 0;
 595
 596     if (nb_ne2k == NE2000_NB_MAX)
 597         return;
 598     isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
 599     nb_ne2k++;
 600 }
 601
 602 /* PC hardware initialisation */
 603 static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
 604                      DisplayState *ds, const char **fd_filename, int snapshot,
 605                      const char *kernel_filename, const char *kernel_cmdline,
 606                      const char *initrd_filename,
 607                      int pci_enabled)
 608 {
 609     char buf[1024];
 610     int ret, linux_boot, initrd_size, i;
 611     unsigned long bios_offset, vga_bios_offset;
 612     int bios_size, isa_bios_size;
 613     PCIBus *pci_bus;
 614     int piix3_devfn;
 615     CPUState *env;
 616     NICInfo *nd;
 617
 618     linux_boot = (kernel_filename != NULL);
 619
 620     /* init CPUs */
 621     for(i = 0; i < smp_cpus; i++) {
 622         env = cpu_init();
 623         if (i != 0)
 624             env->hflags |= HF_HALTED_MASK;
 625         if (smp_cpus > 1) {
 626             /* XXX: enable it in all cases */
 627             env->cpuid_features |= CPUID_APIC;
 628         }
 629         register_savevm("cpu", i, 3, cpu_save, cpu_load, env);
 630         qemu_register_reset(main_cpu_reset, env);
 631         if (pci_enabled) {
 632             apic_init(env);
 633         }
 634     }
 635
 636     /* allocate RAM */
 637     cpu_register_physical_memory(0, ram_size, 0);
 638
 639     /* BIOS load */
 640     bios_offset = ram_size + vga_ram_size;
 641     vga_bios_offset = bios_offset + 256 * 1024;
 642
 643     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 644     bios_size = get_image_size(buf);
 645     if (bios_size <= 0 ||
 646         (bios_size % 65536) != 0 ||
 647         bios_size > (256 * 1024)) {
 648         goto bios_error;
 649     }
 650     ret = load_image(buf, phys_ram_base + bios_offset);
 651     if (ret != bios_size) {
 652     bios_error:
 653         fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
 654         exit(1);
 655     }
 656     if (bios_size == 65536) {
 657         bios_add_mptable(phys_ram_base + bios_offset);
 658     }
 659
 660     /* VGA BIOS load */
 661     if (cirrus_vga_enabled) {
 662         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 663     } else {
 664         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 665     }
 666     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 667
 668     /* setup basic memory access */
 669     cpu_register_physical_memory(0xc0000, 0x10000,
 670                                  vga_bios_offset | IO_MEM_ROM);
 671
 672     /* map the last 128KB of the BIOS in ISA space */
 673     isa_bios_size = bios_size;
 674     if (isa_bios_size > (128 * 1024))
 675         isa_bios_size = 128 * 1024;
 676     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 677                                  IO_MEM_UNASSIGNED);
 678     cpu_register_physical_memory(0x100000 - isa_bios_size,
 679                                  isa_bios_size,
 680                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 681     /* map all the bios at the top of memory */
 682     cpu_register_physical_memory((uint32_t)(-bios_size),
 683                                  bios_size, bios_offset | IO_MEM_ROM);
 684
 685     bochs_bios_init();
 686
 687     if (linux_boot) {
 688         uint8_t bootsect[512];
 689         uint8_t old_bootsect[512];
 690
 691         if (bs_table[0] == NULL) {
 692             fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
 693             exit(1);
 694         }
 695         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
 696         ret = load_image(buf, bootsect);
 697         if (ret != sizeof(bootsect)) {
 698             fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
 699                     buf);
 700             exit(1);
 701         }
 702
 703         if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
 704             /* copy the MSDOS partition table */
 705             memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
 706         }
 707
 708         bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
 709
 710         /* now we can load the kernel */
 711         ret = load_kernel(kernel_filename,
 712                           phys_ram_base + KERNEL_LOAD_ADDR,
 713                           phys_ram_base + KERNEL_PARAMS_ADDR);
 714         if (ret < 0) {
 715             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 716                     kernel_filename);
 717             exit(1);
 718         }
 719
 720         /* load initrd */
 721         initrd_size = 0;
 722         if (initrd_filename) {
 723             initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
 724             if (initrd_size < 0) {
 725                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 726                         initrd_filename);
 727                 exit(1);
 728             }
 729         }
 730         if (initrd_size > 0) {
 731             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
 732             stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
 733         }
 734         pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
 735                 kernel_cmdline);
 736         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
 737         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
 738                 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
 739         /* loader type */
 740         stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
 741     }
 742
 743     if (pci_enabled) {
 744         pci_bus = i440fx_init();
 745         piix3_devfn = piix3_init(pci_bus);
 746     } else {
 747         pci_bus = NULL;
 748     }
 749
 750     /* init basic PC hardware */
 751     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 752
 753     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 754
 755     if (cirrus_vga_enabled) {
 756         if (pci_enabled) {
 757             pci_cirrus_vga_init(pci_bus,
 758                                 ds, phys_ram_base + ram_size, ram_size,
 759                                 vga_ram_size);
 760         } else {
 761             isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
 762                                 vga_ram_size);
 763         }
 764     } else {
 765         vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
 766                        vga_ram_size, 0, 0);
 767     }
 768
 769     rtc_state = rtc_init(0x70, 8);
 770
 771     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 772     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 773
 774     if (pci_enabled) {
 775         ioapic = ioapic_init();
 776     }
 777     isa_pic = pic_init(pic_irq_request, first_cpu);
 778     pit = pit_init(0x40, 0);
 779     pcspk_init(pit);
 780     if (pci_enabled) {
 781         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 782     }
 783
 784     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 785         if (serial_hds[i]) {
 786             serial_init(&pic_set_irq_new, isa_pic,
 787                         serial_io[i], serial_irq[i], serial_hds[i]);
 788         }
 789     }
 790
 791     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 792         if (parallel_hds[i]) {
 793             parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
 794         }
 795     }
 796
 797     for(i = 0; i < nb_nics; i++) {
 798         nd = &nd_table[i];
 799         if (!nd->model) {
 800             if (pci_enabled) {
 801                 nd->model = "ne2k_pci";
 802             } else {
 803                 nd->model = "ne2k_isa";
 804             }
 805         }
 806         if (strcmp(nd->model, "ne2k_isa") == 0) {
 807             pc_init_ne2k_isa(nd);
 808         } else if (pci_enabled) {
 809             pci_nic_init(pci_bus, nd);
 810         } else {
 811             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 812             exit(1);
 813         }
 814     }
 815
 816     if (pci_enabled) {
 817         pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
 818     } else {
 819         for(i = 0; i < 2; i++) {
 820             isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 821                          bs_table[2 * i], bs_table[2 * i + 1]);
 822         }
 823     }
 824
 825     kbd_init();
 826     DMA_init(0);
 827 #ifdef HAS_AUDIO
 828     audio_init(pci_enabled ? pci_bus : NULL);
 829 #endif
 830
 831     floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
 832
 833     cmos_init(ram_size, boot_device, bs_table);
 834
 835     if (pci_enabled && usb_enabled) {
 836         usb_uhci_init(pci_bus, usb_root_ports, piix3_devfn + 2);
 837         usb_attach(usb_root_ports[0], vm_usb_hub);
 838     }
 839
 840     if (pci_enabled && acpi_enabled) {
 841         piix4_pm_init(pci_bus, piix3_devfn + 3);
 842     }
 843     /* must be done after all PCI devices are instanciated */
 844     /* XXX: should be done in the Bochs BIOS */
 845     if (pci_enabled) {
 846         pci_bios_init();
 847         if (acpi_enabled)
 848             acpi_bios_init();
 849     }
 850 }
 851
 852 static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
 853                         DisplayState *ds, const char **fd_filename,
 854                         int snapshot,
 855                         const char *kernel_filename,
 856                         const char *kernel_cmdline,
 857                         const char *initrd_filename)
 858 {
 859     pc_init1(ram_size, vga_ram_size, boot_device,
 860              ds, fd_filename, snapshot,
 861              kernel_filename, kernel_cmdline,
 862              initrd_filename, 1);
 863 }
 864
 865 static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
 866                         DisplayState *ds, const char **fd_filename,
 867                         int snapshot,
 868                         const char *kernel_filename,
 869                         const char *kernel_cmdline,
 870                         const char *initrd_filename)
 871 {
 872     pc_init1(ram_size, vga_ram_size, boot_device,
 873              ds, fd_filename, snapshot,
 874              kernel_filename, kernel_cmdline,
 875              initrd_filename, 0);
 876 }
 877
 878 QEMUMachine pc_machine = {
 879     "pc",
 880     "Standard PC",
 881     pc_init_pci,
 882 };
 883
 884 QEMUMachine isapc_machine = {
 885     "isapc",
 886     "ISA-only PC",
 887     pc_init_isa,
 888 };