3 #define BIOS_FILENAME "mips_bios.bin"
4 //#define BIOS_FILENAME "system.bin"
5 #define KERNEL_LOAD_ADDR 0x80010000
6 #define INITRD_LOAD_ADDR 0x80800000
8 #define VIRT_TO_PHYS_ADDEND (-0x80000000LL)
14 static void pic_irq_request(void *opaque
, int level
)
16 CPUState
*env
= first_cpu
;
18 env
->CP0_Cause
|= 0x00000400;
19 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
21 env
->CP0_Cause
&= ~0x00000400;
22 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
26 void cpu_mips_irqctrl_init (void)
30 /* XXX: do not use a global */
31 uint32_t cpu_mips_get_random (CPUState
*env
)
33 static uint32_t seed
= 0;
35 seed
= seed
* 314159 + 1;
36 idx
= (seed
>> 16) % (MIPS_TLB_NB
- env
->CP0_Wired
) + env
->CP0_Wired
;
41 uint32_t cpu_mips_get_count (CPUState
*env
)
43 return env
->CP0_Count
+
44 (uint32_t)muldiv64(qemu_get_clock(vm_clock
),
45 100 * 1000 * 1000, ticks_per_sec
);
48 static void cpu_mips_update_count (CPUState
*env
, uint32_t count
,
57 now
= qemu_get_clock(vm_clock
);
58 next
= now
+ muldiv64(compare
- tmp
, ticks_per_sec
, 100 * 1000 * 1000);
63 fprintf(logfile
, "%s: 0x%08" PRIx64
" %08x %08x => 0x%08" PRIx64
"\n",
64 __func__
, now
, count
, compare
, next
- now
);
67 /* Store new count and compare registers */
68 env
->CP0_Compare
= compare
;
70 count
- (uint32_t)muldiv64(now
, 100 * 1000 * 1000, ticks_per_sec
);
72 qemu_mod_timer(env
->timer
, next
);
75 void cpu_mips_store_count (CPUState
*env
, uint32_t value
)
77 cpu_mips_update_count(env
, value
, env
->CP0_Compare
);
80 void cpu_mips_store_compare (CPUState
*env
, uint32_t value
)
82 cpu_mips_update_count(env
, cpu_mips_get_count(env
), value
);
83 env
->CP0_Cause
&= ~0x00008000;
84 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
87 static void mips_timer_cb (void *opaque
)
94 fprintf(logfile
, "%s\n", __func__
);
97 cpu_mips_update_count(env
, cpu_mips_get_count(env
), env
->CP0_Compare
);
98 env
->CP0_Cause
|= 0x00008000;
99 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
102 void cpu_mips_clock_init (CPUState
*env
)
104 env
->timer
= qemu_new_timer(vm_clock
, &mips_timer_cb
, env
);
105 env
->CP0_Compare
= 0;
106 cpu_mips_update_count(env
, 1, 0);
110 static void io_writeb (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
114 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, value
);
116 cpu_outb(NULL
, addr
& 0xffff, value
);
119 static uint32_t io_readb (void *opaque
, target_phys_addr_t addr
)
121 uint32_t ret
= cpu_inb(NULL
, addr
& 0xffff);
124 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, ret
);
129 static void io_writew (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
133 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, value
);
135 #ifdef TARGET_WORDS_BIGENDIAN
136 value
= bswap16(value
);
138 cpu_outw(NULL
, addr
& 0xffff, value
);
141 static uint32_t io_readw (void *opaque
, target_phys_addr_t addr
)
143 uint32_t ret
= cpu_inw(NULL
, addr
& 0xffff);
144 #ifdef TARGET_WORDS_BIGENDIAN
149 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, ret
);
154 static void io_writel (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
158 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, value
);
160 #ifdef TARGET_WORDS_BIGENDIAN
161 value
= bswap32(value
);
163 cpu_outl(NULL
, addr
& 0xffff, value
);
166 static uint32_t io_readl (void *opaque
, target_phys_addr_t addr
)
168 uint32_t ret
= cpu_inl(NULL
, addr
& 0xffff);
170 #ifdef TARGET_WORDS_BIGENDIAN
175 fprintf(logfile
, "%s: addr %08x val %08x\n", __func__
, addr
, ret
);
180 CPUWriteMemoryFunc
*io_write
[] = {
186 CPUReadMemoryFunc
*io_read
[] = {
192 void mips_r4k_init (int ram_size
, int vga_ram_size
, int boot_device
,
193 DisplayState
*ds
, const char **fd_filename
, int snapshot
,
194 const char *kernel_filename
, const char *kernel_cmdline
,
195 const char *initrd_filename
)
199 unsigned long bios_offset
;
206 register_savevm("cpu", 0, 3, cpu_save
, cpu_load
, env
);
209 cpu_register_physical_memory(0, ram_size
, IO_MEM_RAM
);
211 /* Try to load a BIOS image. If this fails, we continue regardless,
212 but initialize the hardware ourselves. When a kernel gets
213 preloaded we also initialize the hardware, since the BIOS wasn't
215 bios_offset
= ram_size
+ vga_ram_size
;
216 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, BIOS_FILENAME
);
217 ret
= load_image(buf
, phys_ram_base
+ bios_offset
);
218 if (ret
== BIOS_SIZE
) {
219 cpu_register_physical_memory((uint32_t)(0x1fc00000),
220 BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
223 fprintf(stderr
, "qemu: Warning, could not load MIPS bios '%s'\n",
228 if (kernel_filename
) {
229 kernel_size
= load_elf(kernel_filename
, VIRT_TO_PHYS_ADDEND
, &entry
);
230 if (kernel_size
>= 0)
233 kernel_size
= load_image(kernel_filename
,
234 phys_ram_base
+ KERNEL_LOAD_ADDR
+ VIRT_TO_PHYS_ADDEND
);
235 if (kernel_size
< 0) {
236 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
240 env
->PC
= KERNEL_LOAD_ADDR
;
244 if (initrd_filename
) {
245 if (load_image(initrd_filename
,
246 phys_ram_base
+ INITRD_LOAD_ADDR
+ VIRT_TO_PHYS_ADDEND
)
247 == (target_ulong
) -1) {
248 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
254 /* Store command line. */
255 strcpy (phys_ram_base
+ (16 << 20) - 256, kernel_cmdline
);
256 /* FIXME: little endian support */
257 *(int *)(phys_ram_base
+ (16 << 20) - 260) = tswap32 (0x12345678);
258 *(int *)(phys_ram_base
+ (16 << 20) - 264) = tswap32 (ram_size
);
261 /* Init internal devices */
262 cpu_mips_clock_init(env
);
263 cpu_mips_irqctrl_init();
265 /* Register 64 KB of ISA IO space at 0x14000000 */
266 io_memory
= cpu_register_io_memory(0, io_read
, io_write
, NULL
);
267 cpu_register_physical_memory(0x14000000, 0x00010000, io_memory
);
268 isa_mem_base
= 0x10000000;
270 isa_pic
= pic_init(pic_irq_request
, env
);
271 pit
= pit_init(0x40, 0);
272 serial_init(&pic_set_irq_new
, isa_pic
, 0x3f8, 4, serial_hds
[0]);
273 vga_initialize(NULL
, ds
, phys_ram_base
+ ram_size
, ram_size
,
276 if (nd_table
[0].vlan
) {
277 if (nd_table
[0].model
== NULL
278 || strcmp(nd_table
[0].model
, "ne2k_isa") == 0) {
279 isa_ne2000_init(0x300, 9, &nd_table
[0]);
281 fprintf(stderr
, "qemu: Unsupported NIC: %s\n", nd_table
[0].model
);
287 QEMUMachine mips_machine
= {